Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

drm/amdgpu/mmsch: Correct the definition for mmsch init header

For the header, it is version related, shouldn't use MAX_VCN_INSTANCES.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Emily Deng and committed by
Alex Deucher
f2bcc0c7 8be29504

+8 -4
+3 -1
drivers/gpu/drm/amd/amdgpu/mmsch_v3_0.h
··· 30 30 #define MMSCH_VERSION_MINOR 0 31 31 #define MMSCH_VERSION (MMSCH_VERSION_MAJOR << 16 | MMSCH_VERSION_MINOR) 32 32 33 + #define MMSCH_V3_0_VCN_INSTANCES 0x2 34 + 33 35 enum mmsch_v3_0_command_type { 34 36 MMSCH_COMMAND__DIRECT_REG_WRITE = 0, 35 37 MMSCH_COMMAND__DIRECT_REG_POLLING = 2, ··· 49 47 struct mmsch_v3_0_init_header { 50 48 uint32_t version; 51 49 uint32_t total_size; 52 - struct mmsch_v3_0_table_info inst[AMDGPU_MAX_VCN_INSTANCES]; 50 + struct mmsch_v3_0_table_info inst[MMSCH_V3_0_VCN_INSTANCES]; 53 51 }; 54 52 55 53 struct mmsch_v3_0_cmd_direct_reg_header {
+3 -1
drivers/gpu/drm/amd/amdgpu/mmsch_v4_0.h
··· 43 43 #define MMSCH_VF_MAILBOX_RESP__OK 0x1 44 44 #define MMSCH_VF_MAILBOX_RESP__INCOMPLETE 0x2 45 45 46 + #define MMSCH_V4_0_VCN_INSTANCES 0x2 47 + 46 48 enum mmsch_v4_0_command_type { 47 49 MMSCH_COMMAND__DIRECT_REG_WRITE = 0, 48 50 MMSCH_COMMAND__DIRECT_REG_POLLING = 2, ··· 62 60 struct mmsch_v4_0_init_header { 63 61 uint32_t version; 64 62 uint32_t total_size; 65 - struct mmsch_v4_0_table_info inst[AMDGPU_MAX_VCN_INSTANCES]; 63 + struct mmsch_v4_0_table_info inst[MMSCH_V4_0_VCN_INSTANCES]; 66 64 struct mmsch_v4_0_table_info jpegdec; 67 65 }; 68 66
+1 -1
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
··· 1313 1313 1314 1314 header.version = MMSCH_VERSION; 1315 1315 header.total_size = sizeof(struct mmsch_v3_0_init_header) >> 2; 1316 - for (i = 0; i < AMDGPU_MAX_VCN_INSTANCES; i++) { 1316 + for (i = 0; i < MMSCH_V3_0_VCN_INSTANCES; i++) { 1317 1317 header.inst[i].init_status = 0; 1318 1318 header.inst[i].table_offset = 0; 1319 1319 header.inst[i].table_size = 0;
+1 -1
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
··· 1239 1239 1240 1240 header.version = MMSCH_VERSION; 1241 1241 header.total_size = sizeof(struct mmsch_v4_0_init_header) >> 2; 1242 - for (i = 0; i < AMDGPU_MAX_VCN_INSTANCES; i++) { 1242 + for (i = 0; i < MMSCH_V4_0_VCN_INSTANCES; i++) { 1243 1243 header.inst[i].init_status = 0; 1244 1244 header.inst[i].table_offset = 0; 1245 1245 header.inst[i].table_size = 0;