tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'v6.17-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

The newly added Rock 5T board needed slightly bigger fixes to make the
PCIe and USB actually work, because the PCIe does share its lanes between
two ports and the usb needs to toggle a gpio to supply power.

The other interesting fix is the headphone detection on the Orange Pi 5+.

The rest are some added supplies to make the boot log less scary and a
number of styling fixes.

* tag 'v6.17-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: fix second M.2 slot on ROCK 5T
arm64: dts: rockchip: fix USB on RADXA ROCK 5T
arm64: dts: rockchip: Add vcc-supply to SPI flash on Pinephone Pro
arm64: dts: rockchip: fix es8388 address on rk3588s-roc-pc
arm64: dts: rockchip: Fix Bluetooth interrupts flag on Neardi LBA3368
arm64: dts: rockchip: correct network description on Sige5
arm64: dts: rockchip: Minor whitespace cleanup
ARM: dts: rockchip: Minor whitespace cleanup
arm64: dts: rockchip: Add supplies for eMMC on rk3588-orangepi-5
arm64: dts: rockchip: Fix the headphone detection on the orangepi 5 plus
arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3399-pinebook-pro
arm64: dts: rockchip: mark eeprom as read-only for Radxa E52C

Link: https://lore.kernel.org/r/5909239.Y6S9NjorxK@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Arnd Bergmann f2e8f1f5 750b5451

+64 -27
+1 -1
arch/arm/boot/dts/rockchip/rk3128-xpi-3128.dts
··· 272 272 phy-mode = "rmii"; 273 273 phy-handle = <&phy0>; 274 274 assigned-clocks = <&cru SCLK_MAC_SRC>; 275 - assigned-clock-rates= <50000000>; 275 + assigned-clock-rates = <50000000>; 276 276 pinctrl-names = "default"; 277 277 pinctrl-0 = <&rmii_pins>; 278 278 status = "okay";
+3 -3
arch/arm/boot/dts/rockchip/rv1109-relfor-saib.dts
··· 250 250 &i2s0 { 251 251 /delete-property/ pinctrl-0; 252 252 rockchip,trcm-sync-rx-only; 253 - pinctrl-0 = <&i2s0m0_sclk_rx>, 254 - <&i2s0m0_lrck_rx>, 255 - <&i2s0m0_sdi0>; 253 + pinctrl-0 = <&i2s0m0_sclk_rx>, 254 + <&i2s0m0_lrck_rx>, 255 + <&i2s0m0_sdi0>; 256 256 pinctrl-names = "default"; 257 257 status = "okay"; 258 258 };
+4 -4
arch/arm64/boot/dts/rockchip/px30-pp1516.dtsi
··· 72 72 }; 73 73 74 74 vcc_cam_avdd: regulator-vcc-cam-avdd { 75 - compatible = "regulator-fixed"; 75 + compatible = "regulator-fixed"; 76 76 regulator-name = "vcc_cam_avdd"; 77 77 gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 78 78 pinctrl-names = "default"; ··· 83 83 }; 84 84 85 85 vcc_cam_dovdd: regulator-vcc-cam-dovdd { 86 - compatible = "regulator-fixed"; 86 + compatible = "regulator-fixed"; 87 87 regulator-name = "vcc_cam_dovdd"; 88 88 gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; 89 89 pinctrl-names = "default"; ··· 94 94 }; 95 95 96 96 vcc_cam_dvdd: regulator-vcc-cam-dvdd { 97 - compatible = "regulator-fixed"; 97 + compatible = "regulator-fixed"; 98 98 regulator-name = "vcc_cam_dvdd"; 99 99 gpio = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 100 100 enable-active-high; ··· 106 106 }; 107 107 108 108 vcc_lens_afvdd: regulator-vcc-lens-afvdd { 109 - compatible = "regulator-fixed"; 109 + compatible = "regulator-fixed"; 110 110 regulator-name = "vcc_lens_afvdd"; 111 111 gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; 112 112 pinctrl-names = "default";
+3 -3
arch/arm64/boot/dts/rockchip/px30-ringneck-haikou-video-demo.dtso
··· 26 26 }; 27 27 28 28 cam_afvdd_2v8: regulator-cam-afvdd-2v8 { 29 - compatible = "regulator-fixed"; 29 + compatible = "regulator-fixed"; 30 30 gpio = <&pca9670 2 GPIO_ACTIVE_LOW>; 31 31 regulator-max-microvolt = <2800000>; 32 32 regulator-min-microvolt = <2800000>; ··· 35 35 }; 36 36 37 37 cam_avdd_2v8: regulator-cam-avdd-2v8 { 38 - compatible = "regulator-fixed"; 38 + compatible = "regulator-fixed"; 39 39 gpio = <&pca9670 4 GPIO_ACTIVE_LOW>; 40 40 regulator-max-microvolt = <2800000>; 41 41 regulator-min-microvolt = <2800000>; ··· 44 44 }; 45 45 46 46 cam_dovdd_1v8: regulator-cam-dovdd-1v8 { 47 - compatible = "regulator-fixed"; 47 + compatible = "regulator-fixed"; 48 48 gpio = <&pca9670 3 GPIO_ACTIVE_LOW>; 49 49 regulator-max-microvolt = <1800000>; 50 50 regulator-min-microvolt = <1800000>;
+1 -1
arch/arm64/boot/dts/rockchip/rk3308-sakurapi-rk3308b.dts
··· 260 260 status = "okay"; 261 261 }; 262 262 263 - &usb_host_ohci{ 263 + &usb_host_ohci { 264 264 status = "okay"; 265 265 };
+1 -1
arch/arm64/boot/dts/rockchip/rk3368-lba3368.dts
··· 609 609 610 610 bluetooth { 611 611 compatible = "brcm,bcm4345c5"; 612 - interrupts-extended = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; 612 + interrupts-extended = <&gpio3 RK_PA7 IRQ_TYPE_LEVEL_HIGH>; 613 613 interrupt-names = "host-wakeup"; 614 614 clocks = <&rk808 RK808_CLKOUT1>; 615 615 clock-names = "lpo";
+1
arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
··· 959 959 reg = <0>; 960 960 m25p,fast-read; 961 961 spi-max-frequency = <10000000>; 962 + vcc-supply = <&vcc_3v0>; 962 963 }; 963 964 }; 964 965
+1
arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
··· 754 754 compatible = "jedec,spi-nor"; 755 755 reg = <0>; 756 756 spi-max-frequency = <10000000>; 757 + vcc-supply = <&vcc_1v8>; 757 758 }; 758 759 }; 759 760
+3 -3
arch/arm64/boot/dts/rockchip/rk3399-puma-haikou-video-demo.dtso
··· 26 26 }; 27 27 28 28 cam_afvdd_2v8: regulator-cam-afvdd-2v8 { 29 - compatible = "regulator-fixed"; 29 + compatible = "regulator-fixed"; 30 30 gpio = <&pca9670 2 GPIO_ACTIVE_LOW>; 31 31 regulator-max-microvolt = <2800000>; 32 32 regulator-min-microvolt = <2800000>; ··· 35 35 }; 36 36 37 37 cam_avdd_2v8: regulator-cam-avdd-2v8 { 38 - compatible = "regulator-fixed"; 38 + compatible = "regulator-fixed"; 39 39 gpio = <&pca9670 4 GPIO_ACTIVE_LOW>; 40 40 regulator-max-microvolt = <2800000>; 41 41 regulator-min-microvolt = <2800000>; ··· 44 44 }; 45 45 46 46 cam_dovdd_1v8: regulator-cam-dovdd-1v8 { 47 - compatible = "regulator-fixed"; 47 + compatible = "regulator-fixed"; 48 48 gpio = <&pca9670 3 GPIO_ACTIVE_LOW>; 49 49 regulator-max-microvolt = <1800000>; 50 50 regulator-min-microvolt = <1800000>;
+2 -2
arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi
··· 53 53 gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_LOW>; 54 54 linux,default-trigger = "default-on"; 55 55 pinctrl-names = "default"; 56 - pinctrl-0 =<&blue_led>; 56 + pinctrl-0 = <&blue_led>; 57 57 }; 58 58 59 59 led-1 { ··· 62 62 gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; 63 63 linux,default-trigger = "heartbeat"; 64 64 pinctrl-names = "default"; 65 - pinctrl-0 =<&heartbeat_led>; 65 + pinctrl-0 = <&heartbeat_led>; 66 66 }; 67 67 }; 68 68
+1 -4
arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts
··· 302 302 &eth1m0_tx_bus2 303 303 &eth1m0_rx_bus2 304 304 &eth1m0_rgmii_clk 305 - &eth1m0_rgmii_bus 306 - &ethm0_clk1_25m_out>; 305 + &eth1m0_rgmii_bus>; 307 306 status = "okay"; 308 307 }; 309 308 ··· 783 784 rgmii_phy0: phy@1 { 784 785 compatible = "ethernet-phy-ieee802.3-c22"; 785 786 reg = <0x1>; 786 - clocks = <&cru REFCLKO25M_GMAC0_OUT>; 787 787 pinctrl-names = "default"; 788 788 pinctrl-0 = <&gmac0_rst>; 789 789 reset-assert-us = <20000>; ··· 795 797 rgmii_phy1: phy@1 { 796 798 compatible = "ethernet-phy-ieee802.3-c22"; 797 799 reg = <0x1>; 798 - clocks = <&cru REFCLKO25M_GMAC1_OUT>; 799 800 pinctrl-names = "default"; 800 801 pinctrl-0 = <&gmac1_rst>; 801 802 reset-assert-us = <20000>;
+1
arch/arm64/boot/dts/rockchip/rk3582-radxa-e52c.dts
··· 250 250 compatible = "belling,bl24c16a", "atmel,24c16"; 251 251 reg = <0x50>; 252 252 pagesize = <16>; 253 + read-only; 253 254 vcc-supply = <&vcc_3v3_pmu>; 254 255 }; 255 256 };
+1 -1
arch/arm64/boot/dts/rockchip/rk3588-orangepi-5-plus.dts
··· 77 77 pinctrl-names = "default"; 78 78 pinctrl-0 = <&hp_detect>; 79 79 simple-audio-card,aux-devs = <&speaker_amp>, <&headphone_amp>; 80 - simple-audio-card,hp-det-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_LOW>; 80 + simple-audio-card,hp-det-gpios = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; 81 81 simple-audio-card,widgets = 82 82 "Microphone", "Onboard Microphone", 83 83 "Microphone", "Microphone Jack",
+2
arch/arm64/boot/dts/rockchip/rk3588-orangepi-5.dtsi
··· 365 365 max-frequency = <200000000>; 366 366 mmc-hs400-1_8v; 367 367 mmc-hs400-enhanced-strobe; 368 + vmmc-supply = <&vcc_3v3_s3>; 369 + vqmmc-supply = <&vcc_1v8_s3>; 368 370 status = "okay"; 369 371 }; 370 372
+35
arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts
··· 68 68 status = "okay"; 69 69 }; 70 70 71 + &pcie30phy { 72 + data-lanes = <1 1 2 2>; 73 + }; 74 + 75 + &pcie3x2 { 76 + pinctrl-names = "default"; 77 + pinctrl-0 = <&pcie3x2_rst>; 78 + reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 79 + vpcie3v3-supply = <&vcc3v3_pcie30>; 80 + status = "okay"; 81 + }; 82 + 83 + &pcie3x4 { 84 + num-lanes = <2>; 85 + }; 86 + 71 87 &pinctrl { 72 88 hdmirx { 73 89 hdmirx_hpd: hdmirx-5v-detection { ··· 106 90 }; 107 91 }; 108 92 93 + pcie3 { 94 + pcie3x2_rst: pcie3x2-rst { 95 + rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 96 + }; 97 + }; 98 + 109 99 sound { 110 100 hp_detect: hp-detect { 111 101 rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 102 + }; 103 + }; 104 + 105 + usb { 106 + vcc5v0_host_en: vcc5v0-host-en { 107 + rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 112 108 }; 113 109 }; 114 110 }; ··· 130 102 pinctrl-names = "default"; 131 103 pinctrl-0 = <&pcie2_0_vcc3v3_en>; 132 104 status = "okay"; 105 + }; 106 + 107 + &vcc5v0_host { 108 + enable-active-high; 109 + gpio = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; 110 + pinctrl-names = "default"; 111 + pinctrl-0 = <&vcc5v0_host_en>; 133 112 };
+2 -2
arch/arm64/boot/dts/rockchip/rk3588j.dtsi
··· 28 28 compatible = "operating-points-v2"; 29 29 opp-shared; 30 30 31 - opp-1200000000{ 31 + opp-1200000000 { 32 32 opp-hz = /bits/ 64 <1200000000>; 33 33 opp-microvolt = <750000 750000 950000>; 34 34 clock-latency-ns = <40000>; ··· 49 49 compatible = "operating-points-v2"; 50 50 opp-shared; 51 51 52 - opp-1200000000{ 52 + opp-1200000000 { 53 53 opp-hz = /bits/ 64 <1200000000>; 54 54 opp-microvolt = <750000 750000 950000>; 55 55 clock-latency-ns = <40000>;
+2 -2
arch/arm64/boot/dts/rockchip/rk3588s-roc-pc.dts
··· 320 320 &i2c3 { 321 321 status = "okay"; 322 322 323 - es8388: audio-codec@10 { 323 + es8388: audio-codec@11 { 324 324 compatible = "everest,es8388", "everest,es8328"; 325 - reg = <0x10>; 325 + reg = <0x11>; 326 326 clocks = <&cru I2S1_8CH_MCLKOUT>; 327 327 AVDD-supply = <&vcc_3v3_s0>; 328 328 DVDD-supply = <&vcc_1v8_s0>;