Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'idle-release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-idle-2.6
* 'idle-release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-idle-2.6:
x86 idle: deprecate mwait_idle() and "idle=mwait" cmdline param
x86 idle: deprecate "no-hlt" cmdline param
x86 idle APM: deprecate CONFIG_APM_CPU_IDLE
x86 idle floppy: deprecate disable_hlt()
x86 idle: EXPORT_SYMBOL(default_idle, pm_idle) only when APM demands it
x86 idle: clarify AMD erratum 400 workaround
idle governor: Avoid lock acquisition to read pm_qos before entering idle
cpuidle: menu: fixed wrapping timers at 4.294 seconds
+102
-40
+36
Documentation/feature-removal-schedule.txt
+36
Documentation/feature-removal-schedule.txt
···
6
6
7
7
---------------------------
8
8
9
+
What: x86 floppy disable_hlt
10
+
When: 2012
11
+
Why: ancient workaround of dubious utility clutters the
12
+
code used by everybody else.
13
+
Who: Len Brown <len.brown@intel.com>
14
+
15
+
---------------------------
16
+
17
+
What: CONFIG_APM_CPU_IDLE, and its ability to call APM BIOS in idle
18
+
When: 2012
19
+
Why: This optional sub-feature of APM is of dubious reliability,
20
+
and ancient APM laptops are likely better served by calling HLT.
21
+
Deleting CONFIG_APM_CPU_IDLE allows x86 to stop exporting
22
+
the pm_idle function pointer to modules.
23
+
Who: Len Brown <len.brown@intel.com>
24
+
25
+
----------------------------
26
+
27
+
What: x86_32 "no-hlt" cmdline param
28
+
When: 2012
29
+
Why: remove a branch from idle path, simplify code used by everybody.
30
+
This option disabled the use of HLT in idle and machine_halt()
31
+
for hardware that was flakey 15-years ago. Today we have
32
+
"idle=poll" that removed HLT from idle, and so if such a machine
33
+
is still running the upstream kernel, "idle=poll" is likely sufficient.
34
+
Who: Len Brown <len.brown@intel.com>
35
+
36
+
----------------------------
37
+
38
+
What: x86 "idle=mwait" cmdline param
39
+
When: 2012
40
+
Why: simplify x86 idle code
41
+
Who: Len Brown <len.brown@intel.com>
42
+
43
+
----------------------------
44
+
9
45
What: PRISM54
10
46
When: 2.6.34
11
47
+1
-1
arch/x86/include/asm/acpi.h
+1
-1
arch/x86/include/asm/acpi.h
+1
-1
arch/x86/include/asm/idle.h
+1
-1
arch/x86/include/asm/idle.h
+2
-2
arch/x86/include/asm/processor.h
+2
-2
arch/x86/include/asm/processor.h
···
754
754
extern void mwait_idle_with_hints(unsigned long eax, unsigned long ecx);
755
755
756
756
extern void select_idle_routine(const struct cpuinfo_x86 *c);
757
-
extern void init_c1e_mask(void);
757
+
extern void init_amd_e400_c1e_mask(void);
758
758
759
759
extern unsigned long boot_option_idle_override;
760
-
extern bool c1e_detected;
760
+
extern bool amd_e400_c1e_detected;
761
761
762
762
enum idle_boot_override {IDLE_NO_OVERRIDE=0, IDLE_HALT, IDLE_NOMWAIT,
763
763
IDLE_POLL, IDLE_FORCE_MWAIT};
+2
arch/x86/kernel/apm_32.c
+2
arch/x86/kernel/apm_32.c
···
361
361
* idle percentage above which bios idle calls are done
362
362
*/
363
363
#ifdef CONFIG_APM_CPU_IDLE
364
+
#warning deprecated CONFIG_APM_CPU_IDLE will be deleted in 2012
364
365
#define DEFAULT_IDLE_THRESHOLD 95
365
366
#else
366
367
#define DEFAULT_IDLE_THRESHOLD 100
···
905
904
unsigned int jiffies_since_last_check = jiffies - last_jiffies;
906
905
unsigned int bucket;
907
906
907
+
WARN_ONCE(1, "deprecated apm_cpu_idle will be deleted in 2012");
908
908
recalc:
909
909
if (jiffies_since_last_check > IDLE_CALC_LIMIT) {
910
910
use_apm_idle = 0;
+1
arch/x86/kernel/cpu/bugs.c
+1
arch/x86/kernel/cpu/bugs.c
+1
-1
arch/x86/kernel/cpu/common.c
+1
-1
arch/x86/kernel/cpu/common.c
+23
-20
arch/x86/kernel/process.c
+23
-20
arch/x86/kernel/process.c
···
337
337
* Powermanagement idle function, if any..
338
338
*/
339
339
void (*pm_idle)(void);
340
+
#if defined(CONFIG_APM_MODULE) && defined(CONFIG_APM_CPU_IDLE)
340
341
EXPORT_SYMBOL(pm_idle);
342
+
#endif
341
343
342
344
#ifdef CONFIG_X86_32
343
345
/*
···
399
397
cpu_relax();
400
398
}
401
399
}
402
-
#ifdef CONFIG_APM_MODULE
400
+
#if defined(CONFIG_APM_MODULE) && defined(CONFIG_APM_CPU_IDLE)
403
401
EXPORT_SYMBOL(default_idle);
404
402
#endif
405
403
···
537
535
return (edx & MWAIT_EDX_C1);
538
536
}
539
537
540
-
bool c1e_detected;
541
-
EXPORT_SYMBOL(c1e_detected);
538
+
bool amd_e400_c1e_detected;
539
+
EXPORT_SYMBOL(amd_e400_c1e_detected);
542
540
543
-
static cpumask_var_t c1e_mask;
541
+
static cpumask_var_t amd_e400_c1e_mask;
544
542
545
-
void c1e_remove_cpu(int cpu)
543
+
void amd_e400_remove_cpu(int cpu)
546
544
{
547
-
if (c1e_mask != NULL)
548
-
cpumask_clear_cpu(cpu, c1e_mask);
545
+
if (amd_e400_c1e_mask != NULL)
546
+
cpumask_clear_cpu(cpu, amd_e400_c1e_mask);
549
547
}
550
548
551
549
/*
552
-
* C1E aware idle routine. We check for C1E active in the interrupt
550
+
* AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
553
551
* pending message MSR. If we detect C1E, then we handle it the same
554
552
* way as C3 power states (local apic timer and TSC stop)
555
553
*/
556
-
static void c1e_idle(void)
554
+
static void amd_e400_idle(void)
557
555
{
558
556
if (need_resched())
559
557
return;
560
558
561
-
if (!c1e_detected) {
559
+
if (!amd_e400_c1e_detected) {
562
560
u32 lo, hi;
563
561
564
562
rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
565
563
566
564
if (lo & K8_INTP_C1E_ACTIVE_MASK) {
567
-
c1e_detected = true;
565
+
amd_e400_c1e_detected = true;
568
566
if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
569
567
mark_tsc_unstable("TSC halt in AMD C1E");
570
568
printk(KERN_INFO "System has AMD C1E enabled\n");
571
569
}
572
570
}
573
571
574
-
if (c1e_detected) {
572
+
if (amd_e400_c1e_detected) {
575
573
int cpu = smp_processor_id();
576
574
577
-
if (!cpumask_test_cpu(cpu, c1e_mask)) {
578
-
cpumask_set_cpu(cpu, c1e_mask);
575
+
if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
576
+
cpumask_set_cpu(cpu, amd_e400_c1e_mask);
579
577
/*
580
578
* Force broadcast so ACPI can not interfere.
581
579
*/
···
618
616
pm_idle = mwait_idle;
619
617
} else if (cpu_has_amd_erratum(amd_erratum_400)) {
620
618
/* E400: APIC timer interrupt does not wake up CPU from C1e */
621
-
printk(KERN_INFO "using C1E aware idle routine\n");
622
-
pm_idle = c1e_idle;
619
+
printk(KERN_INFO "using AMD E400 aware idle routine\n");
620
+
pm_idle = amd_e400_idle;
623
621
} else
624
622
pm_idle = default_idle;
625
623
}
626
624
627
-
void __init init_c1e_mask(void)
625
+
void __init init_amd_e400_c1e_mask(void)
628
626
{
629
-
/* If we're using c1e_idle, we need to allocate c1e_mask. */
630
-
if (pm_idle == c1e_idle)
631
-
zalloc_cpumask_var(&c1e_mask, GFP_KERNEL);
627
+
/* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
628
+
if (pm_idle == amd_e400_idle)
629
+
zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL);
632
630
}
633
631
634
632
static int __init idle_setup(char *str)
···
642
640
boot_option_idle_override = IDLE_POLL;
643
641
} else if (!strcmp(str, "mwait")) {
644
642
boot_option_idle_override = IDLE_FORCE_MWAIT;
643
+
WARN_ONCE(1, "\idle=mwait\" will be removed in 2012\"\n");
645
644
} else if (!strcmp(str, "halt")) {
646
645
/*
647
646
* When the boot option of idle=halt is added, halt is
+1
-1
arch/x86/kernel/smpboot.c
+1
-1
arch/x86/kernel/smpboot.c
+1
-1
drivers/acpi/processor_idle.c
+1
-1
drivers/acpi/processor_idle.c
+1
drivers/block/floppy.c
+1
drivers/block/floppy.c
+4
include/linux/pm_qos_params.h
+4
include/linux/pm_qos_params.h
···
16
16
#define PM_QOS_NUM_CLASSES 4
17
17
#define PM_QOS_DEFAULT_VALUE -1
18
18
19
+
#define PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC)
20
+
#define PM_QOS_NETWORK_LAT_DEFAULT_VALUE (2000 * USEC_PER_SEC)
21
+
#define PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE 0
22
+
19
23
struct pm_qos_request_list {
20
24
struct plist_node list;
21
25
int pm_qos_class;
+25
-12
kernel/pm_qos_params.c
+25
-12
kernel/pm_qos_params.c
···
54
54
PM_QOS_MIN /* return the smallest value */
55
55
};
56
56
57
+
/*
58
+
* Note: The lockless read path depends on the CPU accessing
59
+
* target_value atomically. Atomic access is only guaranteed on all CPU
60
+
* types linux supports for 32 bit quantites
61
+
*/
57
62
struct pm_qos_object {
58
63
struct plist_head requests;
59
64
struct blocking_notifier_head *notifiers;
60
65
struct miscdevice pm_qos_power_miscdev;
61
66
char *name;
67
+
s32 target_value; /* Do not change to 64 bit */
62
68
s32 default_value;
63
69
enum pm_qos_type type;
64
70
};
···
77
71
.requests = PLIST_HEAD_INIT(cpu_dma_pm_qos.requests, pm_qos_lock),
78
72
.notifiers = &cpu_dma_lat_notifier,
79
73
.name = "cpu_dma_latency",
80
-
.default_value = 2000 * USEC_PER_SEC,
74
+
.target_value = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE,
75
+
.default_value = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE,
81
76
.type = PM_QOS_MIN,
82
77
};
83
78
···
87
80
.requests = PLIST_HEAD_INIT(network_lat_pm_qos.requests, pm_qos_lock),
88
81
.notifiers = &network_lat_notifier,
89
82
.name = "network_latency",
90
-
.default_value = 2000 * USEC_PER_SEC,
83
+
.target_value = PM_QOS_NETWORK_LAT_DEFAULT_VALUE,
84
+
.default_value = PM_QOS_NETWORK_LAT_DEFAULT_VALUE,
91
85
.type = PM_QOS_MIN
92
86
};
93
87
···
98
90
.requests = PLIST_HEAD_INIT(network_throughput_pm_qos.requests, pm_qos_lock),
99
91
.notifiers = &network_throughput_notifier,
100
92
.name = "network_throughput",
101
-
.default_value = 0,
93
+
.target_value = PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE,
94
+
.default_value = PM_QOS_NETWORK_THROUGHPUT_DEFAULT_VALUE,
102
95
.type = PM_QOS_MAX,
103
96
};
104
97
···
145
136
}
146
137
}
147
138
139
+
static inline s32 pm_qos_read_value(struct pm_qos_object *o)
140
+
{
141
+
return o->target_value;
142
+
}
143
+
144
+
static inline void pm_qos_set_value(struct pm_qos_object *o, s32 value)
145
+
{
146
+
o->target_value = value;
147
+
}
148
+
148
149
static void update_target(struct pm_qos_object *o, struct plist_node *node,
149
150
int del, int value)
150
151
{
···
179
160
plist_add(node, &o->requests);
180
161
}
181
162
curr_value = pm_qos_get_value(o);
163
+
pm_qos_set_value(o, curr_value);
182
164
spin_unlock_irqrestore(&pm_qos_lock, flags);
183
165
184
166
if (prev_value != curr_value)
···
214
194
* pm_qos_request - returns current system wide qos expectation
215
195
* @pm_qos_class: identification of which qos value is requested
216
196
*
217
-
* This function returns the current target value in an atomic manner.
197
+
* This function returns the current target value.
218
198
*/
219
199
int pm_qos_request(int pm_qos_class)
220
200
{
221
-
unsigned long flags;
222
-
int value;
223
-
224
-
spin_lock_irqsave(&pm_qos_lock, flags);
225
-
value = pm_qos_get_value(pm_qos_array[pm_qos_class]);
226
-
spin_unlock_irqrestore(&pm_qos_lock, flags);
227
-
228
-
return value;
201
+
return pm_qos_read_value(pm_qos_array[pm_qos_class]);
229
202
}
230
203
EXPORT_SYMBOL_GPL(pm_qos_request);
231
204