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drm/amdgpu: Consolidate reserve region allocations

Move marking reserve regions to a single function. It loops through all
the reserve region ids. The ones with non-zero size are reserved. There
are still some reservations which could happen later during runtime like
firmware extended reservation region.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Lijo Lazar and committed by
Alex Deucher f315099f 6845355a

+26 -63
+26 -63
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
··· 1783 1783 &resv->bo, 1784 1784 resv->needs_cpu_map ? &resv->cpu_ptr : NULL); 1785 1785 if (ret) { 1786 - dev_dbg(adev->dev, "reserve vram failed: id=%d offset=0x%llx size=0x%llx ret=%d\n", 1786 + dev_err(adev->dev, 1787 + "reserve vram failed: id=%d offset=0x%llx size=0x%llx ret=%d\n", 1787 1788 id, resv->offset, resv->size, ret); 1788 1789 memset(resv, 0, sizeof(*resv)); 1789 1790 } ··· 1807 1806 amdgpu_bo_free_kernel(&resv->bo, NULL, 1808 1807 resv->needs_cpu_map ? &resv->cpu_ptr : NULL); 1809 1808 memset(resv, 0, sizeof(*resv)); 1809 + } 1810 + 1811 + /* 1812 + * Reserve all regions with non-zero size. Regions whose info is not 1813 + * yet available (e.g., fw extended region) may still be reserved 1814 + * during runtime. 1815 + */ 1816 + static int amdgpu_ttm_alloc_vram_resv_regions(struct amdgpu_device *adev) 1817 + { 1818 + int i, r; 1819 + 1820 + for (i = 0; i < AMDGPU_RESV_MAX; i++) { 1821 + r = amdgpu_ttm_mark_vram_reserved(adev, i); 1822 + if (r) 1823 + return r; 1824 + } 1825 + 1826 + return 0; 1810 1827 } 1811 1828 1812 1829 /* ··· 1865 1846 ctx->train_data_size, 1866 1847 ctx->p2c_train_data_offset, 1867 1848 ctx->c2p_train_data_offset); 1868 - } 1869 - 1870 - /* 1871 - * reserve TMR memory at the top of VRAM which holds 1872 - * IP Discovery data and is protected by PSP. 1873 - */ 1874 - static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev) 1875 - { 1876 - struct psp_memory_training_context *ctx = &adev->psp.mem_train_ctx; 1877 - int ret; 1878 - 1879 - ret = amdgpu_ttm_mark_vram_reserved(adev, AMDGPU_RESV_MEM_TRAIN); 1880 - if (ret) { 1881 - dev_err(adev->dev, "memory training region reservation failed(%d)!\n", ret); 1882 - return ret; 1883 - } 1884 - 1885 - if (adev->mman.resv_region[AMDGPU_RESV_MEM_TRAIN].size) { 1886 - amdgpu_ttm_training_data_block_init(adev); 1887 - ctx->init = PSP_MEM_TRAIN_RESERVE_SUCCESS; 1888 - } 1889 - 1890 - ret = amdgpu_ttm_mark_vram_reserved(adev, AMDGPU_RESV_FW); 1891 - if (ret) { 1892 - dev_err(adev->dev, "alloc tmr failed(%d)!\n", ret); 1893 - return ret; 1894 - } 1895 - 1896 - return 0; 1897 1849 } 1898 1850 1899 1851 static int amdgpu_ttm_pools_init(struct amdgpu_device *adev) ··· 2116 2126 2117 2127 amdgpu_ttm_init_vram_resv_regions(adev); 2118 2128 2119 - /* 2120 - *The reserved vram for firmware must be pinned to the specified 2121 - *place on the VRAM, so reserve it early. 2122 - */ 2123 - r = amdgpu_ttm_mark_vram_reserved(adev, AMDGPU_RESV_FW_VRAM_USAGE); 2129 + r = amdgpu_ttm_alloc_vram_resv_regions(adev); 2124 2130 if (r) 2125 2131 return r; 2126 2132 2127 - /* 2128 - * The reserved VRAM for the driver must be pinned to a specific 2129 - * location in VRAM, so reserve it early. 2130 - */ 2131 - r = amdgpu_ttm_mark_vram_reserved(adev, AMDGPU_RESV_DRV_VRAM_USAGE); 2132 - if (r) 2133 - return r; 2133 + if (adev->mman.resv_region[AMDGPU_RESV_MEM_TRAIN].size) { 2134 + struct psp_memory_training_context *ctx = 2135 + &adev->psp.mem_train_ctx; 2134 2136 2135 - /* 2136 - * only NAVI10 and later ASICs support IP discovery. 2137 - * If IP discovery is enabled, a block of memory should be 2138 - * reserved for it. 2139 - */ 2140 - if (adev->discovery.reserve_tmr) { 2141 - r = amdgpu_ttm_reserve_tmr(adev); 2142 - if (r) 2143 - return r; 2137 + amdgpu_ttm_training_data_block_init(adev); 2138 + ctx->init = PSP_MEM_TRAIN_RESERVE_SUCCESS; 2144 2139 } 2145 - 2146 - r = amdgpu_ttm_mark_vram_reserved(adev, AMDGPU_RESV_STOLEN_VGA); 2147 - if (r) 2148 - return r; 2149 - 2150 - r = amdgpu_ttm_mark_vram_reserved(adev, AMDGPU_RESV_STOLEN_EXTENDED); 2151 - if (r) 2152 - return r; 2153 - 2154 - r = amdgpu_ttm_mark_vram_reserved(adev, AMDGPU_RESV_STOLEN_RESERVED); 2155 - if (r) 2156 - return r; 2157 2140 2158 2141 dev_info(adev->dev, " %uM of VRAM memory ready\n", 2159 2142 (unsigned int)(adev->gmc.real_vram_size / (1024 * 1024)));