tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:
"Nothing major, some left-overs from the recent merging window (MTE,
coco) and some newly found issues like the ptrace() ones.

- MTE/hugetlbfs:

- Set VM_MTE_ALLOWED in the arch code and remove it from the core
code for hugetlbfs mappings

- Fix copy_highpage() warning when the source is a huge page but
not MTE tagged, taking the wrong small page path

- drivers/virt/coco:

- Add the pKVM and Arm CCA drivers under the arm64 maintainership

- Fix the pkvm driver to fall back to ioremap() (and warn) if the
MMIO_GUARD hypercall fails

- Keep the Arm CCA driver default 'n' rather than 'm'

- A series of fixes for the arm64 ptrace() implementation,
potentially leading to the kernel consuming uninitialised stack
variables when PTRACE_SETREGSET is invoked with a length of 0

- Fix zone_dma_limit calculation when RAM starts below 4GB and
ZONE_DMA is capped to this limit

- Fix early boot warning with CONFIG_DEBUG_VIRTUAL=y triggered by a
call to page_to_phys() (from patch_map()) which checks pfn_valid()
before vmemmap has been set up

- Do not clobber bits 15:8 of the ASID used for TTBR1_EL1 and TLBI
ops when the kernel assumes 8-bit ASIDs but running under a
hypervisor on a system that implements 16-bit ASIDs (found running
Linux under Parallels on Apple M4)

- ACPI/IORT: Add PMCG platform information for HiSilicon HIP09A as it
is using the same SMMU PMCG as HIP09 and suffers from the same
errata

- Add GCS to cpucap_is_possible(), missed in the recent merge"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: ptrace: fix partial SETREGSET for NT_ARM_GCS
arm64: ptrace: fix partial SETREGSET for NT_ARM_POE
arm64: ptrace: fix partial SETREGSET for NT_ARM_FPMR
arm64: ptrace: fix partial SETREGSET for NT_ARM_TAGGED_ADDR_CTRL
arm64: cpufeature: Add GCS to cpucap_is_possible()
coco: virt: arm64: Do not enable cca guest driver by default
arm64: mte: Fix copy_highpage() warning on hugetlb folios
arm64: Ensure bits ASID[15:8] are masked out when the kernel uses 8-bit ASIDs
ACPI/IORT: Add PMCG platform information for HiSilicon HIP09A
MAINTAINERS: Add CCA and pKVM CoCO guest support to the ARM64 entry
drivers/virt: pkvm: Don't fail ioremap() call if MMIO_GUARD fails
arm64: patching: avoid early page_to_phys()
arm64: mm: Fix zone_dma_limit calculation
arm64: mte: set VM_MTE_ALLOWED for hugetlbfs at correct place

Linus Torvalds f3ddc438 ddfc146e

+67 -45
+3 -2
Documentation/arch/arm64/silicon-errata.rst
··· 255 255 +----------------+-----------------+-----------------+-----------------------------+ 256 256 | Hisilicon | Hip08 SMMU PMCG | #162001800 | N/A | 257 257 +----------------+-----------------+-----------------+-----------------------------+ 258 - | Hisilicon | Hip{08,09,10,10C| #162001900 | N/A | 259 - | | ,11} SMMU PMCG | | | 258 + | Hisilicon | Hip{08,09,09A,10| #162001900 | N/A | 259 + | | ,10C,11} | | | 260 + | | SMMU PMCG | | | 260 261 +----------------+-----------------+-----------------+-----------------------------+ 261 262 | Hisilicon | Hip09 | #162100801 | HISILICON_ERRATUM_162100801 | 262 263 +----------------+-----------------+-----------------+-----------------------------+
+2
MAINTAINERS
··· 3376 3376 T: git git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git 3377 3377 F: Documentation/arch/arm64/ 3378 3378 F: arch/arm64/ 3379 + F: drivers/virt/coco/arm-cca-guest/ 3380 + F: drivers/virt/coco/pkvm-guest/ 3379 3381 F: tools/testing/selftests/arm64/ 3380 3382 X: arch/arm64/boot/dts/ 3381 3383
+2
arch/arm64/include/asm/cpucaps.h
··· 44 44 return IS_ENABLED(CONFIG_ARM64_TLB_RANGE); 45 45 case ARM64_HAS_S1POE: 46 46 return IS_ENABLED(CONFIG_ARM64_POE); 47 + case ARM64_HAS_GCS: 48 + return IS_ENABLED(CONFIG_ARM64_GCS); 47 49 case ARM64_UNMAP_KERNEL_AT_EL0: 48 50 return IS_ENABLED(CONFIG_UNMAP_KERNEL_AT_EL0); 49 51 case ARM64_WORKAROUND_843419:
+1 -2
arch/arm64/include/asm/cpufeature.h
··· 847 847 848 848 static inline bool system_supports_gcs(void) 849 849 { 850 - return IS_ENABLED(CONFIG_ARM64_GCS) && 851 - alternative_has_cap_unlikely(ARM64_HAS_GCS); 850 + return alternative_has_cap_unlikely(ARM64_HAS_GCS); 852 851 } 853 852 854 853 static inline bool system_supports_haft(void)
+2 -1
arch/arm64/include/asm/mman.h
··· 7 7 #ifndef BUILD_VDSO 8 8 #include <linux/compiler.h> 9 9 #include <linux/fs.h> 10 + #include <linux/hugetlb.h> 10 11 #include <linux/shmem_fs.h> 11 12 #include <linux/types.h> 12 13 ··· 45 44 if (system_supports_mte()) { 46 45 if (flags & (MAP_ANONYMOUS | MAP_HUGETLB)) 47 46 return VM_MTE_ALLOWED; 48 - if (shmem_file(file)) 47 + if (shmem_file(file) || is_file_hugepages(file)) 49 48 return VM_MTE_ALLOWED; 50 49 } 51 50
+9 -12
arch/arm64/kernel/patching.c
··· 30 30 31 31 static void __kprobes *patch_map(void *addr, int fixmap) 32 32 { 33 - unsigned long uintaddr = (uintptr_t) addr; 34 - bool image = is_image_text(uintaddr); 35 - struct page *page; 33 + phys_addr_t phys; 36 34 37 - if (image) 38 - page = phys_to_page(__pa_symbol(addr)); 39 - else if (IS_ENABLED(CONFIG_EXECMEM)) 40 - page = vmalloc_to_page(addr); 41 - else 42 - return addr; 35 + if (is_image_text((unsigned long)addr)) { 36 + phys = __pa_symbol(addr); 37 + } else { 38 + struct page *page = vmalloc_to_page(addr); 39 + BUG_ON(!page); 40 + phys = page_to_phys(page) + offset_in_page(addr); 41 + } 43 42 44 - BUG_ON(!page); 45 - return (void *)set_fixmap_offset(fixmap, page_to_phys(page) + 46 - (uintaddr & ~PAGE_MASK)); 43 + return (void *)set_fixmap_offset(fixmap, phys); 47 44 } 48 45 49 46 static void __kprobes patch_unmap(int fixmap)
+29 -7
arch/arm64/kernel/ptrace.c
··· 720 720 if (!system_supports_fpmr()) 721 721 return -EINVAL; 722 722 723 + fpmr = target->thread.uw.fpmr; 724 + 723 725 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fpmr, 0, count); 724 726 if (ret) 725 727 return ret; ··· 1429 1427 { 1430 1428 long ctrl = get_tagged_addr_ctrl(target); 1431 1429 1432 - if (IS_ERR_VALUE(ctrl)) 1430 + if (WARN_ON_ONCE(IS_ERR_VALUE(ctrl))) 1433 1431 return ctrl; 1434 1432 1435 1433 return membuf_write(&to, &ctrl, sizeof(ctrl)); ··· 1442 1440 { 1443 1441 int ret; 1444 1442 long ctrl; 1443 + 1444 + ctrl = get_tagged_addr_ctrl(target); 1445 + if (WARN_ON_ONCE(IS_ERR_VALUE(ctrl))) 1446 + return ctrl; 1445 1447 1446 1448 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1); 1447 1449 if (ret) ··· 1478 1472 if (!system_supports_poe()) 1479 1473 return -EINVAL; 1480 1474 1475 + ctrl = target->thread.por_el0; 1476 + 1481 1477 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1); 1482 1478 if (ret) 1483 1479 return ret; ··· 1491 1483 #endif 1492 1484 1493 1485 #ifdef CONFIG_ARM64_GCS 1486 + static void task_gcs_to_user(struct user_gcs *user_gcs, 1487 + const struct task_struct *target) 1488 + { 1489 + user_gcs->features_enabled = target->thread.gcs_el0_mode; 1490 + user_gcs->features_locked = target->thread.gcs_el0_locked; 1491 + user_gcs->gcspr_el0 = target->thread.gcspr_el0; 1492 + } 1493 + 1494 + static void task_gcs_from_user(struct task_struct *target, 1495 + const struct user_gcs *user_gcs) 1496 + { 1497 + target->thread.gcs_el0_mode = user_gcs->features_enabled; 1498 + target->thread.gcs_el0_locked = user_gcs->features_locked; 1499 + target->thread.gcspr_el0 = user_gcs->gcspr_el0; 1500 + } 1501 + 1494 1502 static int gcs_get(struct task_struct *target, 1495 1503 const struct user_regset *regset, 1496 1504 struct membuf to) ··· 1519 1495 if (target == current) 1520 1496 gcs_preserve_current_state(); 1521 1497 1522 - user_gcs.features_enabled = target->thread.gcs_el0_mode; 1523 - user_gcs.features_locked = target->thread.gcs_el0_locked; 1524 - user_gcs.gcspr_el0 = target->thread.gcspr_el0; 1498 + task_gcs_to_user(&user_gcs, target); 1525 1499 1526 1500 return membuf_write(&to, &user_gcs, sizeof(user_gcs)); 1527 1501 } ··· 1535 1513 if (!system_supports_gcs()) 1536 1514 return -EINVAL; 1537 1515 1516 + task_gcs_to_user(&user_gcs, target); 1517 + 1538 1518 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &user_gcs, 0, -1); 1539 1519 if (ret) 1540 1520 return ret; ··· 1544 1520 if (user_gcs.features_enabled & ~PR_SHADOW_STACK_SUPPORTED_STATUS_MASK) 1545 1521 return -EINVAL; 1546 1522 1547 - target->thread.gcs_el0_mode = user_gcs.features_enabled; 1548 - target->thread.gcs_el0_locked = user_gcs.features_locked; 1549 - target->thread.gcspr_el0 = user_gcs.gcspr_el0; 1523 + task_gcs_from_user(target, &user_gcs); 1550 1524 1551 1525 return 0; 1552 1526 }
+2 -2
arch/arm64/mm/context.c
··· 32 32 static unsigned long *pinned_asid_map; 33 33 34 34 #define ASID_MASK (~GENMASK(asid_bits - 1, 0)) 35 - #define ASID_FIRST_VERSION (1UL << asid_bits) 35 + #define ASID_FIRST_VERSION (1UL << 16) 36 36 37 - #define NUM_USER_ASIDS ASID_FIRST_VERSION 37 + #define NUM_USER_ASIDS (1UL << asid_bits) 38 38 #define ctxid2asid(asid) ((asid) & ~ASID_MASK) 39 39 #define asid2ctxid(asid, genid) ((asid) | (genid)) 40 40
+5 -3
arch/arm64/mm/copypage.c
··· 30 30 if (!system_supports_mte()) 31 31 return; 32 32 33 - if (folio_test_hugetlb(src) && 34 - folio_test_hugetlb_mte_tagged(src)) { 35 - if (!folio_try_hugetlb_mte_tagging(dst)) 33 + if (folio_test_hugetlb(src)) { 34 + if (!folio_test_hugetlb_mte_tagged(src) || 35 + from != folio_page(src, 0)) 36 36 return; 37 + 38 + WARN_ON_ONCE(!folio_try_hugetlb_mte_tagging(dst)); 37 39 38 40 /* 39 41 * Populate tags for all subpages.
+8 -9
arch/arm64/mm/init.c
··· 117 117 118 118 static phys_addr_t __init max_zone_phys(phys_addr_t zone_limit) 119 119 { 120 - /** 121 - * Information we get from firmware (e.g. DT dma-ranges) describe DMA 122 - * bus constraints. Devices using DMA might have their own limitations. 123 - * Some of them rely on DMA zone in low 32-bit memory. Keep low RAM 124 - * DMA zone on platforms that have RAM there. 125 - */ 126 - if (memblock_start_of_DRAM() < U32_MAX) 127 - zone_limit = min(zone_limit, U32_MAX); 128 - 129 120 return min(zone_limit, memblock_end_of_DRAM() - 1) + 1; 130 121 } 131 122 ··· 132 141 acpi_zone_dma_limit = acpi_iort_dma_get_max_cpu_address(); 133 142 dt_zone_dma_limit = of_dma_get_max_cpu_address(NULL); 134 143 zone_dma_limit = min(dt_zone_dma_limit, acpi_zone_dma_limit); 144 + /* 145 + * Information we get from firmware (e.g. DT dma-ranges) describe DMA 146 + * bus constraints. Devices using DMA might have their own limitations. 147 + * Some of them rely on DMA zone in low 32-bit memory. Keep low RAM 148 + * DMA zone on platforms that have RAM there. 149 + */ 150 + if (memblock_start_of_DRAM() < U32_MAX) 151 + zone_dma_limit = min(zone_dma_limit, U32_MAX); 135 152 arm64_dma_phys_limit = max_zone_phys(zone_dma_limit); 136 153 max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit); 137 154 #endif
+2
drivers/acpi/arm64/iort.c
··· 1716 1716 /* HiSilicon Hip09 Platform */ 1717 1717 {"HISI ", "HIP09 ", 0, ACPI_SIG_IORT, greater_than_or_equal, 1718 1718 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09}, 1719 + {"HISI ", "HIP09A ", 0, ACPI_SIG_IORT, greater_than_or_equal, 1720 + "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09}, 1719 1721 /* HiSilicon Hip10/11 Platform uses the same SMMU IP with Hip09 */ 1720 1722 {"HISI ", "HIP10 ", 0, ACPI_SIG_IORT, greater_than_or_equal, 1721 1723 "Erratum #162001900", IORT_SMMU_V3_PMCG_HISI_HIP09},
-1
drivers/virt/coco/arm-cca-guest/Kconfig
··· 1 1 config ARM_CCA_GUEST 2 2 tristate "Arm CCA Guest driver" 3 3 depends on ARM64 4 - default m 5 4 select TSM_REPORTS 6 5 help 7 6 The driver provides userspace interface to request and
+1 -5
drivers/virt/coco/pkvm-guest/arm-pkvm-guest.c
··· 87 87 88 88 while (phys < end) { 89 89 const int func_id = ARM_SMCCC_VENDOR_HYP_KVM_MMIO_GUARD_FUNC_ID; 90 - int err; 91 90 92 - err = arm_smccc_do_one_page(func_id, phys); 93 - if (err) 94 - return err; 95 - 91 + WARN_ON_ONCE(arm_smccc_do_one_page(func_id, phys)); 96 92 phys += PAGE_SIZE; 97 93 } 98 94
+1 -1
fs/hugetlbfs/inode.c
··· 113 113 * way when do_mmap unwinds (may be important on powerpc 114 114 * and ia64). 115 115 */ 116 - vm_flags_set(vma, VM_HUGETLB | VM_DONTEXPAND | VM_MTE_ALLOWED); 116 + vm_flags_set(vma, VM_HUGETLB | VM_DONTEXPAND); 117 117 vma->vm_ops = &hugetlb_vm_ops; 118 118 119 119 ret = seal_check_write(info->seals, vma);