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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
Merge branch 'net-stmmac-rk-much-needed-cleanups'
Russell King says:
====================
net: stmmac: rk: much needed cleanups
This series starts attacking the reams of fairly identical duplicated
code in dwmac-rk. Every new SoC that comes along seems to need more
code added to this file because e.g. the way the clock is controlled
is different in every SoC.
The first thing to realise is that the driver only supports RMII and
RGMII interface modes. So, the first patch adds a .get_interfaces()
implementation which reports this for phylink's usage, thus ensuring
that we error out during initialisation should something that isn't
supported be specified. Note that there is one case where there are
a pair of interfaces, one supports only RMII the other supports RMII
and RGMII, but we report both anyway - something that the existing
driver allows. A future patch may attempt to fix this.
Rather than writing code, let's realise that there are two major
implementations here:
1. a struct clk that needs to be set.
2. writing a register with settings for RGMII and RMII speeds.
Provide implementations for these, Also realise that as a result
of doing this, we can kill off the .set_rgmii_speed() and
.set_rmii_speed() methods by combining them together - indeed,
this is what later SoCs already do by pointing both these methods
at the same function.
Overall, this patch series shrinks the file LOC by almost 8.7%
by removing 175 lines from over 2000 lines.
Apart from the error reporting changing and restricting interface
modes to those that the driver supports, no functional change is
anticipated with this patch. However, I have no hardware to test
this.
====================
Link: https://patch.msgid.link/aEr1BhIoC6-UM2XV@shell.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+264
-439
+264
-439
drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+264
-439
drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
···
24
24
#include "stmmac_platform.h"
25
25
26
26
struct rk_priv_data;
27
+
28
+
struct rk_reg_speed_data {
29
+
unsigned int rgmii_10;
30
+
unsigned int rgmii_100;
31
+
unsigned int rgmii_1000;
32
+
unsigned int rmii_10;
33
+
unsigned int rmii_100;
34
+
};
35
+
27
36
struct rk_gmac_ops {
28
37
void (*set_to_rgmii)(struct rk_priv_data *bsp_priv,
29
38
int tx_delay, int rx_delay);
30
39
void (*set_to_rmii)(struct rk_priv_data *bsp_priv);
31
-
void (*set_rgmii_speed)(struct rk_priv_data *bsp_priv, int speed);
32
-
void (*set_rmii_speed)(struct rk_priv_data *bsp_priv, int speed);
40
+
int (*set_speed)(struct rk_priv_data *bsp_priv,
41
+
phy_interface_t interface, int speed);
33
42
void (*set_clock_selection)(struct rk_priv_data *bsp_priv, bool input,
34
43
bool enable);
35
44
void (*integrated_phy_powerup)(struct rk_priv_data *bsp_priv);
···
91
82
struct regmap *grf;
92
83
struct regmap *php_grf;
93
84
};
85
+
86
+
static int rk_set_reg_speed(struct rk_priv_data *bsp_priv,
87
+
const struct rk_reg_speed_data *rsd,
88
+
unsigned int reg, phy_interface_t interface,
89
+
int speed)
90
+
{
91
+
unsigned int val;
92
+
93
+
if (phy_interface_mode_is_rgmii(interface)) {
94
+
if (speed == SPEED_10) {
95
+
val = rsd->rgmii_10;
96
+
} else if (speed == SPEED_100) {
97
+
val = rsd->rgmii_100;
98
+
} else if (speed == SPEED_1000) {
99
+
val = rsd->rgmii_1000;
100
+
} else {
101
+
/* Phylink will not allow inappropriate speeds for
102
+
* interface modes, so this should never happen.
103
+
*/
104
+
return -EINVAL;
105
+
}
106
+
} else if (interface == PHY_INTERFACE_MODE_RMII) {
107
+
if (speed == SPEED_10) {
108
+
val = rsd->rmii_10;
109
+
} else if (speed == SPEED_100) {
110
+
val = rsd->rmii_100;
111
+
} else {
112
+
/* Phylink will not allow inappropriate speeds for
113
+
* interface modes, so this should never happen.
114
+
*/
115
+
return -EINVAL;
116
+
}
117
+
} else {
118
+
/* This should never happen, as .get_interfaces() limits
119
+
* the interface modes that are supported to RGMII and/or
120
+
* RMII.
121
+
*/
122
+
return -EINVAL;
123
+
}
124
+
125
+
regmap_write(bsp_priv->grf, reg, val);
126
+
127
+
return 0;
128
+
129
+
}
130
+
131
+
static int rk_set_clk_mac_speed(struct rk_priv_data *bsp_priv,
132
+
phy_interface_t interface, int speed)
133
+
{
134
+
struct clk *clk_mac_speed = bsp_priv->clks[RK_CLK_MAC_SPEED].clk;
135
+
long rate;
136
+
137
+
rate = rgmii_clock(speed);
138
+
if (rate < 0)
139
+
return rate;
140
+
141
+
return clk_set_rate(clk_mac_speed, rate);
142
+
}
94
143
95
144
#define HIWORD_UPDATE(val, mask, shift) \
96
145
((val) << (shift) | (mask) << ((shift) + 16))
···
244
177
PX30_GMAC_PHY_INTF_SEL_RMII);
245
178
}
246
179
247
-
static void px30_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
180
+
static int px30_set_speed(struct rk_priv_data *bsp_priv,
181
+
phy_interface_t interface, int speed)
248
182
{
249
183
struct clk *clk_mac_speed = bsp_priv->clks[RK_CLK_MAC_SPEED].clk;
250
184
struct device *dev = &bsp_priv->pdev->dev;
251
-
int ret;
185
+
unsigned int con1;
186
+
long rate;
252
187
253
188
if (!clk_mac_speed) {
254
189
dev_err(dev, "%s: Missing clk_mac_speed clock\n", __func__);
255
-
return;
190
+
return -EINVAL;
256
191
}
257
192
258
193
if (speed == 10) {
259
-
regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1,
260
-
PX30_GMAC_SPEED_10M);
261
-
262
-
ret = clk_set_rate(clk_mac_speed, 2500000);
263
-
if (ret)
264
-
dev_err(dev, "%s: set clk_mac_speed rate 2500000 failed: %d\n",
265
-
__func__, ret);
194
+
con1 = PX30_GMAC_SPEED_10M;
195
+
rate = 2500000;
266
196
} else if (speed == 100) {
267
-
regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1,
268
-
PX30_GMAC_SPEED_100M);
269
-
270
-
ret = clk_set_rate(clk_mac_speed, 25000000);
271
-
if (ret)
272
-
dev_err(dev, "%s: set clk_mac_speed rate 25000000 failed: %d\n",
273
-
__func__, ret);
274
-
197
+
con1 = PX30_GMAC_SPEED_100M;
198
+
rate = 25000000;
275
199
} else {
276
200
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
201
+
return -EINVAL;
277
202
}
203
+
204
+
regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, con1);
205
+
206
+
return clk_set_rate(clk_mac_speed, rate);
278
207
}
279
208
280
209
static const struct rk_gmac_ops px30_ops = {
281
210
.set_to_rmii = px30_set_to_rmii,
282
-
.set_rmii_speed = px30_set_rmii_speed,
211
+
.set_speed = px30_set_speed,
283
212
};
284
213
285
214
#define RK3128_GRF_MAC_CON0 0x0168
···
324
261
RK3128_GMAC_PHY_INTF_SEL_RMII | RK3128_GMAC_RMII_MODE);
325
262
}
326
263
327
-
static void rk3128_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
264
+
static const struct rk_reg_speed_data rk3128_reg_speed_data = {
265
+
.rgmii_10 = RK3128_GMAC_CLK_2_5M,
266
+
.rgmii_100 = RK3128_GMAC_CLK_25M,
267
+
.rgmii_1000 = RK3128_GMAC_CLK_125M,
268
+
.rmii_10 = RK3128_GMAC_RMII_CLK_2_5M | RK3128_GMAC_SPEED_10M,
269
+
.rmii_100 = RK3128_GMAC_RMII_CLK_25M | RK3128_GMAC_SPEED_100M,
270
+
};
271
+
272
+
static int rk3128_set_speed(struct rk_priv_data *bsp_priv,
273
+
phy_interface_t interface, int speed)
328
274
{
329
-
struct device *dev = &bsp_priv->pdev->dev;
330
-
331
-
if (speed == 10)
332
-
regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1,
333
-
RK3128_GMAC_CLK_2_5M);
334
-
else if (speed == 100)
335
-
regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1,
336
-
RK3128_GMAC_CLK_25M);
337
-
else if (speed == 1000)
338
-
regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1,
339
-
RK3128_GMAC_CLK_125M);
340
-
else
341
-
dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);
342
-
}
343
-
344
-
static void rk3128_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
345
-
{
346
-
struct device *dev = &bsp_priv->pdev->dev;
347
-
348
-
if (speed == 10) {
349
-
regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1,
350
-
RK3128_GMAC_RMII_CLK_2_5M |
351
-
RK3128_GMAC_SPEED_10M);
352
-
} else if (speed == 100) {
353
-
regmap_write(bsp_priv->grf, RK3128_GRF_MAC_CON1,
354
-
RK3128_GMAC_RMII_CLK_25M |
355
-
RK3128_GMAC_SPEED_100M);
356
-
} else {
357
-
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
358
-
}
275
+
return rk_set_reg_speed(bsp_priv, &rk3128_reg_speed_data,
276
+
RK3128_GRF_MAC_CON1, interface, speed);
359
277
}
360
278
361
279
static const struct rk_gmac_ops rk3128_ops = {
362
280
.set_to_rgmii = rk3128_set_to_rgmii,
363
281
.set_to_rmii = rk3128_set_to_rmii,
364
-
.set_rgmii_speed = rk3128_set_rgmii_speed,
365
-
.set_rmii_speed = rk3128_set_rmii_speed,
282
+
.set_speed = rk3128_set_speed,
366
283
};
367
284
368
285
#define RK3228_GRF_MAC_CON0 0x0900
···
401
358
regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1, GRF_BIT(11));
402
359
}
403
360
404
-
static void rk3228_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
361
+
static const struct rk_reg_speed_data rk3228_reg_speed_data = {
362
+
.rgmii_10 = RK3228_GMAC_CLK_2_5M,
363
+
.rgmii_100 = RK3228_GMAC_CLK_25M,
364
+
.rgmii_1000 = RK3228_GMAC_CLK_125M,
365
+
.rmii_10 = RK3228_GMAC_RMII_CLK_2_5M | RK3228_GMAC_SPEED_10M,
366
+
.rmii_100 = RK3228_GMAC_RMII_CLK_25M | RK3228_GMAC_SPEED_100M,
367
+
};
368
+
369
+
static int rk3228_set_speed(struct rk_priv_data *bsp_priv,
370
+
phy_interface_t interface, int speed)
405
371
{
406
-
struct device *dev = &bsp_priv->pdev->dev;
407
-
408
-
if (speed == 10)
409
-
regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1,
410
-
RK3228_GMAC_CLK_2_5M);
411
-
else if (speed == 100)
412
-
regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1,
413
-
RK3228_GMAC_CLK_25M);
414
-
else if (speed == 1000)
415
-
regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1,
416
-
RK3228_GMAC_CLK_125M);
417
-
else
418
-
dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);
419
-
}
420
-
421
-
static void rk3228_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
422
-
{
423
-
struct device *dev = &bsp_priv->pdev->dev;
424
-
425
-
if (speed == 10)
426
-
regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1,
427
-
RK3228_GMAC_RMII_CLK_2_5M |
428
-
RK3228_GMAC_SPEED_10M);
429
-
else if (speed == 100)
430
-
regmap_write(bsp_priv->grf, RK3228_GRF_MAC_CON1,
431
-
RK3228_GMAC_RMII_CLK_25M |
432
-
RK3228_GMAC_SPEED_100M);
433
-
else
434
-
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
372
+
return rk_set_reg_speed(bsp_priv, &rk3228_reg_speed_data,
373
+
RK3228_GRF_MAC_CON1, interface, speed);
435
374
}
436
375
437
376
static void rk3228_integrated_phy_powerup(struct rk_priv_data *priv)
···
427
402
static const struct rk_gmac_ops rk3228_ops = {
428
403
.set_to_rgmii = rk3228_set_to_rgmii,
429
404
.set_to_rmii = rk3228_set_to_rmii,
430
-
.set_rgmii_speed = rk3228_set_rgmii_speed,
431
-
.set_rmii_speed = rk3228_set_rmii_speed,
405
+
.set_speed = rk3228_set_speed,
432
406
.integrated_phy_powerup = rk3228_integrated_phy_powerup,
433
407
.integrated_phy_powerdown = rk_gmac_integrated_ephy_powerdown,
434
408
};
···
478
454
RK3288_GMAC_PHY_INTF_SEL_RMII | RK3288_GMAC_RMII_MODE);
479
455
}
480
456
481
-
static void rk3288_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
457
+
static const struct rk_reg_speed_data rk3288_reg_speed_data = {
458
+
.rgmii_10 = RK3288_GMAC_CLK_2_5M,
459
+
.rgmii_100 = RK3288_GMAC_CLK_25M,
460
+
.rgmii_1000 = RK3288_GMAC_CLK_125M,
461
+
.rmii_10 = RK3288_GMAC_RMII_CLK_2_5M | RK3288_GMAC_SPEED_10M,
462
+
.rmii_100 = RK3288_GMAC_RMII_CLK_25M | RK3288_GMAC_SPEED_100M,
463
+
};
464
+
465
+
static int rk3288_set_speed(struct rk_priv_data *bsp_priv,
466
+
phy_interface_t interface, int speed)
482
467
{
483
-
struct device *dev = &bsp_priv->pdev->dev;
484
-
485
-
if (speed == 10)
486
-
regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
487
-
RK3288_GMAC_CLK_2_5M);
488
-
else if (speed == 100)
489
-
regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
490
-
RK3288_GMAC_CLK_25M);
491
-
else if (speed == 1000)
492
-
regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
493
-
RK3288_GMAC_CLK_125M);
494
-
else
495
-
dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);
496
-
}
497
-
498
-
static void rk3288_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
499
-
{
500
-
struct device *dev = &bsp_priv->pdev->dev;
501
-
502
-
if (speed == 10) {
503
-
regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
504
-
RK3288_GMAC_RMII_CLK_2_5M |
505
-
RK3288_GMAC_SPEED_10M);
506
-
} else if (speed == 100) {
507
-
regmap_write(bsp_priv->grf, RK3288_GRF_SOC_CON1,
508
-
RK3288_GMAC_RMII_CLK_25M |
509
-
RK3288_GMAC_SPEED_100M);
510
-
} else {
511
-
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
512
-
}
468
+
return rk_set_reg_speed(bsp_priv, &rk3288_reg_speed_data,
469
+
RK3288_GRF_SOC_CON1, interface, speed);
513
470
}
514
471
515
472
static const struct rk_gmac_ops rk3288_ops = {
516
473
.set_to_rgmii = rk3288_set_to_rgmii,
517
474
.set_to_rmii = rk3288_set_to_rmii,
518
-
.set_rgmii_speed = rk3288_set_rgmii_speed,
519
-
.set_rmii_speed = rk3288_set_rmii_speed,
475
+
.set_speed = rk3288_set_speed,
520
476
};
521
477
522
478
#define RK3308_GRF_MAC_CON0 0x04a0
···
515
511
RK3308_GMAC_PHY_INTF_SEL_RMII);
516
512
}
517
513
518
-
static void rk3308_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
519
-
{
520
-
struct device *dev = &bsp_priv->pdev->dev;
514
+
static const struct rk_reg_speed_data rk3308_reg_speed_data = {
515
+
.rmii_10 = RK3308_GMAC_SPEED_10M,
516
+
.rmii_100 = RK3308_GMAC_SPEED_100M,
517
+
};
521
518
522
-
if (speed == 10) {
523
-
regmap_write(bsp_priv->grf, RK3308_GRF_MAC_CON0,
524
-
RK3308_GMAC_SPEED_10M);
525
-
} else if (speed == 100) {
526
-
regmap_write(bsp_priv->grf, RK3308_GRF_MAC_CON0,
527
-
RK3308_GMAC_SPEED_100M);
528
-
} else {
529
-
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
530
-
}
519
+
static int rk3308_set_speed(struct rk_priv_data *bsp_priv,
520
+
phy_interface_t interface, int speed)
521
+
{
522
+
return rk_set_reg_speed(bsp_priv, &rk3308_reg_speed_data,
523
+
RK3308_GRF_MAC_CON0, interface, speed);
531
524
}
532
525
533
526
static const struct rk_gmac_ops rk3308_ops = {
534
527
.set_to_rmii = rk3308_set_to_rmii,
535
-
.set_rmii_speed = rk3308_set_rmii_speed,
528
+
.set_speed = rk3308_set_speed,
536
529
};
537
530
538
531
#define RK3328_GRF_MAC_CON0 0x0900
···
591
590
RK3328_GMAC_RMII_MODE);
592
591
}
593
592
594
-
static void rk3328_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
595
-
{
596
-
struct device *dev = &bsp_priv->pdev->dev;
593
+
static const struct rk_reg_speed_data rk3328_reg_speed_data = {
594
+
.rgmii_10 = RK3328_GMAC_CLK_2_5M,
595
+
.rgmii_100 = RK3328_GMAC_CLK_25M,
596
+
.rgmii_1000 = RK3328_GMAC_CLK_125M,
597
+
.rmii_10 = RK3328_GMAC_RMII_CLK_2_5M | RK3328_GMAC_SPEED_10M,
598
+
.rmii_100 = RK3328_GMAC_RMII_CLK_25M | RK3328_GMAC_SPEED_100M,
599
+
};
597
600
598
-
if (speed == 10)
599
-
regmap_write(bsp_priv->grf, RK3328_GRF_MAC_CON1,
600
-
RK3328_GMAC_CLK_2_5M);
601
-
else if (speed == 100)
602
-
regmap_write(bsp_priv->grf, RK3328_GRF_MAC_CON1,
603
-
RK3328_GMAC_CLK_25M);
604
-
else if (speed == 1000)
605
-
regmap_write(bsp_priv->grf, RK3328_GRF_MAC_CON1,
606
-
RK3328_GMAC_CLK_125M);
607
-
else
608
-
dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);
609
-
}
610
-
611
-
static void rk3328_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
601
+
static int rk3328_set_speed(struct rk_priv_data *bsp_priv,
602
+
phy_interface_t interface, int speed)
612
603
{
613
-
struct device *dev = &bsp_priv->pdev->dev;
614
604
unsigned int reg;
615
605
616
-
reg = bsp_priv->integrated_phy ? RK3328_GRF_MAC_CON2 :
617
-
RK3328_GRF_MAC_CON1;
618
-
619
-
if (speed == 10)
620
-
regmap_write(bsp_priv->grf, reg,
621
-
RK3328_GMAC_RMII_CLK_2_5M |
622
-
RK3328_GMAC_SPEED_10M);
623
-
else if (speed == 100)
624
-
regmap_write(bsp_priv->grf, reg,
625
-
RK3328_GMAC_RMII_CLK_25M |
626
-
RK3328_GMAC_SPEED_100M);
606
+
if (interface == PHY_INTERFACE_MODE_RMII && bsp_priv->integrated_phy)
607
+
reg = RK3328_GRF_MAC_CON2;
627
608
else
628
-
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
609
+
reg = RK3328_GRF_MAC_CON1;
610
+
611
+
return rk_set_reg_speed(bsp_priv, &rk3328_reg_speed_data, reg,
612
+
interface, speed);
629
613
}
630
614
631
615
static void rk3328_integrated_phy_powerup(struct rk_priv_data *priv)
···
624
638
static const struct rk_gmac_ops rk3328_ops = {
625
639
.set_to_rgmii = rk3328_set_to_rgmii,
626
640
.set_to_rmii = rk3328_set_to_rmii,
627
-
.set_rgmii_speed = rk3328_set_rgmii_speed,
628
-
.set_rmii_speed = rk3328_set_rmii_speed,
641
+
.set_speed = rk3328_set_speed,
629
642
.integrated_phy_powerup = rk3328_integrated_phy_powerup,
630
643
.integrated_phy_powerdown = rk_gmac_integrated_ephy_powerdown,
631
644
};
···
675
690
RK3366_GMAC_PHY_INTF_SEL_RMII | RK3366_GMAC_RMII_MODE);
676
691
}
677
692
678
-
static void rk3366_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
693
+
static const struct rk_reg_speed_data rk3366_reg_speed_data = {
694
+
.rgmii_10 = RK3366_GMAC_CLK_2_5M,
695
+
.rgmii_100 = RK3366_GMAC_CLK_25M,
696
+
.rgmii_1000 = RK3366_GMAC_CLK_125M,
697
+
.rmii_10 = RK3366_GMAC_RMII_CLK_2_5M | RK3366_GMAC_SPEED_10M,
698
+
.rmii_100 = RK3366_GMAC_RMII_CLK_25M | RK3366_GMAC_SPEED_100M,
699
+
};
700
+
701
+
static int rk3366_set_speed(struct rk_priv_data *bsp_priv,
702
+
phy_interface_t interface, int speed)
679
703
{
680
-
struct device *dev = &bsp_priv->pdev->dev;
681
-
682
-
if (speed == 10)
683
-
regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6,
684
-
RK3366_GMAC_CLK_2_5M);
685
-
else if (speed == 100)
686
-
regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6,
687
-
RK3366_GMAC_CLK_25M);
688
-
else if (speed == 1000)
689
-
regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6,
690
-
RK3366_GMAC_CLK_125M);
691
-
else
692
-
dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);
693
-
}
694
-
695
-
static void rk3366_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
696
-
{
697
-
struct device *dev = &bsp_priv->pdev->dev;
698
-
699
-
if (speed == 10) {
700
-
regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6,
701
-
RK3366_GMAC_RMII_CLK_2_5M |
702
-
RK3366_GMAC_SPEED_10M);
703
-
} else if (speed == 100) {
704
-
regmap_write(bsp_priv->grf, RK3366_GRF_SOC_CON6,
705
-
RK3366_GMAC_RMII_CLK_25M |
706
-
RK3366_GMAC_SPEED_100M);
707
-
} else {
708
-
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
709
-
}
704
+
return rk_set_reg_speed(bsp_priv, &rk3366_reg_speed_data,
705
+
RK3366_GRF_SOC_CON6, interface, speed);
710
706
}
711
707
712
708
static const struct rk_gmac_ops rk3366_ops = {
713
709
.set_to_rgmii = rk3366_set_to_rgmii,
714
710
.set_to_rmii = rk3366_set_to_rmii,
715
-
.set_rgmii_speed = rk3366_set_rgmii_speed,
716
-
.set_rmii_speed = rk3366_set_rmii_speed,
711
+
.set_speed = rk3366_set_speed,
717
712
};
718
713
719
714
#define RK3368_GRF_SOC_CON15 0x043c
···
742
777
RK3368_GMAC_PHY_INTF_SEL_RMII | RK3368_GMAC_RMII_MODE);
743
778
}
744
779
745
-
static void rk3368_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
780
+
static const struct rk_reg_speed_data rk3368_reg_speed_data = {
781
+
.rgmii_10 = RK3368_GMAC_CLK_2_5M,
782
+
.rgmii_100 = RK3368_GMAC_CLK_25M,
783
+
.rgmii_1000 = RK3368_GMAC_CLK_125M,
784
+
.rmii_10 = RK3368_GMAC_RMII_CLK_2_5M | RK3368_GMAC_SPEED_10M,
785
+
.rmii_100 = RK3368_GMAC_RMII_CLK_25M | RK3368_GMAC_SPEED_100M,
786
+
};
787
+
788
+
static int rk3368_set_speed(struct rk_priv_data *bsp_priv,
789
+
phy_interface_t interface, int speed)
746
790
{
747
-
struct device *dev = &bsp_priv->pdev->dev;
748
-
749
-
if (speed == 10)
750
-
regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
751
-
RK3368_GMAC_CLK_2_5M);
752
-
else if (speed == 100)
753
-
regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
754
-
RK3368_GMAC_CLK_25M);
755
-
else if (speed == 1000)
756
-
regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
757
-
RK3368_GMAC_CLK_125M);
758
-
else
759
-
dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);
760
-
}
761
-
762
-
static void rk3368_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
763
-
{
764
-
struct device *dev = &bsp_priv->pdev->dev;
765
-
766
-
if (speed == 10) {
767
-
regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
768
-
RK3368_GMAC_RMII_CLK_2_5M |
769
-
RK3368_GMAC_SPEED_10M);
770
-
} else if (speed == 100) {
771
-
regmap_write(bsp_priv->grf, RK3368_GRF_SOC_CON15,
772
-
RK3368_GMAC_RMII_CLK_25M |
773
-
RK3368_GMAC_SPEED_100M);
774
-
} else {
775
-
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
776
-
}
791
+
return rk_set_reg_speed(bsp_priv, &rk3368_reg_speed_data,
792
+
RK3368_GRF_SOC_CON15, interface, speed);
777
793
}
778
794
779
795
static const struct rk_gmac_ops rk3368_ops = {
780
796
.set_to_rgmii = rk3368_set_to_rgmii,
781
797
.set_to_rmii = rk3368_set_to_rmii,
782
-
.set_rgmii_speed = rk3368_set_rgmii_speed,
783
-
.set_rmii_speed = rk3368_set_rmii_speed,
798
+
.set_speed = rk3368_set_speed,
784
799
};
785
800
786
801
#define RK3399_GRF_SOC_CON5 0xc214
···
809
864
RK3399_GMAC_PHY_INTF_SEL_RMII | RK3399_GMAC_RMII_MODE);
810
865
}
811
866
812
-
static void rk3399_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
867
+
static const struct rk_reg_speed_data rk3399_reg_speed_data = {
868
+
.rgmii_10 = RK3399_GMAC_CLK_2_5M,
869
+
.rgmii_100 = RK3399_GMAC_CLK_25M,
870
+
.rgmii_1000 = RK3399_GMAC_CLK_125M,
871
+
.rmii_10 = RK3399_GMAC_RMII_CLK_2_5M | RK3399_GMAC_SPEED_10M,
872
+
.rmii_100 = RK3399_GMAC_RMII_CLK_25M | RK3399_GMAC_SPEED_100M,
873
+
};
874
+
875
+
static int rk3399_set_speed(struct rk_priv_data *bsp_priv,
876
+
phy_interface_t interface, int speed)
813
877
{
814
-
struct device *dev = &bsp_priv->pdev->dev;
815
-
816
-
if (speed == 10)
817
-
regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5,
818
-
RK3399_GMAC_CLK_2_5M);
819
-
else if (speed == 100)
820
-
regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5,
821
-
RK3399_GMAC_CLK_25M);
822
-
else if (speed == 1000)
823
-
regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5,
824
-
RK3399_GMAC_CLK_125M);
825
-
else
826
-
dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);
827
-
}
828
-
829
-
static void rk3399_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
830
-
{
831
-
struct device *dev = &bsp_priv->pdev->dev;
832
-
833
-
if (speed == 10) {
834
-
regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5,
835
-
RK3399_GMAC_RMII_CLK_2_5M |
836
-
RK3399_GMAC_SPEED_10M);
837
-
} else if (speed == 100) {
838
-
regmap_write(bsp_priv->grf, RK3399_GRF_SOC_CON5,
839
-
RK3399_GMAC_RMII_CLK_25M |
840
-
RK3399_GMAC_SPEED_100M);
841
-
} else {
842
-
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
843
-
}
878
+
return rk_set_reg_speed(bsp_priv, &rk3399_reg_speed_data,
879
+
RK3399_GRF_SOC_CON5, interface, speed);
844
880
}
845
881
846
882
static const struct rk_gmac_ops rk3399_ops = {
847
883
.set_to_rgmii = rk3399_set_to_rgmii,
848
884
.set_to_rmii = rk3399_set_to_rmii,
849
-
.set_rgmii_speed = rk3399_set_rgmii_speed,
850
-
.set_rmii_speed = rk3399_set_rmii_speed,
885
+
.set_speed = rk3399_set_speed,
851
886
};
852
887
853
888
#define RK3528_VO_GRF_GMAC_CON 0x0018
···
890
965
RK3528_GMAC0_CLK_RMII_DIV2);
891
966
}
892
967
893
-
static void rk3528_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
968
+
static const struct rk_reg_speed_data rk3528_gmac0_reg_speed_data = {
969
+
.rmii_10 = RK3528_GMAC0_CLK_RMII_DIV20,
970
+
.rmii_100 = RK3528_GMAC0_CLK_RMII_DIV2,
971
+
};
972
+
973
+
static const struct rk_reg_speed_data rk3528_gmac1_reg_speed_data = {
974
+
.rgmii_10 = RK3528_GMAC1_CLK_RGMII_DIV50,
975
+
.rgmii_100 = RK3528_GMAC1_CLK_RGMII_DIV5,
976
+
.rgmii_1000 = RK3528_GMAC1_CLK_RGMII_DIV1,
977
+
.rmii_10 = RK3528_GMAC1_CLK_RMII_DIV20,
978
+
.rmii_100 = RK3528_GMAC1_CLK_RMII_DIV2,
979
+
};
980
+
981
+
static int rk3528_set_speed(struct rk_priv_data *bsp_priv,
982
+
phy_interface_t interface,int speed)
894
983
{
895
-
struct device *dev = &bsp_priv->pdev->dev;
984
+
const struct rk_reg_speed_data *rsd;
985
+
unsigned int reg;
896
986
897
-
if (speed == 10)
898
-
regmap_write(bsp_priv->grf, RK3528_VPU_GRF_GMAC_CON5,
899
-
RK3528_GMAC1_CLK_RGMII_DIV50);
900
-
else if (speed == 100)
901
-
regmap_write(bsp_priv->grf, RK3528_VPU_GRF_GMAC_CON5,
902
-
RK3528_GMAC1_CLK_RGMII_DIV5);
903
-
else if (speed == 1000)
904
-
regmap_write(bsp_priv->grf, RK3528_VPU_GRF_GMAC_CON5,
905
-
RK3528_GMAC1_CLK_RGMII_DIV1);
906
-
else
907
-
dev_err(dev, "unknown speed value for RGMII! speed=%d", speed);
908
-
}
909
-
910
-
static void rk3528_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
911
-
{
912
-
struct device *dev = &bsp_priv->pdev->dev;
913
-
unsigned int reg, val;
914
-
915
-
if (speed == 10)
916
-
val = bsp_priv->id == 1 ? RK3528_GMAC1_CLK_RMII_DIV20 :
917
-
RK3528_GMAC0_CLK_RMII_DIV20;
918
-
else if (speed == 100)
919
-
val = bsp_priv->id == 1 ? RK3528_GMAC1_CLK_RMII_DIV2 :
920
-
RK3528_GMAC0_CLK_RMII_DIV2;
921
-
else {
922
-
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
923
-
return;
987
+
if (bsp_priv->id == 1) {
988
+
rsd = &rk3528_gmac1_reg_speed_data;
989
+
reg = RK3528_VPU_GRF_GMAC_CON5;
990
+
} else {
991
+
rsd = &rk3528_gmac0_reg_speed_data;
992
+
reg = RK3528_VO_GRF_GMAC_CON;
924
993
}
925
994
926
-
reg = bsp_priv->id == 1 ? RK3528_VPU_GRF_GMAC_CON5 :
927
-
RK3528_VO_GRF_GMAC_CON;
928
-
929
-
regmap_write(bsp_priv->grf, reg, val);
995
+
return rk_set_reg_speed(bsp_priv, rsd, reg, interface, speed);
930
996
}
931
997
932
998
static void rk3528_set_clock_selection(struct rk_priv_data *bsp_priv,
···
951
1035
static const struct rk_gmac_ops rk3528_ops = {
952
1036
.set_to_rgmii = rk3528_set_to_rgmii,
953
1037
.set_to_rmii = rk3528_set_to_rmii,
954
-
.set_rgmii_speed = rk3528_set_rgmii_speed,
955
-
.set_rmii_speed = rk3528_set_rmii_speed,
1038
+
.set_speed = rk3528_set_speed,
956
1039
.set_clock_selection = rk3528_set_clock_selection,
957
1040
.integrated_phy_powerup = rk3528_integrated_phy_powerup,
958
1041
.integrated_phy_powerdown = rk3528_integrated_phy_powerdown,
···
1013
1098
regmap_write(bsp_priv->grf, con1, RK3568_GMAC_PHY_INTF_SEL_RMII);
1014
1099
}
1015
1100
1016
-
static void rk3568_set_gmac_speed(struct rk_priv_data *bsp_priv, int speed)
1017
-
{
1018
-
struct clk *clk_mac_speed = bsp_priv->clks[RK_CLK_MAC_SPEED].clk;
1019
-
struct device *dev = &bsp_priv->pdev->dev;
1020
-
long rate;
1021
-
int ret;
1022
-
1023
-
rate = rgmii_clock(speed);
1024
-
if (rate < 0) {
1025
-
dev_err(dev, "unknown speed value for GMAC speed=%d", speed);
1026
-
return;
1027
-
}
1028
-
1029
-
ret = clk_set_rate(clk_mac_speed, rate);
1030
-
if (ret)
1031
-
dev_err(dev, "%s: set clk_mac_speed rate %ld failed %d\n",
1032
-
__func__, rate, ret);
1033
-
}
1034
-
1035
1101
static const struct rk_gmac_ops rk3568_ops = {
1036
1102
.set_to_rgmii = rk3568_set_to_rgmii,
1037
1103
.set_to_rmii = rk3568_set_to_rmii,
1038
-
.set_rgmii_speed = rk3568_set_gmac_speed,
1039
-
.set_rmii_speed = rk3568_set_gmac_speed,
1104
+
.set_speed = rk_set_clk_mac_speed,
1040
1105
.regs_valid = true,
1041
1106
.regs = {
1042
1107
0xfe2a0000, /* gmac0 */
···
1100
1205
regmap_write(bsp_priv->grf, offset_con, RK3576_GMAC_RMII_MODE);
1101
1206
}
1102
1207
1103
-
static void rk3576_set_gmac_speed(struct rk_priv_data *bsp_priv, int speed)
1104
-
{
1105
-
struct device *dev = &bsp_priv->pdev->dev;
1106
-
unsigned int val = 0, offset_con;
1208
+
static const struct rk_reg_speed_data rk3578_reg_speed_data = {
1209
+
.rgmii_10 = RK3576_GMAC_CLK_RGMII_DIV50,
1210
+
.rgmii_100 = RK3576_GMAC_CLK_RGMII_DIV5,
1211
+
.rgmii_1000 = RK3576_GMAC_CLK_RGMII_DIV1,
1212
+
.rmii_10 = RK3576_GMAC_CLK_RMII_DIV20,
1213
+
.rmii_100 = RK3576_GMAC_CLK_RMII_DIV2,
1214
+
};
1107
1215
1108
-
switch (speed) {
1109
-
case 10:
1110
-
if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII)
1111
-
val = RK3576_GMAC_CLK_RMII_DIV20;
1112
-
else
1113
-
val = RK3576_GMAC_CLK_RGMII_DIV50;
1114
-
break;
1115
-
case 100:
1116
-
if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII)
1117
-
val = RK3576_GMAC_CLK_RMII_DIV2;
1118
-
else
1119
-
val = RK3576_GMAC_CLK_RGMII_DIV5;
1120
-
break;
1121
-
case 1000:
1122
-
if (bsp_priv->phy_iface != PHY_INTERFACE_MODE_RMII)
1123
-
val = RK3576_GMAC_CLK_RGMII_DIV1;
1124
-
else
1125
-
goto err;
1126
-
break;
1127
-
default:
1128
-
goto err;
1129
-
}
1216
+
static int rk3576_set_gmac_speed(struct rk_priv_data *bsp_priv,
1217
+
phy_interface_t interface, int speed)
1218
+
{
1219
+
unsigned int offset_con;
1130
1220
1131
1221
offset_con = bsp_priv->id == 1 ? RK3576_GRF_GMAC_CON1 :
1132
1222
RK3576_GRF_GMAC_CON0;
1133
1223
1134
-
regmap_write(bsp_priv->grf, offset_con, val);
1135
-
1136
-
return;
1137
-
err:
1138
-
dev_err(dev, "unknown speed value for GMAC speed=%d", speed);
1224
+
return rk_set_reg_speed(bsp_priv, &rk3578_reg_speed_data, offset_con,
1225
+
interface, speed);
1139
1226
}
1140
1227
1141
1228
static void rk3576_set_clock_selection(struct rk_priv_data *bsp_priv, bool input,
···
1139
1262
static const struct rk_gmac_ops rk3576_ops = {
1140
1263
.set_to_rgmii = rk3576_set_to_rgmii,
1141
1264
.set_to_rmii = rk3576_set_to_rmii,
1142
-
.set_rgmii_speed = rk3576_set_gmac_speed,
1143
-
.set_rmii_speed = rk3576_set_gmac_speed,
1265
+
.set_speed = rk3576_set_gmac_speed,
1144
1266
.set_clock_selection = rk3576_set_clock_selection,
1145
1267
.php_grf_required = true,
1146
1268
.regs_valid = true,
···
1223
1347
RK3588_GMAC_CLK_RMII_MODE(bsp_priv->id));
1224
1348
}
1225
1349
1226
-
static void rk3588_set_gmac_speed(struct rk_priv_data *bsp_priv, int speed)
1350
+
static int rk3588_set_gmac_speed(struct rk_priv_data *bsp_priv,
1351
+
phy_interface_t interface, int speed)
1227
1352
{
1228
-
struct device *dev = &bsp_priv->pdev->dev;
1229
1353
unsigned int val = 0, id = bsp_priv->id;
1230
1354
1231
1355
switch (speed) {
1232
1356
case 10:
1233
-
if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII)
1357
+
if (interface == PHY_INTERFACE_MODE_RMII)
1234
1358
val = RK3588_GMA_CLK_RMII_DIV20(id);
1235
1359
else
1236
1360
val = RK3588_GMAC_CLK_RGMII_DIV50(id);
1237
1361
break;
1238
1362
case 100:
1239
-
if (bsp_priv->phy_iface == PHY_INTERFACE_MODE_RMII)
1363
+
if (interface == PHY_INTERFACE_MODE_RMII)
1240
1364
val = RK3588_GMA_CLK_RMII_DIV2(id);
1241
1365
else
1242
1366
val = RK3588_GMAC_CLK_RGMII_DIV5(id);
1243
1367
break;
1244
1368
case 1000:
1245
-
if (bsp_priv->phy_iface != PHY_INTERFACE_MODE_RMII)
1369
+
if (interface != PHY_INTERFACE_MODE_RMII)
1246
1370
val = RK3588_GMAC_CLK_RGMII_DIV1(id);
1247
1371
else
1248
1372
goto err;
···
1253
1377
1254
1378
regmap_write(bsp_priv->php_grf, RK3588_GRF_CLK_CON1, val);
1255
1379
1256
-
return;
1380
+
return 0;
1257
1381
err:
1258
-
dev_err(dev, "unknown speed value for GMAC speed=%d", speed);
1382
+
return -EINVAL;
1259
1383
}
1260
1384
1261
1385
static void rk3588_set_clock_selection(struct rk_priv_data *bsp_priv, bool input,
···
1273
1397
static const struct rk_gmac_ops rk3588_ops = {
1274
1398
.set_to_rgmii = rk3588_set_to_rgmii,
1275
1399
.set_to_rmii = rk3588_set_to_rmii,
1276
-
.set_rgmii_speed = rk3588_set_gmac_speed,
1277
-
.set_rmii_speed = rk3588_set_gmac_speed,
1400
+
.set_speed = rk3588_set_gmac_speed,
1278
1401
.set_clock_selection = rk3588_set_clock_selection,
1279
1402
.php_grf_required = true,
1280
1403
.regs_valid = true,
···
1302
1427
RV1108_GMAC_PHY_INTF_SEL_RMII);
1303
1428
}
1304
1429
1305
-
static void rv1108_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
1306
-
{
1307
-
struct device *dev = &bsp_priv->pdev->dev;
1430
+
static const struct rk_reg_speed_data rv1108_reg_speed_data = {
1431
+
.rmii_10 = RV1108_GMAC_RMII_CLK_2_5M | RV1108_GMAC_SPEED_10M,
1432
+
.rmii_100 = RV1108_GMAC_RMII_CLK_25M | RV1108_GMAC_SPEED_100M,
1433
+
};
1308
1434
1309
-
if (speed == 10) {
1310
-
regmap_write(bsp_priv->grf, RV1108_GRF_GMAC_CON0,
1311
-
RV1108_GMAC_RMII_CLK_2_5M |
1312
-
RV1108_GMAC_SPEED_10M);
1313
-
} else if (speed == 100) {
1314
-
regmap_write(bsp_priv->grf, RV1108_GRF_GMAC_CON0,
1315
-
RV1108_GMAC_RMII_CLK_25M |
1316
-
RV1108_GMAC_SPEED_100M);
1317
-
} else {
1318
-
dev_err(dev, "unknown speed value for RMII! speed=%d", speed);
1319
-
}
1435
+
static int rv1108_set_speed(struct rk_priv_data *bsp_priv,
1436
+
phy_interface_t interface, int speed)
1437
+
{
1438
+
return rk_set_reg_speed(bsp_priv, &rv1108_reg_speed_data,
1439
+
RV1108_GRF_GMAC_CON0, interface, speed);
1320
1440
}
1321
1441
1322
1442
static const struct rk_gmac_ops rv1108_ops = {
1323
1443
.set_to_rmii = rv1108_set_to_rmii,
1324
-
.set_rmii_speed = rv1108_set_rmii_speed,
1444
+
.set_speed = rv1108_set_speed,
1325
1445
};
1326
1446
1327
1447
#define RV1126_GRF_GMAC_CON0 0X0070
···
1371
1501
RV1126_GMAC_PHY_INTF_SEL_RMII);
1372
1502
}
1373
1503
1374
-
static void rv1126_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed)
1375
-
{
1376
-
struct clk *clk_mac_speed = bsp_priv->clks[RK_CLK_MAC_SPEED].clk;
1377
-
struct device *dev = &bsp_priv->pdev->dev;
1378
-
long rate;
1379
-
int ret;
1380
-
1381
-
rate = rgmii_clock(speed);
1382
-
if (rate < 0) {
1383
-
dev_err(dev, "unknown speed value for RGMII speed=%d", speed);
1384
-
return;
1385
-
}
1386
-
1387
-
ret = clk_set_rate(clk_mac_speed, rate);
1388
-
if (ret)
1389
-
dev_err(dev, "%s: set clk_mac_speed rate %ld failed %d\n",
1390
-
__func__, rate, ret);
1391
-
}
1392
-
1393
-
static void rv1126_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
1394
-
{
1395
-
struct clk *clk_mac_speed = bsp_priv->clks[RK_CLK_MAC_SPEED].clk;
1396
-
struct device *dev = &bsp_priv->pdev->dev;
1397
-
unsigned long rate;
1398
-
int ret;
1399
-
1400
-
switch (speed) {
1401
-
case 10:
1402
-
rate = 2500000;
1403
-
break;
1404
-
case 100:
1405
-
rate = 25000000;
1406
-
break;
1407
-
default:
1408
-
dev_err(dev, "unknown speed value for RGMII speed=%d", speed);
1409
-
return;
1410
-
}
1411
-
1412
-
ret = clk_set_rate(clk_mac_speed, rate);
1413
-
if (ret)
1414
-
dev_err(dev, "%s: set clk_mac_speed rate %ld failed %d\n",
1415
-
__func__, rate, ret);
1416
-
}
1417
-
1418
1504
static const struct rk_gmac_ops rv1126_ops = {
1419
1505
.set_to_rgmii = rv1126_set_to_rgmii,
1420
1506
.set_to_rmii = rv1126_set_to_rmii,
1421
-
.set_rgmii_speed = rv1126_set_rgmii_speed,
1422
-
.set_rmii_speed = rv1126_set_rmii_speed,
1507
+
.set_speed = rk_set_clk_mac_speed,
1423
1508
};
1424
1509
1425
1510
static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat)
···
1689
1864
gmac_clk_enable(gmac, false);
1690
1865
}
1691
1866
1867
+
static void rk_get_interfaces(struct stmmac_priv *priv, void *bsp_priv,
1868
+
unsigned long *interfaces)
1869
+
{
1870
+
struct rk_priv_data *rk = bsp_priv;
1871
+
1872
+
if (rk->ops->set_to_rgmii)
1873
+
phy_interface_set_rgmii(interfaces);
1874
+
1875
+
if (rk->ops->set_to_rmii)
1876
+
__set_bit(PHY_INTERFACE_MODE_RMII, interfaces);
1877
+
}
1878
+
1692
1879
static int rk_set_clk_tx_rate(void *bsp_priv_, struct clk *clk_tx_i,
1693
1880
phy_interface_t interface, int speed)
1694
1881
{
1695
1882
struct rk_priv_data *bsp_priv = bsp_priv_;
1696
-
struct device *dev = &bsp_priv->pdev->dev;
1697
1883
1698
-
switch (bsp_priv->phy_iface) {
1699
-
case PHY_INTERFACE_MODE_RGMII:
1700
-
case PHY_INTERFACE_MODE_RGMII_ID:
1701
-
case PHY_INTERFACE_MODE_RGMII_RXID:
1702
-
case PHY_INTERFACE_MODE_RGMII_TXID:
1703
-
if (bsp_priv->ops->set_rgmii_speed)
1704
-
bsp_priv->ops->set_rgmii_speed(bsp_priv, speed);
1705
-
break;
1706
-
case PHY_INTERFACE_MODE_RMII:
1707
-
if (bsp_priv->ops->set_rmii_speed)
1708
-
bsp_priv->ops->set_rmii_speed(bsp_priv, speed);
1709
-
break;
1710
-
default:
1711
-
dev_err(dev, "unsupported interface %d", bsp_priv->phy_iface);
1712
-
}
1884
+
if (bsp_priv->ops->set_speed)
1885
+
return bsp_priv->ops->set_speed(bsp_priv, bsp_priv->phy_iface,
1886
+
speed);
1713
1887
1714
-
return 0;
1888
+
return -EINVAL;
1715
1889
}
1716
1890
1717
1891
static int rk_gmac_probe(struct platform_device *pdev)
···
1743
1919
plat_dat->tx_fifo_size = 2048;
1744
1920
}
1745
1921
1922
+
plat_dat->get_interfaces = rk_get_interfaces;
1746
1923
plat_dat->set_clk_tx_rate = rk_set_clk_tx_rate;
1747
1924
1748
1925
plat_dat->bsp_priv = rk_gmac_setup(pdev, plat_dat, data);