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watchdog: rzg2l_wdt: Use force reset for WDT reset

This patch uses the force reset(WDTRSTB) for triggering WDT reset for
restart callback. This method(ie, Generate Reset (WDTRSTB) Signal on
parity error)is faster compared to the overflow method for triggering
watchdog reset.

Overflow method:
reboot: Restarting system
Reboot failed -- System halted
NOTICE: BL2: v2.5(release):v2.5/rzg2l-1.00-27-gf48f1440c

Parity error method:
reboot: Restarting system
NOTICE: BL2: v2.5(release):v2.5/rzg2l-1.00-27-gf48f1440c

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220225175320.11041-7-biju.das.jz@bp.renesas.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>

authored by

Biju Das and committed by
Wim Van Sebroeck f43e6ddb baf1aace

+7 -7
+7 -7
drivers/watchdog/rzg2l_wdt.c
··· 21 21 #define WDTSET 0x04 22 22 #define WDTTIM 0x08 23 23 #define WDTINT 0x0C 24 + #define PECR 0x10 25 + #define PEEN 0x14 24 26 #define WDTCNT_WDTEN BIT(0) 25 27 #define WDTINT_INTDISP BIT(0) 28 + #define PEEN_FORCE BIT(0) 26 29 27 30 #define WDT_DEFAULT_TIMEOUT 60U 28 31 ··· 120 117 { 121 118 struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev); 122 119 123 - /* Reset the module before we modify any register */ 124 - reset_control_reset(priv->rstc); 125 - 126 120 clk_prepare_enable(priv->pclk); 127 121 clk_prepare_enable(priv->osc_clk); 128 122 129 - /* smallest counter value to reboot soon */ 130 - rzg2l_wdt_write(priv, WDTSET_COUNTER_VAL(1), WDTSET); 123 + /* Generate Reset (WDTRSTB) Signal on parity error */ 124 + rzg2l_wdt_write(priv, 0, PECR); 131 125 132 - /* Enable watchdog timer*/ 133 - rzg2l_wdt_write(priv, WDTCNT_WDTEN, WDTCNT); 126 + /* Force parity error */ 127 + rzg2l_wdt_write(priv, PEEN_FORCE, PEEN); 134 128 135 129 return 0; 136 130 }