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Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
"Xmas fixes pull, all small nothing major, intel, radeon, one ttm
regression, and one build fix"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/ttm: Fix swapin regression
gpu: fix qxl missing crc32_le
drm/radeon: fix asic gfx values for scrapper asics
drm/i915: Use the correct GMCH_CTRL register for Sandybridge+
drm/radeon: check for 0 count in speaker allocation and SAD code
drm/radeon/dpm: disable ss on Cayman
drm/radeon/dce6: set correct number of audio pins
drm/i915: get a PC8 reference when enabling the power well
drm/i915: change CRTC assertion on LCPLL disable
drm/i915: Fix erroneous dereference of batch_obj inside reset_status
drm/i915: Prevent double unref following alloc failure during execbuffer

+93 -34
+24 -10
drivers/gpu/drm/i915/i915_gem.c
··· 2343 2343 kfree(request); 2344 2344 } 2345 2345 2346 - static void i915_gem_reset_ring_lists(struct drm_i915_private *dev_priv, 2347 - struct intel_ring_buffer *ring) 2346 + static void i915_gem_reset_ring_status(struct drm_i915_private *dev_priv, 2347 + struct intel_ring_buffer *ring) 2348 2348 { 2349 - u32 completed_seqno; 2350 - u32 acthd; 2349 + u32 completed_seqno = ring->get_seqno(ring, false); 2350 + u32 acthd = intel_ring_get_active_head(ring); 2351 + struct drm_i915_gem_request *request; 2351 2352 2352 - acthd = intel_ring_get_active_head(ring); 2353 - completed_seqno = ring->get_seqno(ring, false); 2353 + list_for_each_entry(request, &ring->request_list, list) { 2354 + if (i915_seqno_passed(completed_seqno, request->seqno)) 2355 + continue; 2354 2356 2357 + i915_set_reset_status(ring, request, acthd); 2358 + } 2359 + } 2360 + 2361 + static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv, 2362 + struct intel_ring_buffer *ring) 2363 + { 2355 2364 while (!list_empty(&ring->request_list)) { 2356 2365 struct drm_i915_gem_request *request; 2357 2366 2358 2367 request = list_first_entry(&ring->request_list, 2359 2368 struct drm_i915_gem_request, 2360 2369 list); 2361 - 2362 - if (request->seqno > completed_seqno) 2363 - i915_set_reset_status(ring, request, acthd); 2364 2370 2365 2371 i915_gem_free_request(request); 2366 2372 } ··· 2409 2403 struct intel_ring_buffer *ring; 2410 2404 int i; 2411 2405 2406 + /* 2407 + * Before we free the objects from the requests, we need to inspect 2408 + * them for finding the guilty party. As the requests only borrow 2409 + * their reference to the objects, the inspection must be done first. 2410 + */ 2412 2411 for_each_ring(ring, dev_priv, i) 2413 - i915_gem_reset_ring_lists(dev_priv, ring); 2412 + i915_gem_reset_ring_status(dev_priv, ring); 2413 + 2414 + for_each_ring(ring, dev_priv, i) 2415 + i915_gem_reset_ring_cleanup(dev_priv, ring); 2414 2416 2415 2417 i915_gem_cleanup_ringbuffer(dev); 2416 2418
+20 -8
drivers/gpu/drm/i915/i915_gem_execbuffer.c
··· 93 93 { 94 94 struct drm_i915_gem_object *obj; 95 95 struct list_head objects; 96 - int i, ret = 0; 96 + int i, ret; 97 97 98 98 INIT_LIST_HEAD(&objects); 99 99 spin_lock(&file->table_lock); ··· 106 106 DRM_DEBUG("Invalid object handle %d at index %d\n", 107 107 exec[i].handle, i); 108 108 ret = -ENOENT; 109 - goto out; 109 + goto err; 110 110 } 111 111 112 112 if (!list_empty(&obj->obj_exec_link)) { ··· 114 114 DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n", 115 115 obj, exec[i].handle, i); 116 116 ret = -EINVAL; 117 - goto out; 117 + goto err; 118 118 } 119 119 120 120 drm_gem_object_reference(&obj->base); ··· 123 123 spin_unlock(&file->table_lock); 124 124 125 125 i = 0; 126 - list_for_each_entry(obj, &objects, obj_exec_link) { 126 + while (!list_empty(&objects)) { 127 127 struct i915_vma *vma; 128 + 129 + obj = list_first_entry(&objects, 130 + struct drm_i915_gem_object, 131 + obj_exec_link); 128 132 129 133 /* 130 134 * NOTE: We can leak any vmas created here when something fails ··· 142 138 if (IS_ERR(vma)) { 143 139 DRM_DEBUG("Failed to lookup VMA\n"); 144 140 ret = PTR_ERR(vma); 145 - goto out; 141 + goto err; 146 142 } 147 143 144 + /* Transfer ownership from the objects list to the vmas list. */ 148 145 list_add_tail(&vma->exec_list, &eb->vmas); 146 + list_del_init(&obj->obj_exec_link); 149 147 150 148 vma->exec_entry = &exec[i]; 151 149 if (eb->and < 0) { ··· 161 155 ++i; 162 156 } 163 157 158 + return 0; 164 159 165 - out: 160 + 161 + err: 166 162 while (!list_empty(&objects)) { 167 163 obj = list_first_entry(&objects, 168 164 struct drm_i915_gem_object, 169 165 obj_exec_link); 170 166 list_del_init(&obj->obj_exec_link); 171 - if (ret) 172 - drm_gem_object_unreference(&obj->base); 167 + drm_gem_object_unreference(&obj->base); 173 168 } 169 + /* 170 + * Objects already transfered to the vmas list will be unreferenced by 171 + * eb_destroy. 172 + */ 173 + 174 174 return ret; 175 175 } 176 176
+4 -3
drivers/gpu/drm/i915/intel_display.c
··· 6303 6303 uint32_t val; 6304 6304 6305 6305 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) 6306 - WARN(crtc->base.enabled, "CRTC for pipe %c enabled\n", 6306 + WARN(crtc->active, "CRTC for pipe %c enabled\n", 6307 6307 pipe_name(crtc->pipe)); 6308 6308 6309 6309 WARN(I915_READ(HSW_PWR_WELL_DRIVER), "Power well on\n"); ··· 11126 11126 int intel_modeset_vga_set_state(struct drm_device *dev, bool state) 11127 11127 { 11128 11128 struct drm_i915_private *dev_priv = dev->dev_private; 11129 + unsigned reg = INTEL_INFO(dev)->gen >= 6 ? SNB_GMCH_CTRL : INTEL_GMCH_CTRL; 11129 11130 u16 gmch_ctrl; 11130 11131 11131 - pci_read_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, &gmch_ctrl); 11132 + pci_read_config_word(dev_priv->bridge_dev, reg, &gmch_ctrl); 11132 11133 if (state) 11133 11134 gmch_ctrl &= ~INTEL_GMCH_VGA_DISABLE; 11134 11135 else 11135 11136 gmch_ctrl |= INTEL_GMCH_VGA_DISABLE; 11136 - pci_write_config_word(dev_priv->bridge_dev, INTEL_GMCH_CTRL, gmch_ctrl); 11137 + pci_write_config_word(dev_priv->bridge_dev, reg, gmch_ctrl); 11137 11138 return 0; 11138 11139 } 11139 11140
+12 -2
drivers/gpu/drm/i915/intel_pm.c
··· 5688 5688 unsigned long irqflags; 5689 5689 uint32_t tmp; 5690 5690 5691 + WARN_ON(dev_priv->pc8.enabled); 5692 + 5691 5693 tmp = I915_READ(HSW_PWR_WELL_DRIVER); 5692 5694 is_enabled = tmp & HSW_PWR_WELL_STATE_ENABLED; 5693 5695 enable_requested = tmp & HSW_PWR_WELL_ENABLE_REQUEST; ··· 5749 5747 static void __intel_power_well_get(struct drm_device *dev, 5750 5748 struct i915_power_well *power_well) 5751 5749 { 5752 - if (!power_well->count++) 5750 + struct drm_i915_private *dev_priv = dev->dev_private; 5751 + 5752 + if (!power_well->count++) { 5753 + hsw_disable_package_c8(dev_priv); 5753 5754 __intel_set_power_well(dev, true); 5755 + } 5754 5756 } 5755 5757 5756 5758 static void __intel_power_well_put(struct drm_device *dev, 5757 5759 struct i915_power_well *power_well) 5758 5760 { 5761 + struct drm_i915_private *dev_priv = dev->dev_private; 5762 + 5759 5763 WARN_ON(!power_well->count); 5760 - if (!--power_well->count && i915_disable_power_well) 5764 + if (!--power_well->count && i915_disable_power_well) { 5761 5765 __intel_set_power_well(dev, false); 5766 + hsw_enable_package_c8(dev_priv); 5767 + } 5762 5768 } 5763 5769 5764 5770 void intel_display_power_get(struct drm_device *dev,
+1
drivers/gpu/drm/qxl/Kconfig
··· 8 8 select DRM_KMS_HELPER 9 9 select DRM_KMS_FB_HELPER 10 10 select DRM_TTM 11 + select CRC32 11 12 help 12 13 QXL virtual GPU for Spice virtualization desktop integration. Do not enable this driver unless your distro ships a corresponding X.org QXL driver that can handle kernel modesetting.
+1 -1
drivers/gpu/drm/qxl/qxl_display.c
··· 24 24 */ 25 25 26 26 27 - #include "linux/crc32.h" 27 + #include <linux/crc32.h> 28 28 29 29 #include "qxl_drv.h" 30 30 #include "qxl_object.h"
+5 -3
drivers/gpu/drm/radeon/dce6_afmt.c
··· 174 174 } 175 175 176 176 sad_count = drm_edid_to_speaker_allocation(radeon_connector->edid, &sadb); 177 - if (sad_count < 0) { 177 + if (sad_count <= 0) { 178 178 DRM_ERROR("Couldn't read Speaker Allocation Data Block: %d\n", sad_count); 179 179 return; 180 180 } ··· 235 235 } 236 236 237 237 sad_count = drm_edid_to_sad(radeon_connector->edid, &sads); 238 - if (sad_count < 0) { 238 + if (sad_count <= 0) { 239 239 DRM_ERROR("Couldn't read SADs: %d\n", sad_count); 240 240 return; 241 241 } ··· 308 308 rdev->audio.enabled = true; 309 309 310 310 if (ASIC_IS_DCE8(rdev)) 311 - rdev->audio.num_pins = 7; 311 + rdev->audio.num_pins = 6; 312 + else if (ASIC_IS_DCE61(rdev)) 313 + rdev->audio.num_pins = 4; 312 314 else 313 315 rdev->audio.num_pins = 6; 314 316
+2 -2
drivers/gpu/drm/radeon/evergreen_hdmi.c
··· 118 118 } 119 119 120 120 sad_count = drm_edid_to_speaker_allocation(radeon_connector->edid, &sadb); 121 - if (sad_count < 0) { 121 + if (sad_count <= 0) { 122 122 DRM_ERROR("Couldn't read Speaker Allocation Data Block: %d\n", sad_count); 123 123 return; 124 124 } ··· 173 173 } 174 174 175 175 sad_count = drm_edid_to_sad(radeon_connector->edid, &sads); 176 - if (sad_count < 0) { 176 + if (sad_count <= 0) { 177 177 DRM_ERROR("Couldn't read SADs: %d\n", sad_count); 178 178 return; 179 179 }
+16 -4
drivers/gpu/drm/radeon/ni.c
··· 895 895 (rdev->pdev->device == 0x999C)) { 896 896 rdev->config.cayman.max_simds_per_se = 6; 897 897 rdev->config.cayman.max_backends_per_se = 2; 898 + rdev->config.cayman.max_hw_contexts = 8; 899 + rdev->config.cayman.sx_max_export_size = 256; 900 + rdev->config.cayman.sx_max_export_pos_size = 64; 901 + rdev->config.cayman.sx_max_export_smx_size = 192; 898 902 } else if ((rdev->pdev->device == 0x9903) || 899 903 (rdev->pdev->device == 0x9904) || 900 904 (rdev->pdev->device == 0x990A) || ··· 909 905 (rdev->pdev->device == 0x999D)) { 910 906 rdev->config.cayman.max_simds_per_se = 4; 911 907 rdev->config.cayman.max_backends_per_se = 2; 908 + rdev->config.cayman.max_hw_contexts = 8; 909 + rdev->config.cayman.sx_max_export_size = 256; 910 + rdev->config.cayman.sx_max_export_pos_size = 64; 911 + rdev->config.cayman.sx_max_export_smx_size = 192; 912 912 } else if ((rdev->pdev->device == 0x9919) || 913 913 (rdev->pdev->device == 0x9990) || 914 914 (rdev->pdev->device == 0x9991) || ··· 923 915 (rdev->pdev->device == 0x99A0)) { 924 916 rdev->config.cayman.max_simds_per_se = 3; 925 917 rdev->config.cayman.max_backends_per_se = 1; 918 + rdev->config.cayman.max_hw_contexts = 4; 919 + rdev->config.cayman.sx_max_export_size = 128; 920 + rdev->config.cayman.sx_max_export_pos_size = 32; 921 + rdev->config.cayman.sx_max_export_smx_size = 96; 926 922 } else { 927 923 rdev->config.cayman.max_simds_per_se = 2; 928 924 rdev->config.cayman.max_backends_per_se = 1; 925 + rdev->config.cayman.max_hw_contexts = 4; 926 + rdev->config.cayman.sx_max_export_size = 128; 927 + rdev->config.cayman.sx_max_export_pos_size = 32; 928 + rdev->config.cayman.sx_max_export_smx_size = 96; 929 929 } 930 930 rdev->config.cayman.max_texture_channel_caches = 2; 931 931 rdev->config.cayman.max_gprs = 256; ··· 941 925 rdev->config.cayman.max_gs_threads = 32; 942 926 rdev->config.cayman.max_stack_entries = 512; 943 927 rdev->config.cayman.sx_num_of_sets = 8; 944 - rdev->config.cayman.sx_max_export_size = 256; 945 - rdev->config.cayman.sx_max_export_pos_size = 64; 946 - rdev->config.cayman.sx_max_export_smx_size = 192; 947 - rdev->config.cayman.max_hw_contexts = 8; 948 928 rdev->config.cayman.sq_num_cf_insts = 2; 949 929 950 930 rdev->config.cayman.sc_prim_fifo_size = 0x40;
+6
drivers/gpu/drm/radeon/rv770_dpm.c
··· 2328 2328 pi->mclk_ss = radeon_atombios_get_asic_ss_info(rdev, &ss, 2329 2329 ASIC_INTERNAL_MEMORY_SS, 0); 2330 2330 2331 + /* disable ss, causes hangs on some cayman boards */ 2332 + if (rdev->family == CHIP_CAYMAN) { 2333 + pi->sclk_ss = false; 2334 + pi->mclk_ss = false; 2335 + } 2336 + 2331 2337 if (pi->sclk_ss || pi->mclk_ss) 2332 2338 pi->dynamic_ss = true; 2333 2339 else
+2 -1
drivers/gpu/drm/ttm/ttm_bo_util.c
··· 353 353 * Don't move nonexistent data. Clear destination instead. 354 354 */ 355 355 if (old_iomap == NULL && 356 - (ttm == NULL || ttm->state == tt_unpopulated)) { 356 + (ttm == NULL || (ttm->state == tt_unpopulated && 357 + !(ttm->page_flags & TTM_PAGE_FLAG_SWAPPED)))) { 357 358 memset_io(new_iomap, 0, new_mem->num_pages*PAGE_SIZE); 358 359 goto out2; 359 360 }