Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'usb-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB/Thunderbolt updates from Greg KH:
"Here is the big set of USB and Thunderbolt driver updates for
6.19-rc1. Nothing major here, just lots of tiny updates for most of
the common USB drivers. Included in here are:
- more xhci driver updates and fixes
- Thunderbolt driver cleanups
- usb serial driver updates
- typec driver updates
- USB tracepoint additions
- dwc3 driver updates, including support for Apple hardware
- lots of other smaller driver updates and cleanups
All of these have been in linux-next for a while with no reported
issues"
* tag 'usb-6.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (161 commits)
usb: gadget: tegra-xudc: Always reinitialize data toggle when clear halt
USB: serial: option: move Telit 0x10c7 composition in the right place
USB: serial: option: add Telit Cinterion FE910C04 new compositions
usb: typec: ucsi: fix use-after-free caused by uec->work
usb: typec: ucsi: fix probe failure in gaokun_ucsi_probe()
usb: dwc3: core: Remove redundant comment in core init
usb: phy: Initialize struct usb_phy list_head
USB: serial: option: add Foxconn T99W760
usb: usb-storage: No additional quirks need to be added to the EL-R12 optical drive.
usb: typec: hd3ss3220: Enable VBUS based on ID pin state
dt-bindings: usb: ti,hd3ss3220: Add support for VBUS based on ID state
usb: typec: anx7411: add WQ_PERCPU to alloc_workqueue users
USB: add WQ_PERCPU to alloc_workqueue users
dt-bindings: usb: dwc3-xilinx: Describe the reset constraint for the versal platform
drivers/usb/storage: use min() instead of min_t()
usb: raw-gadget: cap raw_io transfer length to KMALLOC_MAX_SIZE
usb: ohci-da8xx: remove unused platform data
usb: gadget: functionfs: use dma_buf_unmap_attachment_unlocked() helper
usb: uas: reduce time under spinlock
usb: dwc3: eic7700: Add EIC7700 USB driver
...
+2943
-1247
+28
Documentation/ABI/testing/sysfs-class-usb_power_delivery
+28
Documentation/ABI/testing/sysfs-class-usb_power_delivery
···
254
254
Description:
255
255
The PPS Power Limited bit indicates whether or not the source
256
256
supply will exceed the rated output power if requested.
257
+
258
+
Standard Power Range (SPR) Adjustable Voltage Supplies
259
+
260
+
What: /sys/class/usb_power_delivery/.../<capability>/<position>:spr_adjustable_voltage_supply
261
+
Date: Oct 2025
262
+
Contact: Badhri Jagan Sridharan <badhri@google.com>
263
+
Description:
264
+
Adjustable Voltage Supply (AVS) Augmented PDO (APDO).
265
+
266
+
What: /sys/class/usb_power_delivery/.../<capability>/<position>:spr_adjustable_voltage_supply/maximum_current_9V_to_15V
267
+
Date: Oct 2025
268
+
Contact: Badhri Jagan Sridharan <badhri@google.com>
269
+
Description:
270
+
Maximum Current for 9V to 15V range in milliamperes.
271
+
272
+
What: /sys/class/usb_power_delivery/.../<capability>/<position>:spr_adjustable_voltage_supply/maximum_current_15V_to_20V
273
+
Date: Oct 2025
274
+
Contact: Badhri Jagan Sridharan <badhri@google.com>
275
+
Description:
276
+
Maximum Current for greater than 15V till 20V range in
277
+
milliamperes.
278
+
279
+
What: /sys/class/usb_power_delivery/.../<capability>/<position>:spr_adjustable_voltage_supply/peak_current
280
+
Date: Oct 2025
281
+
Contact: Badhri Jagan Sridharan <badhri@google.com>
282
+
Description:
283
+
This file shows the value of the Adjustable Voltage Supply Peak Current
284
+
Capability field.
+35
-15
Documentation/admin-guide/thunderbolt.rst
+35
-15
Documentation/admin-guide/thunderbolt.rst
···
203
203
upgraded to the latest where possible bugs in it have been fixed.
204
204
Typically OEMs provide this firmware from their support site.
205
205
206
-
There is also a central site which has links where to download firmware
207
-
for some machines:
208
-
209
-
`Thunderbolt Updates <https://thunderbolttechnology.net/updates>`_
206
+
Currently, recommended method of updating firmware is through "fwupd" tool.
207
+
It uses LVFS (Linux Vendor Firmware Service) portal by default to get the
208
+
latest firmware from hardware vendors and updates connected devices if found
209
+
compatible. For details refer to: https://github.com/fwupd/fwupd.
210
210
211
211
Before you upgrade firmware on a device, host or retimer, please make
212
212
sure it is a suitable upgrade. Failing to do that may render the device
···
215
215
216
216
Host NVM upgrade on Apple Macs is not supported.
217
217
218
-
Once the NVM image has been downloaded, you need to plug in a
219
-
Thunderbolt device so that the host controller appears. It does not
220
-
matter which device is connected (unless you are upgrading NVM on a
221
-
device - then you need to connect that particular device).
218
+
Fwupd is installed by default. If you don't have it on your system, simply
219
+
use your distro package manager to get it.
220
+
221
+
To see possible updates through fwupd, you need to plug in a Thunderbolt
222
+
device so that the host controller appears. It does not matter which
223
+
device is connected (unless you are upgrading NVM on a device - then you
224
+
need to connect that particular device).
222
225
223
226
Note an OEM-specific method to power the controller up ("force power") may
224
227
be available for your system in which case there is no need to plug in a
225
228
Thunderbolt device.
226
229
227
-
After that we can write the firmware to the non-active parts of the NVM
228
-
of the host or device. As an example here is how Intel NUC6i7KYK (Skull
229
-
Canyon) Thunderbolt controller NVM is upgraded::
230
+
Updating firmware using fwupd is straightforward - refer to official
231
+
readme on fwupd github.
232
+
233
+
If firmware image is written successfully, the device shortly disappears.
234
+
Once it comes back, the driver notices it and initiates a full power
235
+
cycle. After a while device appears again and this time it should be
236
+
fully functional.
237
+
238
+
Device of interest should display new version under "Current version"
239
+
and "Update State: Success" in fwupd's interface.
240
+
241
+
Upgrading firmware manually
242
+
---------------------------------------------------------------
243
+
If possible, use fwupd to updated the firmware. However, if your device OEM
244
+
has not uploaded the firmware to LVFS, but it is available for download
245
+
from their side, you can use method below to directly upgrade the
246
+
firmware.
247
+
248
+
Manual firmware update can be done with 'dd' tool. To update firmware
249
+
using this method, you need to write it to the non-active parts of NVM
250
+
of the host or device. Example on how to update Intel NUC6i7KYK
251
+
(Skull Canyon) Thunderbolt controller NVM::
230
252
231
253
# dd if=KYK_TBT_FW_0018.bin of=/sys/bus/thunderbolt/devices/0-0/nvm_non_active0/nvmem
232
254
···
257
235
258
236
# echo 1 > /sys/bus/thunderbolt/devices/0-0/nvm_authenticate
259
237
260
-
If no errors are returned, the host controller shortly disappears. Once
261
-
it comes back the driver notices it and initiates a full power cycle.
262
-
After a while the host controller appears again and this time it should
263
-
be fully functional.
238
+
If no errors are returned, device should behave as described in previous
239
+
section.
264
240
265
241
We can verify that the new NVM firmware is active by running the following
266
242
commands::
+80
Documentation/devicetree/bindings/usb/apple,dwc3.yaml
+80
Documentation/devicetree/bindings/usb/apple,dwc3.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/usb/apple,dwc3.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Apple Silicon DWC3 USB controller
8
+
9
+
maintainers:
10
+
- Sven Peter <sven@kernel.org>
11
+
12
+
description:
13
+
Apple Silicon SoCs use a Synopsys DesignWare DWC3 based controller for each of
14
+
their Type-C ports.
15
+
16
+
allOf:
17
+
- $ref: snps,dwc3-common.yaml#
18
+
19
+
properties:
20
+
compatible:
21
+
oneOf:
22
+
- items:
23
+
- enum:
24
+
- apple,t6000-dwc3
25
+
- apple,t6020-dwc3
26
+
- apple,t8112-dwc3
27
+
- const: apple,t8103-dwc3
28
+
- const: apple,t8103-dwc3
29
+
30
+
reg:
31
+
items:
32
+
- description: Core DWC3 region
33
+
- description: Apple-specific DWC3 region
34
+
35
+
reg-names:
36
+
items:
37
+
- const: dwc3-core
38
+
- const: dwc3-apple
39
+
40
+
interrupts:
41
+
maxItems: 1
42
+
43
+
iommus:
44
+
maxItems: 2
45
+
46
+
resets:
47
+
maxItems: 1
48
+
49
+
power-domains:
50
+
maxItems: 1
51
+
52
+
required:
53
+
- compatible
54
+
- reg
55
+
- reg-names
56
+
- interrupts
57
+
- iommus
58
+
- resets
59
+
- power-domains
60
+
- usb-role-switch
61
+
62
+
unevaluatedProperties: false
63
+
64
+
examples:
65
+
- |
66
+
#include <dt-bindings/interrupt-controller/apple-aic.h>
67
+
#include <dt-bindings/interrupt-controller/irq.h>
68
+
69
+
usb@82280000 {
70
+
compatible = "apple,t8103-dwc3";
71
+
reg = <0x82280000 0xcd00>, <0x8228cd00 0x3200>;
72
+
reg-names = "dwc3-core", "dwc3-apple";
73
+
interrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;
74
+
iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
75
+
76
+
power-domains = <&ps_atc0_usb>;
77
+
resets = <&atcphy0>;
78
+
79
+
usb-role-switch;
80
+
};
+22
Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
+22
Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
···
47
47
- const: ref_clk
48
48
49
49
resets:
50
+
minItems: 1
50
51
description:
51
52
A list of phandles for resets listed in reset-names.
52
53
···
57
56
- description: USB APB reset
58
57
59
58
reset-names:
59
+
minItems: 1
60
60
items:
61
61
- const: usb_crst
62
62
- const: usb_hibrst
···
96
94
- clock-names
97
95
- resets
98
96
- reset-names
97
+
98
+
allOf:
99
+
- if:
100
+
properties:
101
+
compatible:
102
+
contains:
103
+
enum:
104
+
- xlnx,versal-dwc3
105
+
then:
106
+
properties:
107
+
resets:
108
+
maxItems: 1
109
+
reset-names:
110
+
maxItems: 1
111
+
else:
112
+
properties:
113
+
resets:
114
+
minItems: 3
115
+
reset-names:
116
+
minItems: 3
99
117
100
118
additionalProperties: false
101
119
+94
Documentation/devicetree/bindings/usb/eswin,eic7700-usb.yaml
+94
Documentation/devicetree/bindings/usb/eswin,eic7700-usb.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/usb/eswin,eic7700-usb.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: ESWIN EIC7700 SoC Usb Controller
8
+
9
+
maintainers:
10
+
- Wei Yang <yangwei1@eswincomputing.com>
11
+
- Senchuan Zhang <zhangsenchuan@eswincomputing.com>
12
+
- Hang Cao <caohang@eswincomputing.com>
13
+
14
+
description:
15
+
The Usb controller on EIC7700 SoC.
16
+
17
+
allOf:
18
+
- $ref: snps,dwc3-common.yaml#
19
+
20
+
properties:
21
+
compatible:
22
+
const: eswin,eic7700-dwc3
23
+
24
+
reg:
25
+
maxItems: 1
26
+
27
+
interrupts:
28
+
maxItems: 1
29
+
30
+
interrupt-names:
31
+
items:
32
+
- const: peripheral
33
+
34
+
clocks:
35
+
maxItems: 3
36
+
37
+
clock-names:
38
+
items:
39
+
- const: aclk
40
+
- const: cfg
41
+
- const: usb_en
42
+
43
+
resets:
44
+
maxItems: 2
45
+
46
+
reset-names:
47
+
items:
48
+
- const: vaux
49
+
- const: usb_rst
50
+
51
+
eswin,hsp-sp-csr:
52
+
description:
53
+
HSP CSR is to control and get status of different high-speed peripherals
54
+
(such as Ethernet, USB, SATA, etc.) via register, which can tune
55
+
board-level's parameters of PHY, etc.
56
+
$ref: /schemas/types.yaml#/definitions/phandle-array
57
+
items:
58
+
- items:
59
+
- description: phandle to HSP Register Controller hsp_sp_csr node.
60
+
- description: USB bus register offset.
61
+
- description: AXI low power register offset.
62
+
63
+
required:
64
+
- compatible
65
+
- reg
66
+
- clocks
67
+
- clock-names
68
+
- interrupts
69
+
- interrupt-names
70
+
- resets
71
+
- reset-names
72
+
- eswin,hsp-sp-csr
73
+
74
+
unevaluatedProperties: false
75
+
76
+
examples:
77
+
- |
78
+
usb@50480000 {
79
+
compatible = "eswin,eic7700-dwc3";
80
+
reg = <0x50480000 0x10000>;
81
+
clocks = <&clock 135>,
82
+
<&clock 136>,
83
+
<&hspcrg 18>;
84
+
clock-names = "aclk", "cfg", "usb_en";
85
+
interrupt-parent = <&plic>;
86
+
interrupts = <85>;
87
+
interrupt-names = "peripheral";
88
+
resets = <&reset 84>, <&hspcrg 2>;
89
+
reset-names = "vaux", "usb_rst";
90
+
dr_mode = "peripheral";
91
+
maximum-speed = "high-speed";
92
+
phy_type = "utmi";
93
+
eswin,hsp-sp-csr = <&hsp_sp_csr 0x800 0x818>;
94
+
};
+18
-15
Documentation/devicetree/bindings/usb/fsl,ls1028a.yaml
+18
-15
Documentation/devicetree/bindings/usb/fsl,ls1028a.yaml
···
9
9
maintainers:
10
10
- Frank Li <Frank.Li@nxp.com>
11
11
12
-
select:
13
-
properties:
14
-
compatible:
15
-
contains:
16
-
enum:
17
-
- fsl,ls1028a-dwc3
18
-
required:
19
-
- compatible
20
-
21
12
properties:
22
13
compatible:
23
-
items:
24
-
- enum:
25
-
- fsl,ls1028a-dwc3
26
-
- const: snps,dwc3
14
+
oneOf:
15
+
- items:
16
+
- enum:
17
+
- fsl,ls1012a-dwc3
18
+
- fsl,ls1043a-dwc3
19
+
- fsl,ls1046a-dwc3
20
+
- fsl,ls1088a-dwc3
21
+
- fsl,ls208xa-dwc3
22
+
- fsl,lx2160a-dwc3
23
+
- const: fsl,ls1028a-dwc3
24
+
- const: fsl,ls1028a-dwc3
27
25
28
26
reg:
29
27
maxItems: 1
30
28
31
29
interrupts:
32
30
maxItems: 1
31
+
32
+
iommus:
33
+
maxItems: 1
34
+
35
+
dma-coherent: true
33
36
34
37
unevaluatedProperties: false
35
38
···
42
39
- interrupts
43
40
44
41
allOf:
45
-
- $ref: snps,dwc3.yaml#
42
+
- $ref: snps,dwc3-common.yaml#
46
43
47
44
examples:
48
45
- |
49
46
#include <dt-bindings/interrupt-controller/arm-gic.h>
50
47
51
48
usb@fe800000 {
52
-
compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
49
+
compatible = "fsl,ls1028a-dwc3";
53
50
reg = <0xfe800000 0x100000>;
54
51
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
55
52
};
+1
Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml
+1
Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml
+1
Documentation/devicetree/bindings/usb/generic-ehci.yaml
+1
Documentation/devicetree/bindings/usb/generic-ehci.yaml
+14
-3
Documentation/devicetree/bindings/usb/generic-xhci.yaml
+14
-3
Documentation/devicetree/bindings/usb/generic-xhci.yaml
···
14
14
oneOf:
15
15
- description: Generic xHCI device
16
16
const: generic-xhci
17
-
- description: Armada 37xx/375/38x/8k SoCs
17
+
- description: Armada 375/38x SoCs
18
+
items:
19
+
- enum:
20
+
- marvell,armada-375-xhci
21
+
- marvell,armada-380-xhci
22
+
- description: Armada 37xx/8k SoCs
18
23
items:
19
24
- enum:
20
25
- marvell,armada3700-xhci
21
-
- marvell,armada-375-xhci
22
-
- marvell,armada-380-xhci
23
26
- marvell,armada-8k-xhci
24
27
- const: generic-xhci
25
28
- description: Broadcom SoCs with power domains
···
55
52
- const: reg
56
53
57
54
dma-coherent: true
55
+
56
+
dr_mode:
57
+
enum:
58
+
- host
59
+
- otg
60
+
61
+
iommus:
62
+
maxItems: 1
58
63
59
64
power-domains:
60
65
maxItems: 1
+3
-1
Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
+3
-1
Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml
···
34
34
- mediatek,mt8183-xhci
35
35
- mediatek,mt8186-xhci
36
36
- mediatek,mt8188-xhci
37
+
- mediatek,mt8189-xhci
37
38
- mediatek,mt8192-xhci
38
39
- mediatek,mt8195-xhci
39
40
- mediatek,mt8365-xhci
···
169
168
104 - used by mt8195, IP1, specific 1.04;
170
169
105 - used by mt8195, IP2, specific 1.05;
171
170
106 - used by mt8195, IP3, specific 1.06;
172
-
enum: [1, 2, 101, 102, 103, 104, 105, 106]
171
+
110 - used by mt8189, IP4, specific 1.10;
172
+
enum: [1, 2, 101, 102, 103, 104, 105, 106, 110]
173
173
174
174
mediatek,u3p-dis-msk:
175
175
$ref: /schemas/types.yaml#/definitions/uint32
+32
Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml
+32
Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml
···
24
24
compatible:
25
25
items:
26
26
- enum:
27
+
- qcom,glymur-dwc3
28
+
- qcom,glymur-dwc3-mp
27
29
- qcom,ipq4019-dwc3
28
30
- qcom,ipq5018-dwc3
29
31
- qcom,ipq5332-dwc3
···
34
32
- qcom,ipq8064-dwc3
35
33
- qcom,ipq8074-dwc3
36
34
- qcom,ipq9574-dwc3
35
+
- qcom,kaanapali-dwc3
37
36
- qcom,milos-dwc3
38
37
- qcom,msm8953-dwc3
39
38
- qcom,msm8994-dwc3
···
70
67
- qcom,sm8450-dwc3
71
68
- qcom,sm8550-dwc3
72
69
- qcom,sm8650-dwc3
70
+
- qcom,sm8750-dwc3
73
71
- qcom,x1e80100-dwc3
74
72
- qcom,x1e80100-dwc3-mp
75
73
- const: qcom,snps-dwc3
···
204
200
contains:
205
201
enum:
206
202
- qcom,ipq9574-dwc3
203
+
- qcom,kaanapali-dwc3
207
204
- qcom,msm8953-dwc3
208
205
- qcom,msm8996-dwc3
209
206
- qcom,msm8998-dwc3
···
218
213
- qcom,sdx65-dwc3
219
214
- qcom,sdx75-dwc3
220
215
- qcom,sm6350-dwc3
216
+
- qcom,sm8750-dwc3
221
217
then:
222
218
properties:
223
219
clocks:
···
398
392
compatible:
399
393
contains:
400
394
enum:
395
+
- qcom,glymur-dwc3
396
+
- qcom,glymur-dwc3-mp
397
+
398
+
then:
399
+
properties:
400
+
clocks:
401
+
maxItems: 7
402
+
clock-names:
403
+
items:
404
+
- const: cfg_noc
405
+
- const: core
406
+
- const: iface
407
+
- const: sleep
408
+
- const: mock_utmi
409
+
- const: noc_aggr_north
410
+
- const: noc_aggr_south
411
+
412
+
- if:
413
+
properties:
414
+
compatible:
415
+
contains:
416
+
enum:
401
417
- qcom,ipq5018-dwc3
402
418
- qcom,ipq6018-dwc3
403
419
- qcom,ipq8074-dwc3
···
484
456
compatible:
485
457
contains:
486
458
enum:
459
+
- qcom,glymur-dwc3
487
460
- qcom,milos-dwc3
488
461
- qcom,x1e80100-dwc3
489
462
then:
···
508
479
enum:
509
480
- qcom,ipq4019-dwc3
510
481
- qcom,ipq8064-dwc3
482
+
- qcom,kaanapali-dwc3
511
483
- qcom,msm8994-dwc3
512
484
- qcom,qcs615-dwc3
513
485
- qcom,qcs8300-dwc3
···
531
501
- qcom,sm8450-dwc3
532
502
- qcom,sm8550-dwc3
533
503
- qcom,sm8650-dwc3
504
+
- qcom,sm8750-dwc3
534
505
then:
535
506
properties:
536
507
interrupts:
···
552
521
compatible:
553
522
contains:
554
523
enum:
524
+
- qcom,glymur-dwc3-mp
555
525
- qcom,sc8180x-dwc3-mp
556
526
- qcom,x1e80100-dwc3-mp
557
527
then:
+10
-2
Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml
+10
-2
Documentation/devicetree/bindings/usb/renesas,rzg3e-xhci.yaml
···
4
4
$id: http://devicetree.org/schemas/usb/renesas,rzg3e-xhci.yaml#
5
5
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
6
7
-
title: Renesas RZ/G3E USB 3.2 Gen2 Host controller
7
+
title: Renesas USB 3.2 Gen2 Host controller
8
8
9
9
maintainers:
10
10
- Biju Das <biju.das.jz@bp.renesas.com>
11
11
12
12
properties:
13
13
compatible:
14
-
const: renesas,r9a09g047-xhci
14
+
oneOf:
15
+
- items:
16
+
- enum:
17
+
- renesas,r9a09g056-xhci # RZ/V2N
18
+
- renesas,r9a09g057-xhci # RZ/V2H(P)
19
+
- const: renesas,r9a09g047-xhci
20
+
21
+
- items:
22
+
- const: renesas,r9a09g047-xhci # RZ/G3E
15
23
16
24
reg:
17
25
maxItems: 1
+6
Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml
+6
Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml
···
22
22
- samsung,exynos850-dwusb3
23
23
- samsung,exynosautov920-dwusb3
24
24
- items:
25
+
- const: samsung,exynos8890-dwusb3
26
+
- const: samsung,exynos7-dwusb3
27
+
- items:
25
28
- const: samsung,exynos990-dwusb3
26
29
- const: samsung,exynos850-dwusb3
27
30
···
38
35
clock-names:
39
36
minItems: 1
40
37
maxItems: 4
38
+
39
+
power-domains:
40
+
maxItems: 1
41
41
42
42
ranges: true
43
43
+8
Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml
+8
Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml
···
25
25
interrupts:
26
26
maxItems: 1
27
27
28
+
id-gpios:
29
+
description:
30
+
An input gpio for USB ID pin. Upon detecting a UFP device, HD3SS3220
31
+
will keep ID pin high if VBUS is not at VSafe0V. Once VBUS is at VSafe0V,
32
+
the HD3SS3220 will assert ID pin low. This is done to enforce Type-C
33
+
requirement that VBUS must be at VSafe0V before re-enabling VBUS.
34
+
maxItems: 1
35
+
28
36
ports:
29
37
$ref: /schemas/graph.yaml#/properties/ports
30
38
description: OF graph bindings (specified in bindings/graph.txt) that model
+13
Documentation/devicetree/bindings/usb/usb-uhci.yaml
+13
Documentation/devicetree/bindings/usb/usb-uhci.yaml
···
20
20
- aspeed,ast2400-uhci
21
21
- aspeed,ast2500-uhci
22
22
- aspeed,ast2600-uhci
23
+
- aspeed,ast2700-uhci
23
24
- const: generic-uhci
24
25
25
26
reg:
26
27
maxItems: 1
27
28
28
29
interrupts:
30
+
maxItems: 1
31
+
32
+
resets:
29
33
maxItems: 1
30
34
31
35
'#ports':
···
53
49
then:
54
50
required:
55
51
- clocks
52
+
53
+
- if:
54
+
properties:
55
+
compatible:
56
+
contains:
57
+
const: aspeed,ast2700-uhci
58
+
then:
59
+
required:
60
+
- resets
56
61
57
62
unevaluatedProperties: false
58
63
+2
MAINTAINERS
+2
MAINTAINERS
···
2477
2477
F: Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml
2478
2478
F: Documentation/devicetree/bindings/spi/apple,spi.yaml
2479
2479
F: Documentation/devicetree/bindings/spmi/apple,spmi.yaml
2480
+
F: Documentation/devicetree/bindings/usb/apple,dwc3.yaml
2480
2481
F: Documentation/devicetree/bindings/watchdog/apple,wdt.yaml
2481
2482
F: Documentation/hwmon/macsmc-hwmon.rst
2482
2483
F: arch/arm64/boot/dts/apple/
···
2504
2503
F: drivers/soc/apple/*
2505
2504
F: drivers/spi/spi-apple.c
2506
2505
F: drivers/spmi/spmi-apple-controller.c
2506
+
F: drivers/usb/dwc3/dwc3-apple.c
2507
2507
F: drivers/video/backlight/apple_dwi_bl.c
2508
2508
F: drivers/watchdog/apple_wdt.c
2509
2509
F: include/dt-bindings/interrupt-controller/apple-aic.h
+1
-1
drivers/thunderbolt/ctl.c
+1
-1
drivers/thunderbolt/ctl.c
+2
-2
drivers/thunderbolt/debugfs.c
+2
-2
drivers/thunderbolt/debugfs.c
···
201
201
#if IS_ENABLED(CONFIG_USB4_DEBUGFS_WRITE)
202
202
/*
203
203
* Path registers need to be written in double word pairs and they both must be
204
-
* read before written. This writes one double word in patch config space
204
+
* read before written. This writes one double word in path config space
205
205
* following the spec flow.
206
206
*/
207
207
static int path_write_one(struct tb_port *port, u32 val, u32 offset)
···
1196
1196
{
1197
1197
/*
1198
1198
* For running on RX2 the link must be asymmetric with 3
1199
-
* receivers. Because this is can change dynamically, check it
1199
+
* receivers. Because this can change dynamically, check it
1200
1200
* here before we start the margining and report back error if
1201
1201
* expectations are not met.
1202
1202
*/
+1
-1
drivers/thunderbolt/domain.c
+1
-1
drivers/thunderbolt/domain.c
···
376
376
struct tb *tb;
377
377
378
378
/*
379
-
* Make sure the structure sizes map with that the hardware
379
+
* Make sure the structure sizes map with what the hardware
380
380
* expects because bit-fields are being used.
381
381
*/
382
382
BUILD_BUG_ON(sizeof(struct tb_regs_switch_header) != 5 * 4);
+1
-1
drivers/thunderbolt/eeprom.c
+1
-1
drivers/thunderbolt/eeprom.c
+4
-4
drivers/thunderbolt/icm.c
+4
-4
drivers/thunderbolt/icm.c
···
787
787
* information might have changed for example by the
788
788
* fact that a switch on a dual-link connection might
789
789
* have been enumerated using the other link now. Make
790
-
* sure our book keeping matches that.
790
+
* sure our bookkeeping matches that.
791
791
*/
792
792
if (sw->depth == depth && sw_phy_port == phy_port &&
793
793
!!sw->authorized == authorized) {
···
969
969
970
970
/*
971
971
* Look if there already exists an XDomain in the same place
972
-
* than the new one and in that case remove it because it is
972
+
* as the new one and in that case remove it because it is
973
973
* most likely another host that got disconnected.
974
974
*/
975
975
xd = tb_xdomain_find_by_link_depth(tb, link, depth);
···
2000
2000
if (icm->safe_mode) {
2001
2001
tb_info(tb, "Thunderbolt host controller is in safe mode.\n");
2002
2002
tb_info(tb, "You need to update NVM firmware of the controller before it can be used.\n");
2003
-
tb_info(tb, "For latest updates check https://thunderbolttechnology.net/updates.\n");
2003
+
tb_info(tb, "Use fwupd tool to apply update. Check Documentation/admin-guide/thunderbolt.rst for details.\n");
2004
2004
return 0;
2005
2005
}
2006
2006
···
2171
2171
static int icm_runtime_resume(struct tb *tb)
2172
2172
{
2173
2173
/*
2174
-
* We can reuse the same resume functionality than with system
2174
+
* We can reuse the same resume functionality as with system
2175
2175
* suspend.
2176
2176
*/
2177
2177
icm_complete(tb);
+1
-1
drivers/thunderbolt/lc.c
+1
-1
drivers/thunderbolt/lc.c
+1
-1
drivers/thunderbolt/nhi.c
+1
-1
drivers/thunderbolt/nhi.c
···
712
712
ring_iowrite64desc(ring, ring->descriptors_dma, 0);
713
713
if (ring->is_tx) {
714
714
ring_iowrite32desc(ring, ring->size, 12);
715
-
ring_iowrite32options(ring, 0, 4); /* time releated ? */
715
+
ring_iowrite32options(ring, 0, 4);
716
716
ring_iowrite32options(ring, flags, 0);
717
717
} else {
718
718
u32 sof_eof_mask = ring->sof_mask << 16 | ring->eof_mask;
+1
-1
drivers/thunderbolt/retimer.c
+1
-1
drivers/thunderbolt/retimer.c
···
501
501
* @add: If true also registers found retimers
502
502
*
503
503
* Brings the sideband into a state where retimers can be accessed.
504
-
* Then Tries to enumerate on-board retimers connected to @port. Found
504
+
* Then tries to enumerate on-board retimers connected to @port. Found
505
505
* retimers are registered as children of @port if @add is set. Does
506
506
* not scan for cable retimers for now.
507
507
*
+3
-3
drivers/thunderbolt/switch.c
+3
-3
drivers/thunderbolt/switch.c
···
736
736
port->cap_usb4 = cap;
737
737
738
738
/*
739
-
* USB4 ports the buffers allocated for the control path
739
+
* USB4 port buffers allocated for the control path
740
740
* can be read from the path config space. Legacy
741
-
* devices we use hard-coded value.
741
+
* devices use hard-coded value.
742
742
*/
743
743
if (port->cap_usb4) {
744
744
struct tb_regs_hop hop;
···
3221
3221
* @sw: Switch whose link is unconfigured
3222
3222
*
3223
3223
* Sets the link unconfigured so the @sw will be disconnected if the
3224
-
* domain exists sleep.
3224
+
* domain exits sleep.
3225
3225
*/
3226
3226
void tb_switch_unconfigure_link(struct tb_switch *sw)
3227
3227
{
+8
-8
drivers/thunderbolt/tb.c
+8
-8
drivers/thunderbolt/tb.c
···
322
322
323
323
/*
324
324
* If both routers at the end of the link are v2 we simply
325
-
* enable the enhanched uni-directional mode. That covers all
325
+
* enable the enhanced uni-directional mode. That covers all
326
326
* the CL states. For v1 and before we need to use the normal
327
327
* rate to allow CL1 (when supported). Otherwise we keep the TMU
328
328
* running at the highest accuracy.
···
538
538
* @src_port: Source protocol adapter
539
539
* @dst_port: Destination protocol adapter
540
540
* @port: USB4 port the consumed bandwidth is calculated
541
-
* @consumed_up: Consumed upsream bandwidth (Mb/s)
541
+
* @consumed_up: Consumed upstream bandwidth (Mb/s)
542
542
* @consumed_down: Consumed downstream bandwidth (Mb/s)
543
543
*
544
544
* Calculates consumed USB3 and PCIe bandwidth at @port between path
···
589
589
* @src_port: Source protocol adapter
590
590
* @dst_port: Destination protocol adapter
591
591
* @port: USB4 port the consumed bandwidth is calculated
592
-
* @consumed_up: Consumed upsream bandwidth (Mb/s)
592
+
* @consumed_up: Consumed upstream bandwidth (Mb/s)
593
593
* @consumed_down: Consumed downstream bandwidth (Mb/s)
594
594
*
595
595
* Calculates consumed DP bandwidth at @port between path from @src_port
···
1115
1115
1116
1116
/*
1117
1117
* Here requested + consumed > threshold so we need to
1118
-
* transtion the link into asymmetric now.
1118
+
* transition the link into asymmetric now.
1119
1119
*/
1120
1120
ret = tb_switch_set_link_width(up->sw, width_up);
1121
1121
if (ret) {
···
1936
1936
*/
1937
1937
tb_recalc_estimated_bandwidth(tb);
1938
1938
/*
1939
-
* In case of DP tunnel exists, change host
1939
+
* In case DP tunnel exists, change host
1940
1940
* router's 1st children TMU mode to HiFi for
1941
1941
* CL0s to work.
1942
1942
*/
···
2636
2636
* the 10s already expired and we should
2637
2637
* give the reserved back to others).
2638
2638
*/
2639
-
mod_delayed_work(system_wq, &group->release_work,
2639
+
mod_delayed_work(system_percpu_wq, &group->release_work,
2640
2640
msecs_to_jiffies(TB_RELEASE_BW_TIMEOUT));
2641
2641
}
2642
2642
}
···
2786
2786
* There is no request active so this means the
2787
2787
* BW allocation mode was enabled from graphics
2788
2788
* side. At this point we know that the graphics
2789
-
* driver has read the DRPX capabilities so we
2790
-
* can offer an better bandwidth estimatation.
2789
+
* driver has read the DPRX capabilities so we
2790
+
* can offer better bandwidth estimation.
2791
2791
*/
2792
2792
tb_port_dbg(in, "DPTX enabled bandwidth allocation mode, updating estimated bandwidth\n");
2793
2793
tb_recalc_estimated_bandwidth(tb);
+7
-7
drivers/thunderbolt/tb.h
+7
-7
drivers/thunderbolt/tb.h
···
308
308
* struct usb4_port - USB4 port device
309
309
* @dev: Device for the port
310
310
* @port: Pointer to the lane 0 adapter
311
-
* @can_offline: Does the port have necessary platform support to moved
311
+
* @can_offline: Does the port have necessary platform support to move
312
312
* it into offline mode and back
313
313
* @offline: The port is currently in offline mode
314
314
* @margining: Pointer to margining structure if enabled
···
355
355
* struct tb_path_hop - routing information for a tb_path
356
356
* @in_port: Ingress port of a switch
357
357
* @out_port: Egress port of a switch where the packet is routed out
358
-
* (must be on the same switch than @in_port)
358
+
* (must be on the same switch as @in_port)
359
359
* @in_hop_index: HopID where the path configuration entry is placed in
360
360
* the path config space of @in_port.
361
361
* @in_counter_index: Used counter index (not used in the driver
···
499
499
* performed. If this returns %-EOPNOTSUPP then the
500
500
* native USB4 router operation is called.
501
501
* @usb4_switch_nvm_authenticate_status: Optional callback that the CM
502
-
* implementation can be used to
503
-
* return status of USB4 NVM_AUTH
504
-
* router operation.
502
+
* implementation can use to return
503
+
* status of USB4 NVM_AUTH router
504
+
* operation.
505
505
*/
506
506
struct tb_cm_ops {
507
507
int (*driver_ready)(struct tb *tb);
···
1109
1109
struct tb_port *prev);
1110
1110
1111
1111
/**
1112
-
* tb_port_path_direction_downstream() - Checks if path directed downstream
1112
+
* tb_port_path_direction_downstream() - Checks if path is directed downstream
1113
1113
* @src: Source adapter
1114
1114
* @dst: Destination adapter
1115
1115
*
···
1141
1141
(p) = tb_next_port_on_path((src), (dst), (p)))
1142
1142
1143
1143
/**
1144
-
* tb_for_each_upstream_port_on_path() - Iterate over each upstreamm port on path
1144
+
* tb_for_each_upstream_port_on_path() - Iterate over each upstream port on path
1145
1145
* @src: Source port
1146
1146
* @dst: Destination port
1147
1147
* @p: Port used as iterator
+3
-3
drivers/thunderbolt/tb_regs.h
+3
-3
drivers/thunderbolt/tb_regs.h
···
99
99
} __packed;
100
100
101
101
/**
102
-
* struct tb_cap_any - Structure capable of hold every capability
102
+
* struct tb_cap_any - Structure capable of holding every capability
103
103
* @basic: Basic capability
104
104
* @extended_short: Vendor specific capability
105
105
* @extended_long: Vendor specific extended capability
···
534
534
535
535
/*
536
536
* Used for Titan Ridge only. Bits are part of the same register: TMU_ADP_CS_6
537
-
* (see above) as in USB4 spec, but these specific bits used for Titan Ridge
538
-
* only and reserved in USB4 spec.
537
+
* (see above) as in USB4 spec, but these specific bits are used for Titan Ridge
538
+
* only and are reserved in USB4 spec.
539
539
*/
540
540
#define TMU_ADP_CS_6_DISABLE_TMU_OBJ_MASK GENMASK(3, 2)
541
541
#define TMU_ADP_CS_6_DISABLE_TMU_OBJ_CL1 BIT(2)
+2
-2
drivers/thunderbolt/tmu.c
+2
-2
drivers/thunderbolt/tmu.c
···
400
400
401
401
/**
402
402
* tb_switch_tmu_init() - Initialize switch TMU structures
403
-
* @sw: Switch to initialized
403
+
* @sw: Switch to be initialized
404
404
*
405
405
* This function must be called before other TMU related functions to
406
-
* makes the internal structures are filled in correctly. Does not
406
+
* make sure the internal structures are filled in correctly. Does not
407
407
* change any hardware configuration.
408
408
*
409
409
* Return: %0 on success, negative errno otherwise.
+7
-7
drivers/thunderbolt/tunnel.c
+7
-7
drivers/thunderbolt/tunnel.c
···
301
301
struct tb_port *port = tb_upstream_port(tunnel->dst_port->sw);
302
302
int ret;
303
303
304
-
/* Only supported of both routers are at least USB4 v2 */
304
+
/* Only supported if both routers are at least USB4 v2 */
305
305
if ((usb4_switch_version(tunnel->src_port->sw) < 2) ||
306
306
(usb4_switch_version(tunnel->dst_port->sw) < 2))
307
307
return 0;
···
1170
1170
1171
1171
/*
1172
1172
* DP IN adapter DP_LOCAL_CAP gets updated to the lowest AUX
1173
-
* read parameter values so this so we can use this to determine
1174
-
* the maximum possible bandwidth over this link.
1173
+
* read parameter values so we can use this to determine the
1174
+
* maximum possible bandwidth over this link.
1175
1175
*
1176
1176
* See USB4 v2 spec 1.0 10.4.4.5.
1177
1177
*/
···
1783
1783
1784
1784
/*
1785
1785
* First lane adapter is the one connected to the remote host.
1786
-
* We don't tunnel other traffic over this link so can use all
1787
-
* the credits (except the ones reserved for control traffic).
1786
+
* We don't tunnel other traffic over this link so we can use
1787
+
* all the credits (except the ones reserved for control traffic).
1788
1788
*/
1789
1789
hop = &path->hops[0];
1790
1790
tmp = min(tb_usable_credits(hop->in_port), credits);
···
2044
2044
2045
2045
/*
2046
2046
* PCIe tunneling, if enabled, affects the USB3 bandwidth so
2047
-
* take that it into account here.
2047
+
* take that into account here.
2048
2048
*/
2049
2049
*consumed_up = tunnel->allocated_up *
2050
2050
(TB_USB3_WEIGHT + pcie_weight) / TB_USB3_WEIGHT;
···
2605
2605
* @tunnel: Tunnel whose unused bandwidth to release
2606
2606
*
2607
2607
* If tunnel supports dynamic bandwidth management (USB3 tunnels at the
2608
-
* moment) this function makes it to release all the unused bandwidth.
2608
+
* moment) this function makes it release all the unused bandwidth.
2609
2609
*
2610
2610
* Return: %0 on success, negative errno otherwise.
2611
2611
*/
+13
-13
drivers/thunderbolt/usb4.c
+13
-13
drivers/thunderbolt/usb4.c
···
284
284
val |= ROUTER_CS_5_PTO;
285
285
/*
286
286
* xHCI can be enabled if PCIe tunneling is supported
287
-
* and the parent does not have any USB3 dowstream
287
+
* and the parent does not have any USB3 downstream
288
288
* adapters (so we cannot do USB 3.x tunneling).
289
289
*/
290
290
if (xhci)
···
1342
1342
* usb4_port_sb_read() - Read from sideband register
1343
1343
* @port: USB4 port to read
1344
1344
* @target: Sideband target
1345
-
* @index: Retimer index if taget is %USB4_SB_TARGET_RETIMER
1345
+
* @index: Retimer index if target is %USB4_SB_TARGET_RETIMER
1346
1346
* @reg: Sideband register index
1347
1347
* @buf: Buffer where the sideband data is copied
1348
1348
* @size: Size of @buf
···
1395
1395
* usb4_port_sb_write() - Write to sideband register
1396
1396
* @port: USB4 port to write
1397
1397
* @target: Sideband target
1398
-
* @index: Retimer index if taget is %USB4_SB_TARGET_RETIMER
1398
+
* @index: Retimer index if target is %USB4_SB_TARGET_RETIMER
1399
1399
* @reg: Sideband register index
1400
1400
* @buf: Data to write
1401
1401
* @size: Size of @buf
···
1527
1527
}
1528
1528
1529
1529
/**
1530
-
* usb4_port_router_online() - Put the USB4 port back to online
1530
+
* usb4_port_router_online() - Put the USB4 port back online
1531
1531
* @port: USB4 port
1532
1532
*
1533
1533
* Makes the USB4 port functional again.
···
1692
1692
}
1693
1693
1694
1694
/**
1695
-
* usb4_port_margining_caps() - Read USB4 port marginig capabilities
1695
+
* usb4_port_margining_caps() - Read USB4 port margining capabilities
1696
1696
* @port: USB4 port
1697
1697
* @target: Sideband target
1698
-
* @index: Retimer index if taget is %USB4_SB_TARGET_RETIMER
1698
+
* @index: Retimer index if target is %USB4_SB_TARGET_RETIMER
1699
1699
* @caps: Array with at least two elements to hold the results
1700
1700
* @ncaps: Number of elements in the caps array
1701
1701
*
···
1721
1721
* usb4_port_hw_margin() - Run hardware lane margining on port
1722
1722
* @port: USB4 port
1723
1723
* @target: Sideband target
1724
-
* @index: Retimer index if taget is %USB4_SB_TARGET_RETIMER
1724
+
* @index: Retimer index if target is %USB4_SB_TARGET_RETIMER
1725
1725
* @params: Parameters for USB4 hardware margining
1726
1726
* @results: Array to hold the results
1727
1727
* @nresults: Number of elements in the results array
···
1769
1769
* usb4_port_sw_margin() - Run software lane margining on port
1770
1770
* @port: USB4 port
1771
1771
* @target: Sideband target
1772
-
* @index: Retimer index if taget is %USB4_SB_TARGET_RETIMER
1772
+
* @index: Retimer index if target is %USB4_SB_TARGET_RETIMER
1773
1773
* @params: Parameters for USB4 software margining
1774
1774
* @results: Data word for the operation completion data
1775
1775
*
···
1819
1819
* usb4_port_sw_margin_errors() - Read the software margining error counters
1820
1820
* @port: USB4 port
1821
1821
* @target: Sideband target
1822
-
* @index: Retimer index if taget is %USB4_SB_TARGET_RETIMER
1822
+
* @index: Retimer index if target is %USB4_SB_TARGET_RETIMER
1823
1823
* @errors: Error metadata is copied here.
1824
1824
*
1825
1825
* This reads back the software margining error counters from the port.
···
1853
1853
* @port: USB4 port
1854
1854
* @index: Retimer index
1855
1855
*
1856
-
* Enables sideband channel transations on SBTX. Can be used when USB4
1856
+
* Enables sideband channel transactions on SBTX. Can be used when USB4
1857
1857
* link does not go up, for example if there is no device connected.
1858
1858
*
1859
1859
* Return: %0 on success, negative errno otherwise.
···
1882
1882
* @port: USB4 port
1883
1883
* @index: Retimer index
1884
1884
*
1885
-
* Disables sideband channel transations on SBTX. The reverse of
1885
+
* Disables sideband channel transactions on SBTX. The reverse of
1886
1886
* usb4_port_retimer_set_inbound_sbtx().
1887
1887
*
1888
1888
* Return: %0 on success, negative errno otherwise.
···
1981
1981
* @index: Retimer index
1982
1982
* @address: Start offset
1983
1983
*
1984
-
* Exlicitly sets NVM write offset. Normally when writing to NVM this is
1984
+
* Explicitly sets NVM write offset. Normally when writing to NVM this is
1985
1985
* done automatically by usb4_port_retimer_nvm_write().
1986
1986
*
1987
1987
* Return: %0 on success, negative errno otherwise.
···
2190
2190
}
2191
2191
2192
2192
/**
2193
-
* usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
2193
+
* usb4_usb3_port_max_link_rate() - Maximum supported USB3 link rate
2194
2194
* @port: USB3 adapter port
2195
2195
*
2196
2196
* Return: Maximum supported link rate of a USB3 adapter in Mb/s.
+2
-2
drivers/thunderbolt/xdomain.c
+2
-2
drivers/thunderbolt/xdomain.c
···
1951
1951
/**
1952
1952
* tb_xdomain_alloc() - Allocate new XDomain object
1953
1953
* @tb: Domain where the XDomain belongs
1954
-
* @parent: Parent device (the switch through the connection to the
1955
-
* other domain is reached).
1954
+
* @parent: Parent device (the switch through which the other domain
1955
+
* is reached).
1956
1956
* @route: Route string used to reach the other domain
1957
1957
* @local_uuid: Our local domain UUID
1958
1958
* @remote_uuid: UUID of the other domain (optional)
-1
drivers/usb/cdns3/cdns3-gadget.c
-1
drivers/usb/cdns3/cdns3-gadget.c
-1
drivers/usb/cdns3/cdnsp-gadget.c
-1
drivers/usb/cdns3/cdnsp-gadget.c
···
1999
1999
struct cdnsp_device *pdev = cdns->gadget_dev;
2000
2000
2001
2001
devm_free_irq(pdev->dev, cdns->dev_irq, pdev);
2002
-
pm_runtime_mark_last_busy(cdns->dev);
2003
2002
pm_runtime_put_autosuspend(cdns->dev);
2004
2003
usb_del_gadget(&pdev->gadget);
2005
2004
cdnsp_gadget_free_endpoints(pdev);
-1
drivers/usb/chipidea/core.c
-1
drivers/usb/chipidea/core.c
-1
drivers/usb/chipidea/otg_fsm.c
-1
drivers/usb/chipidea/otg_fsm.c
+12
drivers/usb/chipidea/usbmisc_imx.c
+12
drivers/usb/chipidea/usbmisc_imx.c
···
1224
1224
.power_lost_check = usbmisc_imx7d_power_lost_check,
1225
1225
};
1226
1226
1227
+
static const struct usbmisc_ops imx94_usbmisc_ops = {
1228
+
.init = usbmisc_imx7d_init,
1229
+
.set_wakeup = usbmisc_imx95_set_wakeup,
1230
+
.charger_detection = imx7d_charger_detection,
1231
+
.power_lost_check = usbmisc_imx7d_power_lost_check,
1232
+
.vbus_comparator_on = usbmisc_imx7d_vbus_comparator_on,
1233
+
};
1234
+
1227
1235
static const struct usbmisc_ops imx95_usbmisc_ops = {
1228
1236
.init = usbmisc_imx7d_init,
1229
1237
.set_wakeup = usbmisc_imx95_set_wakeup,
···
1488
1480
{
1489
1481
.compatible = "fsl,imx8ulp-usbmisc",
1490
1482
.data = &imx7ulp_usbmisc_ops,
1483
+
},
1484
+
{
1485
+
.compatible = "fsl,imx94-usbmisc",
1486
+
.data = &imx94_usbmisc_ops,
1491
1487
},
1492
1488
{
1493
1489
.compatible = "fsl,imx95-usbmisc",
+1
-1
drivers/usb/class/cdc-acm.c
+1
-1
drivers/usb/class/cdc-acm.c
···
1475
1475
if (!acm->country_codes)
1476
1476
goto skip_countries;
1477
1477
acm->country_code_size = cfd->bLength - 4;
1478
-
memcpy(acm->country_codes, (u8 *)&cfd->wCountyCode0,
1478
+
memcpy(acm->country_codes, cfd->wCountryCodes,
1479
1479
cfd->bLength - 4);
1480
1480
acm->country_rel_date = cfd->iCountryCodeRelDate;
1481
1481
+4
-8
drivers/usb/class/usbtmc.c
+4
-8
drivers/usb/class/usbtmc.c
···
1936
1936
u8 *buffer = NULL;
1937
1937
int rv;
1938
1938
unsigned int is_in, pipe;
1939
-
unsigned long res;
1940
1939
1941
-
res = copy_from_user(&request, arg, sizeof(struct usbtmc_ctrlrequest));
1942
-
if (res)
1940
+
if (copy_from_user(&request, arg, sizeof(struct usbtmc_ctrlrequest)))
1943
1941
return -EFAULT;
1944
1942
1945
1943
if (request.req.wLength > USBTMC_BUFSIZE)
···
1954
1956
1955
1957
if (!is_in) {
1956
1958
/* Send control data to device */
1957
-
res = copy_from_user(buffer, request.data,
1958
-
request.req.wLength);
1959
-
if (res) {
1959
+
if (copy_from_user(buffer, request.data,
1960
+
request.req.wLength)) {
1960
1961
rv = -EFAULT;
1961
1962
goto exit;
1962
1963
}
···
1981
1984
1982
1985
if (rv && is_in) {
1983
1986
/* Read control data from device */
1984
-
res = copy_to_user(request.data, buffer, rv);
1985
-
if (res)
1987
+
if (copy_to_user(request.data, buffer, rv))
1986
1988
rv = -EFAULT;
1987
1989
}
1988
1990
+4
-1
drivers/usb/core/Makefile
+4
-1
drivers/usb/core/Makefile
···
3
3
# Makefile for USB Core files and filesystem
4
4
#
5
5
6
+
# define_trace.h needs to know how to find our header
7
+
CFLAGS_trace.o := -I$(src)
8
+
6
9
usbcore-y := usb.o hub.o hcd.o urb.o message.o driver.o
7
10
usbcore-y += config.o file.o buffer.o sysfs.o endpoint.o
8
11
usbcore-y += devio.o notify.o generic.o quirks.o devices.o
9
-
usbcore-y += phy.o port.o
12
+
usbcore-y += phy.o port.o trace.o
10
13
11
14
usbcore-$(CONFIG_OF) += of.o
12
15
usbcore-$(CONFIG_USB_XHCI_SIDEBAND) += offload.o
+4
-4
drivers/usb/core/hcd.c
+4
-4
drivers/usb/core/hcd.c
···
2696
2696
kfree(hcd);
2697
2697
}
2698
2698
2699
-
struct usb_hcd *usb_get_hcd (struct usb_hcd *hcd)
2699
+
struct usb_hcd *usb_get_hcd(struct usb_hcd *hcd)
2700
2700
{
2701
2701
if (hcd)
2702
-
kref_get (&hcd->kref);
2702
+
kref_get(&hcd->kref);
2703
2703
return hcd;
2704
2704
}
2705
2705
EXPORT_SYMBOL_GPL(usb_get_hcd);
2706
2706
2707
-
void usb_put_hcd (struct usb_hcd *hcd)
2707
+
void usb_put_hcd(struct usb_hcd *hcd)
2708
2708
{
2709
2709
if (hcd)
2710
-
kref_put (&hcd->kref, hcd_release);
2710
+
kref_put(&hcd->kref, hcd_release);
2711
2711
}
2712
2712
EXPORT_SYMBOL_GPL(usb_put_hcd);
2713
2713
+22
-21
drivers/usb/core/hub.c
+22
-21
drivers/usb/core/hub.c
···
28
28
#include <linux/usb/otg.h>
29
29
#include <linux/usb/quirks.h>
30
30
#include <linux/workqueue.h>
31
+
#include <linux/minmax.h>
31
32
#include <linux/mutex.h>
32
33
#include <linux/random.h>
33
34
#include <linux/pm_qos.h>
···
41
40
#include "hub.h"
42
41
#include "phy.h"
43
42
#include "otg_productlist.h"
43
+
#include "trace.h"
44
44
45
45
#define USB_VENDOR_GENESYS_LOGIC 0x05e3
46
46
#define USB_VENDOR_SMSC 0x0424
···
279
277
* device and the parent hub into U0. The exit latency is the bigger of
280
278
* the device exit latency or the hub exit latency.
281
279
*/
282
-
if (udev_exit_latency > hub_exit_latency)
283
-
first_link_pel = udev_exit_latency * 1000;
284
-
else
285
-
first_link_pel = hub_exit_latency * 1000;
280
+
first_link_pel = max(udev_exit_latency, hub_exit_latency) * 1000;
286
281
287
282
/*
288
283
* When the hub starts to receive the LFPS, there is a slight delay for
···
293
294
* According to figure C-7 in the USB 3.0 spec, the PEL for this device
294
295
* is the greater of the two exit latencies.
295
296
*/
296
-
if (first_link_pel > hub_pel)
297
-
udev_lpm_params->pel = first_link_pel;
298
-
else
299
-
udev_lpm_params->pel = hub_pel;
297
+
udev_lpm_params->pel = max(first_link_pel, hub_pel);
300
298
}
301
299
302
300
/*
···
2143
2147
}
2144
2148
}
2145
2149
2150
+
static void update_usb_device_state(struct usb_device *udev,
2151
+
enum usb_device_state new_state)
2152
+
{
2153
+
if (udev->state == USB_STATE_SUSPENDED &&
2154
+
new_state != USB_STATE_SUSPENDED)
2155
+
udev->active_duration -= jiffies;
2156
+
else if (new_state == USB_STATE_SUSPENDED &&
2157
+
udev->state != USB_STATE_SUSPENDED)
2158
+
udev->active_duration += jiffies;
2159
+
2160
+
udev->state = new_state;
2161
+
update_port_device_state(udev);
2162
+
trace_usb_set_device_state(udev);
2163
+
}
2164
+
2146
2165
static void recursively_mark_NOTATTACHED(struct usb_device *udev)
2147
2166
{
2148
2167
struct usb_hub *hub = usb_hub_to_struct_hub(udev);
···
2167
2156
if (hub->ports[i]->child)
2168
2157
recursively_mark_NOTATTACHED(hub->ports[i]->child);
2169
2158
}
2170
-
if (udev->state == USB_STATE_SUSPENDED)
2171
-
udev->active_duration -= jiffies;
2172
-
udev->state = USB_STATE_NOTATTACHED;
2173
-
update_port_device_state(udev);
2159
+
update_usb_device_state(udev, USB_STATE_NOTATTACHED);
2174
2160
}
2175
2161
2176
2162
/**
···
2217
2209
else
2218
2210
wakeup = 0;
2219
2211
}
2220
-
if (udev->state == USB_STATE_SUSPENDED &&
2221
-
new_state != USB_STATE_SUSPENDED)
2222
-
udev->active_duration -= jiffies;
2223
-
else if (new_state == USB_STATE_SUSPENDED &&
2224
-
udev->state != USB_STATE_SUSPENDED)
2225
-
udev->active_duration += jiffies;
2226
-
udev->state = new_state;
2227
-
update_port_device_state(udev);
2212
+
update_usb_device_state(udev, new_state);
2228
2213
} else
2229
2214
recursively_mark_NOTATTACHED(udev);
2230
2215
spin_unlock_irqrestore(&device_state_lock, flags);
···
6078
6077
* device was gone before the EHCI controller had handed its port
6079
6078
* over to the companion full-speed controller.
6080
6079
*/
6081
-
hub_wq = alloc_workqueue("usb_hub_wq", WQ_FREEZABLE, 0);
6080
+
hub_wq = alloc_workqueue("usb_hub_wq", WQ_FREEZABLE | WQ_PERCPU, 0);
6082
6081
if (hub_wq)
6083
6082
return 0;
6084
6083
+1
-1
drivers/usb/core/message.c
+1
-1
drivers/usb/core/message.c
+6
drivers/usb/core/trace.c
+6
drivers/usb/core/trace.c
+61
drivers/usb/core/trace.h
+61
drivers/usb/core/trace.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/*
3
+
* Copyright (C) 2025 Google LLC
4
+
*/
5
+
#undef TRACE_SYSTEM
6
+
#define TRACE_SYSTEM usbcore
7
+
8
+
#if !defined(_USB_CORE_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
9
+
#define _USB_CORE_TRACE_H
10
+
11
+
#include <linux/types.h>
12
+
#include <linux/tracepoint.h>
13
+
#include <linux/usb.h>
14
+
15
+
DECLARE_EVENT_CLASS(usb_core_log_usb_device,
16
+
TP_PROTO(struct usb_device *udev),
17
+
TP_ARGS(udev),
18
+
TP_STRUCT__entry(
19
+
__string(name, dev_name(&udev->dev))
20
+
__field(enum usb_device_speed, speed)
21
+
__field(enum usb_device_state, state)
22
+
__field(unsigned short, bus_mA)
23
+
__field(unsigned, authorized)
24
+
),
25
+
TP_fast_assign(
26
+
__assign_str(name);
27
+
__entry->speed = udev->speed;
28
+
__entry->state = udev->state;
29
+
__entry->bus_mA = udev->bus_mA;
30
+
__entry->authorized = udev->authorized;
31
+
),
32
+
TP_printk("usb %s speed %s state %s %dmA [%s]",
33
+
__get_str(name),
34
+
usb_speed_string(__entry->speed),
35
+
usb_state_string(__entry->state),
36
+
__entry->bus_mA,
37
+
__entry->authorized ? "authorized" : "unauthorized")
38
+
);
39
+
40
+
DEFINE_EVENT(usb_core_log_usb_device, usb_set_device_state,
41
+
TP_PROTO(struct usb_device *udev),
42
+
TP_ARGS(udev)
43
+
);
44
+
45
+
DEFINE_EVENT(usb_core_log_usb_device, usb_alloc_dev,
46
+
TP_PROTO(struct usb_device *udev),
47
+
TP_ARGS(udev)
48
+
);
49
+
50
+
51
+
#endif /* _USB_CORE_TRACE_H */
52
+
53
+
/* this part has to be here */
54
+
55
+
#undef TRACE_INCLUDE_PATH
56
+
#define TRACE_INCLUDE_PATH .
57
+
58
+
#undef TRACE_INCLUDE_FILE
59
+
#define TRACE_INCLUDE_FILE trace
60
+
61
+
#include <trace/define_trace.h>
+2
drivers/usb/core/usb.c
+2
drivers/usb/core/usb.c
···
46
46
#include <linux/dma-mapping.h>
47
47
48
48
#include "hub.h"
49
+
#include "trace.h"
49
50
50
51
const char *usbcore_name = "usbcore";
51
52
···
747
746
#endif
748
747
749
748
dev->authorized = usb_dev_authorized(dev, usb_hcd);
749
+
trace_usb_alloc_dev(dev);
750
750
return dev;
751
751
}
752
752
EXPORT_SYMBOL_GPL(usb_alloc_dev);
+12
-5
drivers/usb/dwc2/platform.c
+12
-5
drivers/usb/dwc2/platform.c
···
369
369
{
370
370
struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
371
371
372
-
dwc2_disable_global_interrupts(hsotg);
373
-
synchronize_irq(hsotg->irq);
374
-
375
-
if (hsotg->ll_hw_enabled)
372
+
if (hsotg->ll_hw_enabled) {
373
+
dwc2_disable_global_interrupts(hsotg);
374
+
synchronize_irq(hsotg->irq);
376
375
dwc2_lowlevel_hw_disable(hsotg);
376
+
}
377
377
}
378
378
379
379
/**
···
649
649
static int __maybe_unused dwc2_suspend(struct device *dev)
650
650
{
651
651
struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
652
-
bool is_device_mode = dwc2_is_device_mode(dwc2);
652
+
bool is_device_mode;
653
653
int ret = 0;
654
654
655
+
if (!dwc2->ll_hw_enabled)
656
+
return 0;
657
+
658
+
is_device_mode = dwc2_is_device_mode(dwc2);
655
659
if (is_device_mode)
656
660
dwc2_hsotg_suspend(dwc2);
657
661
···
731
727
{
732
728
struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
733
729
int ret = 0;
730
+
731
+
if (!dwc2->ll_hw_enabled)
732
+
return 0;
734
733
735
734
if (dwc2->phy_off_for_suspend && dwc2->ll_hw_enabled) {
736
735
ret = __dwc2_lowlevel_hw_enable(dwc2);
+11
drivers/usb/dwc3/Kconfig
+11
drivers/usb/dwc3/Kconfig
···
200
200
the dwc3 child node in the device tree.
201
201
Say 'Y' or 'M' here if your platform integrates DWC3 in a similar way.
202
202
203
+
config USB_DWC3_APPLE
204
+
tristate "Apple Silicon DWC3 Platform Driver"
205
+
depends on OF && ARCH_APPLE
206
+
default USB_DWC3
207
+
select USB_ROLE_SWITCH
208
+
help
209
+
Support Apple Silicon SoCs with DesignWare Core USB3 IP.
210
+
The DesignWare Core USB3 IP has to be used in dual-role
211
+
mode on these machines.
212
+
Say 'Y' or 'M' if you have such device.
213
+
203
214
endif
+1
drivers/usb/dwc3/Makefile
+1
drivers/usb/dwc3/Makefile
+21
-13
drivers/usb/dwc3/core.c
+21
-13
drivers/usb/dwc3/core.c
···
133
133
dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(i), reg);
134
134
}
135
135
}
136
+
EXPORT_SYMBOL_GPL(dwc3_enable_susphy);
136
137
137
138
void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode, bool ignore_susphy)
138
139
{
···
160
159
dwc->current_dr_role = mode;
161
160
trace_dwc3_set_prtcap(mode);
162
161
}
162
+
EXPORT_SYMBOL_GPL(dwc3_set_prtcap);
163
163
164
164
static void __dwc3_set_mode(struct work_struct *work)
165
165
{
···
283
281
}
284
282
285
283
out:
286
-
pm_runtime_mark_last_busy(dwc->dev);
287
284
pm_runtime_put_autosuspend(dwc->dev);
288
285
mutex_unlock(&dwc->mutex);
289
286
}
···
977
976
clk_disable_unprepare(dwc->bus_clk);
978
977
}
979
978
980
-
static void dwc3_core_exit(struct dwc3 *dwc)
979
+
void dwc3_core_exit(struct dwc3 *dwc)
981
980
{
982
981
dwc3_event_buffers_cleanup(dwc);
983
982
dwc3_phy_power_off(dwc);
···
985
984
dwc3_clk_disable(dwc);
986
985
reset_control_assert(dwc->reset);
987
986
}
987
+
EXPORT_SYMBOL_GPL(dwc3_core_exit);
988
988
989
989
static bool dwc3_core_is_valid(struct dwc3 *dwc)
990
990
{
···
1331
1329
*
1332
1330
* Returns 0 on success otherwise negative errno.
1333
1331
*/
1334
-
static int dwc3_core_init(struct dwc3 *dwc)
1332
+
int dwc3_core_init(struct dwc3 *dwc)
1335
1333
{
1336
1334
unsigned int hw_mode;
1337
1335
u32 reg;
···
1484
1482
1485
1483
dwc3_config_threshold(dwc);
1486
1484
1487
-
/*
1488
-
* Modify this for all supported Super Speed ports when
1489
-
* multiport support is added.
1490
-
*/
1491
1485
if (hw_mode != DWC3_GHWPARAMS0_MODE_GADGET &&
1492
1486
(DWC3_IP_IS(DWC31)) &&
1493
1487
dwc->maximum_speed == USB_SPEED_SUPER) {
···
1527
1529
1528
1530
return ret;
1529
1531
}
1532
+
EXPORT_SYMBOL_GPL(dwc3_core_init);
1530
1533
1531
1534
static int dwc3_core_get_phy(struct dwc3 *dwc)
1532
1535
{
···
1666
1667
dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE, true);
1667
1668
}
1668
1669
1669
-
static void dwc3_get_software_properties(struct dwc3 *dwc)
1670
+
static void dwc3_get_software_properties(struct dwc3 *dwc,
1671
+
const struct dwc3_properties *properties)
1670
1672
{
1671
1673
struct device *tmpdev;
1672
1674
u16 gsbuscfg0_reqinfo;
1673
1675
int ret;
1674
1676
1675
1677
dwc->gsbuscfg0_reqinfo = DWC3_GSBUSCFG0_REQINFO_UNSPECIFIED;
1678
+
1679
+
if (properties->gsbuscfg0_reqinfo !=
1680
+
DWC3_GSBUSCFG0_REQINFO_UNSPECIFIED) {
1681
+
dwc->gsbuscfg0_reqinfo = properties->gsbuscfg0_reqinfo;
1682
+
return;
1683
+
}
1676
1684
1677
1685
/*
1678
1686
* Iterate over all parent nodes for finding swnode properties
···
2213
2207
2214
2208
dwc3_get_properties(dwc);
2215
2209
2216
-
dwc3_get_software_properties(dwc);
2210
+
dwc3_get_software_properties(dwc, &data->properties);
2217
2211
2218
2212
dwc->usb_psy = dwc3_get_usb_power_supply(dwc);
2219
2213
if (IS_ERR(dwc->usb_psy))
···
2306
2300
dwc3_check_params(dwc);
2307
2301
dwc3_debugfs_init(dwc);
2308
2302
2309
-
ret = dwc3_core_init_mode(dwc);
2310
-
if (ret)
2311
-
goto err_exit_debugfs;
2303
+
if (!data->skip_core_init_mode) {
2304
+
ret = dwc3_core_init_mode(dwc);
2305
+
if (ret)
2306
+
goto err_exit_debugfs;
2307
+
}
2312
2308
2313
2309
pm_runtime_put(dev);
2314
2310
···
2365
2357
2366
2358
probe_data.dwc = dwc;
2367
2359
probe_data.res = res;
2360
+
probe_data.properties = DWC3_DEFAULT_PROPERTIES;
2368
2361
2369
2362
return dwc3_core_probe(&probe_data);
2370
2363
}
···
2654
2645
break;
2655
2646
}
2656
2647
2657
-
pm_runtime_mark_last_busy(dev);
2658
2648
pm_runtime_autosuspend(dev);
2659
2649
2660
2650
return 0;
+1
drivers/usb/dwc3/drd.c
+1
drivers/usb/dwc3/drd.c
···
515
515
dwc3_role_switch.set = dwc3_usb_role_switch_set;
516
516
dwc3_role_switch.get = dwc3_usb_role_switch_get;
517
517
dwc3_role_switch.driver_data = dwc;
518
+
dwc3_role_switch.allow_userspace_control = true;
518
519
dwc->role_sw = usb_role_switch_register(dwc->dev, &dwc3_role_switch);
519
520
if (IS_ERR(dwc->role_sw))
520
521
return PTR_ERR(dwc->role_sw);
-1
drivers/usb/dwc3/dwc3-am62.c
-1
drivers/usb/dwc3/dwc3-am62.c
+489
drivers/usb/dwc3/dwc3-apple.c
+489
drivers/usb/dwc3/dwc3-apple.c
···
1
+
// SPDX-License-Identifier: GPL-2.0
2
+
/*
3
+
* Apple Silicon DWC3 Glue driver
4
+
* Copyright (C) The Asahi Linux Contributors
5
+
*
6
+
* Based on:
7
+
* - dwc3-qcom.c Copyright (c) 2018, The Linux Foundation. All rights reserved.
8
+
* - dwc3-of-simple.c Copyright (c) 2015 Texas Instruments Incorporated - https://www.ti.com
9
+
*/
10
+
11
+
#include <linux/of.h>
12
+
#include <linux/module.h>
13
+
#include <linux/mutex.h>
14
+
#include <linux/platform_device.h>
15
+
#include <linux/reset.h>
16
+
17
+
#include "glue.h"
18
+
19
+
/*
20
+
* This platform requires a very specific sequence of operations to bring up dwc3 and its USB3 PHY:
21
+
*
22
+
* 1) The PHY itself has to be brought up; for this we need to know the mode (USB3,
23
+
* USB3+DisplayPort, USB4, etc) and the lane orientation. This happens through typec_mux_set.
24
+
* 2) DWC3 has to be brought up but we must not touch the gadget area or start xhci yet.
25
+
* 3) The PHY bring-up has to be finalized and dwc3's PIPE interface has to be switched to the
26
+
* USB3 PHY, this is done inside phy_set_mode.
27
+
* 4) We can now initialize xhci or gadget mode.
28
+
*
29
+
* We can switch 1 and 2 but 3 has to happen after (1 and 2) and 4 has to happen after 3.
30
+
*
31
+
* And then to bring this all down again:
32
+
*
33
+
* 1) DWC3 has to exit host or gadget mode and must no longer touch those registers
34
+
* 2) The PHY has to switch dwc3's PIPE interface back to the dummy backend
35
+
* 3) The PHY itself can be shut down, this happens from typec_mux_set
36
+
*
37
+
* We also can't transition the PHY from one mode to another while dwc3 is up and running (this is
38
+
* slightly wrong, some transitions are possible, others aren't but because we have no documentation
39
+
* for this I'd rather play it safe).
40
+
*
41
+
* After both the PHY and dwc3 are initialized we will only ever see a single "new device connected"
42
+
* event. If we just keep them running only the first device plugged in will ever work. XHCI's port
43
+
* status register actually does show the correct state but no interrupt ever comes in. In gadget
44
+
* mode we don't even get a USBDisconnected event and everything looks like there's still something
45
+
* connected on the other end.
46
+
* This can be partially explained because the USB2 D+/D- lines are connected through a stateful
47
+
* eUSB2 repeater which in turn is controlled by a variant of the TI TPS6598x USB PD chip which
48
+
* resets the repeater out-of-band everytime the CC lines are (dis)connected. This then requires a
49
+
* PHY reset to make sure the PHY and the eUSB2 repeater state are synchronized again.
50
+
*
51
+
* And to make this all extra fun: If we get the order of some of this wrong either the port is just
52
+
* broken until a phy+dwc3 reset, or it's broken until a full SoC reset (likely because we can't
53
+
* reset some parts of the PHY), or some watchdog kicks in after a few seconds and forces a full SoC
54
+
* reset (mostly seen this with USB4/Thunderbolt but there's clearly some watchdog that hates
55
+
* invalid states).
56
+
*
57
+
* Hence there's really no good way to keep dwc3 fully up and running after we disconnect a cable
58
+
* because then we can't shut down the PHY anymore. And if we kept the PHY running in whatever mode
59
+
* it was until the next cable is connected we'd need to tear it all down and bring it back up again
60
+
* anyway to detect and use the next device.
61
+
*
62
+
* Instead, we just shut down everything when a cable is disconnected and transition to
63
+
* DWC3_APPLE_NO_CABLE.
64
+
* During initial probe we don't have any information about the connected cable and can't bring up
65
+
* the PHY properly and thus also can't fully bring up dwc3. Instead, we just keep everything off
66
+
* and defer the first dwc3 probe until we get the first cable connected event. Until then we stay
67
+
* in DWC3_APPLE_PROBE_PENDING.
68
+
* Once a cable is connected we then keep track of the controller mode here by transitioning to
69
+
* DWC3_APPLE_HOST or DWC3_APPLE_DEVICE.
70
+
*/
71
+
enum dwc3_apple_state {
72
+
DWC3_APPLE_PROBE_PENDING, /* Before first cable connection, dwc3_core_probe not called */
73
+
DWC3_APPLE_NO_CABLE, /* No cable connected, dwc3 suspended after dwc3_core_exit */
74
+
DWC3_APPLE_HOST, /* Cable connected, dwc3 in host mode */
75
+
DWC3_APPLE_DEVICE, /* Cable connected, dwc3 in device mode */
76
+
};
77
+
78
+
/**
79
+
* struct dwc3_apple - Apple-specific DWC3 USB controller
80
+
* @dwc: Core DWC3 structure
81
+
* @dev: Pointer to the device structure
82
+
* @mmio_resource: Resource to be passed to dwc3_core_probe
83
+
* @apple_regs: Apple-specific DWC3 registers
84
+
* @reset: Reset control
85
+
* @role_sw: USB role switch
86
+
* @lock: Mutex for synchronizing access
87
+
* @state: Current state of the controller, see documentation for the enum for details
88
+
*/
89
+
struct dwc3_apple {
90
+
struct dwc3 dwc;
91
+
92
+
struct device *dev;
93
+
struct resource *mmio_resource;
94
+
void __iomem *apple_regs;
95
+
96
+
struct reset_control *reset;
97
+
struct usb_role_switch *role_sw;
98
+
99
+
struct mutex lock;
100
+
101
+
enum dwc3_apple_state state;
102
+
};
103
+
104
+
#define to_dwc3_apple(d) container_of((d), struct dwc3_apple, dwc)
105
+
106
+
/*
107
+
* Apple Silicon dwc3 vendor-specific registers
108
+
*
109
+
* These registers were identified by tracing XNU's memory access patterns and correlating them with
110
+
* debug output over serial to determine their names. We don't exactly know what these do but
111
+
* without these USB3 devices sometimes don't work.
112
+
*/
113
+
#define APPLE_DWC3_REGS_START 0xcd00
114
+
#define APPLE_DWC3_REGS_END 0xcdff
115
+
116
+
#define APPLE_DWC3_CIO_LFPS_OFFSET 0xcd38
117
+
#define APPLE_DWC3_CIO_LFPS_OFFSET_VALUE 0xf800f80
118
+
119
+
#define APPLE_DWC3_CIO_BW_NGT_OFFSET 0xcd3c
120
+
#define APPLE_DWC3_CIO_BW_NGT_OFFSET_VALUE 0xfc00fc0
121
+
122
+
#define APPLE_DWC3_CIO_LINK_TIMER 0xcd40
123
+
#define APPLE_DWC3_CIO_PENDING_HP_TIMER GENMASK(23, 16)
124
+
#define APPLE_DWC3_CIO_PENDING_HP_TIMER_VALUE 0x14
125
+
#define APPLE_DWC3_CIO_PM_LC_TIMER GENMASK(15, 8)
126
+
#define APPLE_DWC3_CIO_PM_LC_TIMER_VALUE 0xa
127
+
#define APPLE_DWC3_CIO_PM_ENTRY_TIMER GENMASK(7, 0)
128
+
#define APPLE_DWC3_CIO_PM_ENTRY_TIMER_VALUE 0x10
129
+
130
+
static inline void dwc3_apple_writel(struct dwc3_apple *appledwc, u32 offset, u32 value)
131
+
{
132
+
writel(value, appledwc->apple_regs + offset - APPLE_DWC3_REGS_START);
133
+
}
134
+
135
+
static inline u32 dwc3_apple_readl(struct dwc3_apple *appledwc, u32 offset)
136
+
{
137
+
return readl(appledwc->apple_regs + offset - APPLE_DWC3_REGS_START);
138
+
}
139
+
140
+
static inline void dwc3_apple_mask(struct dwc3_apple *appledwc, u32 offset, u32 mask, u32 value)
141
+
{
142
+
u32 reg;
143
+
144
+
reg = dwc3_apple_readl(appledwc, offset);
145
+
reg &= ~mask;
146
+
reg |= value;
147
+
dwc3_apple_writel(appledwc, offset, reg);
148
+
}
149
+
150
+
static void dwc3_apple_setup_cio(struct dwc3_apple *appledwc)
151
+
{
152
+
dwc3_apple_writel(appledwc, APPLE_DWC3_CIO_LFPS_OFFSET, APPLE_DWC3_CIO_LFPS_OFFSET_VALUE);
153
+
dwc3_apple_writel(appledwc, APPLE_DWC3_CIO_BW_NGT_OFFSET,
154
+
APPLE_DWC3_CIO_BW_NGT_OFFSET_VALUE);
155
+
dwc3_apple_mask(appledwc, APPLE_DWC3_CIO_LINK_TIMER, APPLE_DWC3_CIO_PENDING_HP_TIMER,
156
+
FIELD_PREP(APPLE_DWC3_CIO_PENDING_HP_TIMER,
157
+
APPLE_DWC3_CIO_PENDING_HP_TIMER_VALUE));
158
+
dwc3_apple_mask(appledwc, APPLE_DWC3_CIO_LINK_TIMER, APPLE_DWC3_CIO_PM_LC_TIMER,
159
+
FIELD_PREP(APPLE_DWC3_CIO_PM_LC_TIMER, APPLE_DWC3_CIO_PM_LC_TIMER_VALUE));
160
+
dwc3_apple_mask(appledwc, APPLE_DWC3_CIO_LINK_TIMER, APPLE_DWC3_CIO_PM_ENTRY_TIMER,
161
+
FIELD_PREP(APPLE_DWC3_CIO_PM_ENTRY_TIMER,
162
+
APPLE_DWC3_CIO_PM_ENTRY_TIMER_VALUE));
163
+
}
164
+
165
+
static void dwc3_apple_set_ptrcap(struct dwc3_apple *appledwc, u32 mode)
166
+
{
167
+
guard(spinlock_irqsave)(&appledwc->dwc.lock);
168
+
dwc3_set_prtcap(&appledwc->dwc, mode, false);
169
+
}
170
+
171
+
static int dwc3_apple_core_probe(struct dwc3_apple *appledwc)
172
+
{
173
+
struct dwc3_probe_data probe_data = {};
174
+
int ret;
175
+
176
+
lockdep_assert_held(&appledwc->lock);
177
+
WARN_ON_ONCE(appledwc->state != DWC3_APPLE_PROBE_PENDING);
178
+
179
+
appledwc->dwc.dev = appledwc->dev;
180
+
probe_data.dwc = &appledwc->dwc;
181
+
probe_data.res = appledwc->mmio_resource;
182
+
probe_data.ignore_clocks_and_resets = true;
183
+
probe_data.skip_core_init_mode = true;
184
+
probe_data.properties = DWC3_DEFAULT_PROPERTIES;
185
+
186
+
ret = dwc3_core_probe(&probe_data);
187
+
if (ret)
188
+
return ret;
189
+
190
+
appledwc->state = DWC3_APPLE_NO_CABLE;
191
+
return 0;
192
+
}
193
+
194
+
static int dwc3_apple_core_init(struct dwc3_apple *appledwc)
195
+
{
196
+
int ret;
197
+
198
+
lockdep_assert_held(&appledwc->lock);
199
+
200
+
switch (appledwc->state) {
201
+
case DWC3_APPLE_PROBE_PENDING:
202
+
ret = dwc3_apple_core_probe(appledwc);
203
+
if (ret)
204
+
dev_err(appledwc->dev, "Failed to probe DWC3 Core, err=%d\n", ret);
205
+
break;
206
+
case DWC3_APPLE_NO_CABLE:
207
+
ret = dwc3_core_init(&appledwc->dwc);
208
+
if (ret)
209
+
dev_err(appledwc->dev, "Failed to initialize DWC3 Core, err=%d\n", ret);
210
+
break;
211
+
default:
212
+
/* Unreachable unless there's a bug in this driver */
213
+
WARN_ON_ONCE(1);
214
+
ret = -EINVAL;
215
+
break;
216
+
}
217
+
218
+
return ret;
219
+
}
220
+
221
+
static void dwc3_apple_phy_set_mode(struct dwc3_apple *appledwc, enum phy_mode mode)
222
+
{
223
+
lockdep_assert_held(&appledwc->lock);
224
+
225
+
/*
226
+
* This platform requires SUSPHY to be enabled here already in order to properly configure
227
+
* the PHY and switch dwc3's PIPE interface to USB3 PHY.
228
+
*/
229
+
dwc3_enable_susphy(&appledwc->dwc, true);
230
+
phy_set_mode(appledwc->dwc.usb2_generic_phy[0], mode);
231
+
phy_set_mode(appledwc->dwc.usb3_generic_phy[0], mode);
232
+
}
233
+
234
+
static int dwc3_apple_init(struct dwc3_apple *appledwc, enum dwc3_apple_state state)
235
+
{
236
+
int ret, ret_reset;
237
+
238
+
lockdep_assert_held(&appledwc->lock);
239
+
240
+
ret = reset_control_deassert(appledwc->reset);
241
+
if (ret) {
242
+
dev_err(appledwc->dev, "Failed to deassert reset, err=%d\n", ret);
243
+
return ret;
244
+
}
245
+
246
+
ret = dwc3_apple_core_init(appledwc);
247
+
if (ret)
248
+
goto reset_assert;
249
+
250
+
/*
251
+
* Now that the core is initialized and already went through dwc3_core_soft_reset we can
252
+
* configure some unknown Apple-specific settings and then bring up xhci or gadget mode.
253
+
*/
254
+
dwc3_apple_setup_cio(appledwc);
255
+
256
+
switch (state) {
257
+
case DWC3_APPLE_HOST:
258
+
appledwc->dwc.dr_mode = USB_DR_MODE_HOST;
259
+
dwc3_apple_set_ptrcap(appledwc, DWC3_GCTL_PRTCAP_HOST);
260
+
dwc3_apple_phy_set_mode(appledwc, PHY_MODE_USB_HOST);
261
+
ret = dwc3_host_init(&appledwc->dwc);
262
+
if (ret) {
263
+
dev_err(appledwc->dev, "Failed to initialize host, ret=%d\n", ret);
264
+
goto core_exit;
265
+
}
266
+
267
+
break;
268
+
case DWC3_APPLE_DEVICE:
269
+
appledwc->dwc.dr_mode = USB_DR_MODE_PERIPHERAL;
270
+
dwc3_apple_set_ptrcap(appledwc, DWC3_GCTL_PRTCAP_DEVICE);
271
+
dwc3_apple_phy_set_mode(appledwc, PHY_MODE_USB_DEVICE);
272
+
ret = dwc3_gadget_init(&appledwc->dwc);
273
+
if (ret) {
274
+
dev_err(appledwc->dev, "Failed to initialize gadget, ret=%d\n", ret);
275
+
goto core_exit;
276
+
}
277
+
break;
278
+
default:
279
+
/* Unreachable unless there's a bug in this driver */
280
+
WARN_ON_ONCE(1);
281
+
ret = -EINVAL;
282
+
goto core_exit;
283
+
}
284
+
285
+
appledwc->state = state;
286
+
return 0;
287
+
288
+
core_exit:
289
+
dwc3_core_exit(&appledwc->dwc);
290
+
reset_assert:
291
+
ret_reset = reset_control_assert(appledwc->reset);
292
+
if (ret_reset)
293
+
dev_warn(appledwc->dev, "Failed to assert reset, err=%d\n", ret_reset);
294
+
295
+
return ret;
296
+
}
297
+
298
+
static int dwc3_apple_exit(struct dwc3_apple *appledwc)
299
+
{
300
+
int ret = 0;
301
+
302
+
lockdep_assert_held(&appledwc->lock);
303
+
304
+
switch (appledwc->state) {
305
+
case DWC3_APPLE_PROBE_PENDING:
306
+
case DWC3_APPLE_NO_CABLE:
307
+
/* Nothing to do if we're already off */
308
+
return 0;
309
+
case DWC3_APPLE_DEVICE:
310
+
dwc3_gadget_exit(&appledwc->dwc);
311
+
break;
312
+
case DWC3_APPLE_HOST:
313
+
dwc3_host_exit(&appledwc->dwc);
314
+
break;
315
+
}
316
+
317
+
/*
318
+
* This platform requires SUSPHY to be enabled in order to properly power down the PHY
319
+
* and switch dwc3's PIPE interface back to a dummy PHY (i.e. no USB3 support and USB2 via
320
+
* a different PHY connected through ULPI).
321
+
*/
322
+
dwc3_enable_susphy(&appledwc->dwc, true);
323
+
dwc3_core_exit(&appledwc->dwc);
324
+
appledwc->state = DWC3_APPLE_NO_CABLE;
325
+
326
+
ret = reset_control_assert(appledwc->reset);
327
+
if (ret) {
328
+
dev_err(appledwc->dev, "Failed to assert reset, err=%d\n", ret);
329
+
return ret;
330
+
}
331
+
332
+
return 0;
333
+
}
334
+
335
+
static int dwc3_usb_role_switch_set(struct usb_role_switch *sw, enum usb_role role)
336
+
{
337
+
struct dwc3_apple *appledwc = usb_role_switch_get_drvdata(sw);
338
+
int ret;
339
+
340
+
guard(mutex)(&appledwc->lock);
341
+
342
+
/*
343
+
* We need to tear all of dwc3 down and re-initialize it every time a cable is
344
+
* connected or disconnected or when the mode changes. See the documentation for enum
345
+
* dwc3_apple_state for details.
346
+
*/
347
+
ret = dwc3_apple_exit(appledwc);
348
+
if (ret)
349
+
return ret;
350
+
351
+
switch (role) {
352
+
case USB_ROLE_NONE:
353
+
/* Nothing to do if no cable is connected */
354
+
return 0;
355
+
case USB_ROLE_HOST:
356
+
return dwc3_apple_init(appledwc, DWC3_APPLE_HOST);
357
+
case USB_ROLE_DEVICE:
358
+
return dwc3_apple_init(appledwc, DWC3_APPLE_DEVICE);
359
+
default:
360
+
dev_err(appledwc->dev, "Invalid target role: %d\n", role);
361
+
return -EINVAL;
362
+
}
363
+
}
364
+
365
+
static enum usb_role dwc3_usb_role_switch_get(struct usb_role_switch *sw)
366
+
{
367
+
struct dwc3_apple *appledwc = usb_role_switch_get_drvdata(sw);
368
+
369
+
guard(mutex)(&appledwc->lock);
370
+
371
+
switch (appledwc->state) {
372
+
case DWC3_APPLE_HOST:
373
+
return USB_ROLE_HOST;
374
+
case DWC3_APPLE_DEVICE:
375
+
return USB_ROLE_DEVICE;
376
+
case DWC3_APPLE_NO_CABLE:
377
+
case DWC3_APPLE_PROBE_PENDING:
378
+
return USB_ROLE_NONE;
379
+
default:
380
+
/* Unreachable unless there's a bug in this driver */
381
+
dev_err(appledwc->dev, "Invalid internal state: %d\n", appledwc->state);
382
+
return USB_ROLE_NONE;
383
+
}
384
+
}
385
+
386
+
static int dwc3_apple_setup_role_switch(struct dwc3_apple *appledwc)
387
+
{
388
+
struct usb_role_switch_desc dwc3_role_switch = { NULL };
389
+
390
+
dwc3_role_switch.fwnode = dev_fwnode(appledwc->dev);
391
+
dwc3_role_switch.set = dwc3_usb_role_switch_set;
392
+
dwc3_role_switch.get = dwc3_usb_role_switch_get;
393
+
dwc3_role_switch.driver_data = appledwc;
394
+
appledwc->role_sw = usb_role_switch_register(appledwc->dev, &dwc3_role_switch);
395
+
if (IS_ERR(appledwc->role_sw))
396
+
return PTR_ERR(appledwc->role_sw);
397
+
398
+
return 0;
399
+
}
400
+
401
+
static int dwc3_apple_probe(struct platform_device *pdev)
402
+
{
403
+
struct device *dev = &pdev->dev;
404
+
struct dwc3_apple *appledwc;
405
+
int ret;
406
+
407
+
appledwc = devm_kzalloc(&pdev->dev, sizeof(*appledwc), GFP_KERNEL);
408
+
if (!appledwc)
409
+
return -ENOMEM;
410
+
411
+
appledwc->dev = &pdev->dev;
412
+
mutex_init(&appledwc->lock);
413
+
414
+
appledwc->reset = devm_reset_control_get_exclusive(dev, NULL);
415
+
if (IS_ERR(appledwc->reset))
416
+
return dev_err_probe(&pdev->dev, PTR_ERR(appledwc->reset),
417
+
"Failed to get reset control\n");
418
+
419
+
ret = reset_control_assert(appledwc->reset);
420
+
if (ret) {
421
+
dev_err(&pdev->dev, "Failed to assert reset, err=%d\n", ret);
422
+
return ret;
423
+
}
424
+
425
+
appledwc->mmio_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dwc3-core");
426
+
if (!appledwc->mmio_resource) {
427
+
dev_err(dev, "Failed to get DWC3 MMIO\n");
428
+
return -EINVAL;
429
+
}
430
+
431
+
appledwc->apple_regs = devm_platform_ioremap_resource_byname(pdev, "dwc3-apple");
432
+
if (IS_ERR(appledwc->apple_regs))
433
+
return dev_err_probe(dev, PTR_ERR(appledwc->apple_regs),
434
+
"Failed to map Apple-specific MMIO\n");
435
+
436
+
/*
437
+
* On this platform, DWC3 can only be brought up after parts of the PHY have been
438
+
* initialized with knowledge of the target mode and cable orientation from typec_set_mux.
439
+
* Since this has not happened here we cannot setup DWC3 yet and instead defer this until
440
+
* the first cable is connected. See the documentation for enum dwc3_apple_state for
441
+
* details.
442
+
*/
443
+
appledwc->state = DWC3_APPLE_PROBE_PENDING;
444
+
ret = dwc3_apple_setup_role_switch(appledwc);
445
+
if (ret)
446
+
return dev_err_probe(&pdev->dev, ret, "Failed to setup role switch\n");
447
+
448
+
return 0;
449
+
}
450
+
451
+
static void dwc3_apple_remove(struct platform_device *pdev)
452
+
{
453
+
struct dwc3 *dwc = platform_get_drvdata(pdev);
454
+
struct dwc3_apple *appledwc = to_dwc3_apple(dwc);
455
+
456
+
guard(mutex)(&appledwc->lock);
457
+
458
+
usb_role_switch_unregister(appledwc->role_sw);
459
+
460
+
/*
461
+
* If we're still in DWC3_APPLE_PROBE_PENDING we never got any cable connected event and
462
+
* dwc3_core_probe was never called and there's hence no need to call dwc3_core_remove.
463
+
* dwc3_apple_exit can be called unconditionally because it checks the state itself.
464
+
*/
465
+
dwc3_apple_exit(appledwc);
466
+
if (appledwc->state != DWC3_APPLE_PROBE_PENDING)
467
+
dwc3_core_remove(&appledwc->dwc);
468
+
}
469
+
470
+
static const struct of_device_id dwc3_apple_of_match[] = {
471
+
{ .compatible = "apple,t8103-dwc3" },
472
+
{}
473
+
};
474
+
MODULE_DEVICE_TABLE(of, dwc3_apple_of_match);
475
+
476
+
static struct platform_driver dwc3_apple_driver = {
477
+
.probe = dwc3_apple_probe,
478
+
.remove = dwc3_apple_remove,
479
+
.driver = {
480
+
.name = "dwc3-apple",
481
+
.of_match_table = dwc3_apple_of_match,
482
+
},
483
+
};
484
+
485
+
module_platform_driver(dwc3_apple_driver);
486
+
487
+
MODULE_LICENSE("GPL");
488
+
MODULE_AUTHOR("Sven Peter <sven@kernel.org>");
489
+
MODULE_DESCRIPTION("DesignWare DWC3 Apple Silicon Glue Driver");
+70
drivers/usb/dwc3/dwc3-generic-plat.c
+70
drivers/usb/dwc3/dwc3-generic-plat.c
···
10
10
#include <linux/clk.h>
11
11
#include <linux/platform_device.h>
12
12
#include <linux/reset.h>
13
+
#include <linux/regmap.h>
14
+
#include <linux/mfd/syscon.h>
13
15
#include "glue.h"
16
+
17
+
#define EIC7700_HSP_BUS_FILTER_EN BIT(0)
18
+
#define EIC7700_HSP_BUS_CLKEN_GM BIT(9)
19
+
#define EIC7700_HSP_BUS_CLKEN_GS BIT(16)
20
+
#define EIC7700_HSP_AXI_LP_XM_CSYSREQ BIT(0)
21
+
#define EIC7700_HSP_AXI_LP_XS_CSYSREQ BIT(16)
14
22
15
23
struct dwc3_generic {
16
24
struct device *dev;
···
28
20
struct reset_control *resets;
29
21
};
30
22
23
+
struct dwc3_generic_config {
24
+
int (*init)(struct dwc3_generic *dwc3g);
25
+
struct dwc3_properties properties;
26
+
};
27
+
31
28
#define to_dwc3_generic(d) container_of((d), struct dwc3_generic, dwc)
32
29
33
30
static void dwc3_generic_reset_control_assert(void *data)
···
40
27
reset_control_assert(data);
41
28
}
42
29
30
+
static int dwc3_eic7700_init(struct dwc3_generic *dwc3g)
31
+
{
32
+
struct device *dev = dwc3g->dev;
33
+
struct regmap *regmap;
34
+
u32 hsp_usb_axi_lp;
35
+
u32 hsp_usb_bus;
36
+
u32 args[2];
37
+
u32 val;
38
+
39
+
regmap = syscon_regmap_lookup_by_phandle_args(dev->of_node,
40
+
"eswin,hsp-sp-csr",
41
+
ARRAY_SIZE(args), args);
42
+
if (IS_ERR(regmap)) {
43
+
dev_err(dev, "No hsp-sp-csr phandle specified\n");
44
+
return PTR_ERR(regmap);
45
+
}
46
+
47
+
hsp_usb_bus = args[0];
48
+
hsp_usb_axi_lp = args[1];
49
+
50
+
regmap_read(regmap, hsp_usb_bus, &val);
51
+
regmap_write(regmap, hsp_usb_bus, val | EIC7700_HSP_BUS_FILTER_EN |
52
+
EIC7700_HSP_BUS_CLKEN_GM | EIC7700_HSP_BUS_CLKEN_GS);
53
+
54
+
regmap_write(regmap, hsp_usb_axi_lp, EIC7700_HSP_AXI_LP_XM_CSYSREQ |
55
+
EIC7700_HSP_AXI_LP_XS_CSYSREQ);
56
+
return 0;
57
+
}
58
+
43
59
static int dwc3_generic_probe(struct platform_device *pdev)
44
60
{
61
+
const struct dwc3_generic_config *plat_config;
45
62
struct dwc3_probe_data probe_data = {};
46
63
struct device *dev = &pdev->dev;
47
64
struct dwc3_generic *dwc3g;
···
118
75
probe_data.dwc = &dwc3g->dwc;
119
76
probe_data.res = res;
120
77
probe_data.ignore_clocks_and_resets = true;
78
+
79
+
plat_config = of_device_get_match_data(dev);
80
+
if (!plat_config) {
81
+
probe_data.properties = DWC3_DEFAULT_PROPERTIES;
82
+
goto core_probe;
83
+
}
84
+
85
+
probe_data.properties = plat_config->properties;
86
+
if (plat_config->init) {
87
+
ret = plat_config->init(dwc3g);
88
+
if (ret)
89
+
return dev_err_probe(dev, ret,
90
+
"failed to init platform\n");
91
+
}
92
+
93
+
core_probe:
121
94
ret = dwc3_core_probe(&probe_data);
122
95
if (ret)
123
96
return dev_err_probe(dev, ret, "failed to register DWC3 Core\n");
···
201
142
dwc3_generic_runtime_idle)
202
143
};
203
144
145
+
static const struct dwc3_generic_config fsl_ls1028_dwc3 = {
146
+
.properties.gsbuscfg0_reqinfo = 0x2222,
147
+
};
148
+
149
+
static const struct dwc3_generic_config eic7700_dwc3 = {
150
+
.init = dwc3_eic7700_init,
151
+
.properties = DWC3_DEFAULT_PROPERTIES,
152
+
};
153
+
204
154
static const struct of_device_id dwc3_generic_of_match[] = {
205
155
{ .compatible = "spacemit,k1-dwc3", },
156
+
{ .compatible = "fsl,ls1028a-dwc3", &fsl_ls1028_dwc3},
157
+
{ .compatible = "eswin,eic7700-dwc3", &eic7700_dwc3},
206
158
{ /* sentinel */ }
207
159
};
208
160
MODULE_DEVICE_TABLE(of, dwc3_generic_of_match);
-1
drivers/usb/dwc3/dwc3-imx8mp.c
-1
drivers/usb/dwc3/dwc3-imx8mp.c
-1
drivers/usb/dwc3/dwc3-pci.c
-1
drivers/usb/dwc3/dwc3-pci.c
+1
drivers/usb/dwc3/dwc3-qcom.c
+1
drivers/usb/dwc3/dwc3-qcom.c
···
704
704
probe_data.dwc = &qcom->dwc;
705
705
probe_data.res = &res;
706
706
probe_data.ignore_clocks_and_resets = true;
707
+
probe_data.properties = DWC3_DEFAULT_PROPERTIES;
707
708
ret = dwc3_core_probe(&probe_data);
708
709
if (ret) {
709
710
ret = dev_err_probe(dev, ret, "failed to register DWC3 Core\n");
-1
drivers/usb/dwc3/dwc3-xilinx.c
-1
drivers/usb/dwc3/dwc3-xilinx.c
+3
-1
drivers/usb/dwc3/gadget.c
+3
-1
drivers/usb/dwc3/gadget.c
···
3879
3879
case DEPEVT_STREAM_NOSTREAM:
3880
3880
dep->flags &= ~DWC3_EP_STREAM_PRIMED;
3881
3881
if (dep->flags & DWC3_EP_FORCE_RESTART_STREAM)
3882
-
queue_delayed_work(system_wq, &dep->nostream_work,
3882
+
queue_delayed_work(system_percpu_wq, &dep->nostream_work,
3883
3883
msecs_to_jiffies(100));
3884
3884
break;
3885
3885
}
···
4817
4817
err0:
4818
4818
return ret;
4819
4819
}
4820
+
EXPORT_SYMBOL_GPL(dwc3_gadget_init);
4820
4821
4821
4822
/* -------------------------------------------------------------------------- */
4822
4823
···
4836
4835
dma_free_coherent(dwc->sysdev, sizeof(*dwc->ep0_trb) * 2,
4837
4836
dwc->ep0_trb, dwc->ep0_trb_addr);
4838
4837
}
4838
+
EXPORT_SYMBOL_GPL(dwc3_gadget_exit);
4839
4839
4840
4840
int dwc3_gadget_suspend(struct dwc3 *dwc)
4841
4841
{
+157
drivers/usb/dwc3/glue.h
+157
drivers/usb/dwc3/glue.h
···
10
10
#include "core.h"
11
11
12
12
/**
13
+
* dwc3_properties: DWC3 core properties
14
+
* @gsbuscfg0_reqinfo: Value to be programmed in the GSBUSCFG0.REQINFO field
15
+
*/
16
+
struct dwc3_properties {
17
+
u32 gsbuscfg0_reqinfo;
18
+
};
19
+
20
+
#define DWC3_DEFAULT_PROPERTIES ((struct dwc3_properties){ \
21
+
.gsbuscfg0_reqinfo = DWC3_GSBUSCFG0_REQINFO_UNSPECIFIED, \
22
+
})
23
+
24
+
/**
13
25
* dwc3_probe_data: Initialization parameters passed to dwc3_core_probe()
14
26
* @dwc: Reference to dwc3 context structure
15
27
* @res: resource for the DWC3 core mmio region
16
28
* @ignore_clocks_and_resets: clocks and resets defined for the device should
17
29
* be ignored by the DWC3 core, as they are managed by the glue
30
+
* @skip_core_init_mode: Skip the finial initialization of the target mode, as
31
+
* it must be managed by the glue
32
+
* @properties: dwc3 software manage properties
18
33
*/
19
34
struct dwc3_probe_data {
20
35
struct dwc3 *dwc;
21
36
struct resource *res;
22
37
bool ignore_clocks_and_resets;
38
+
bool skip_core_init_mode;
39
+
struct dwc3_properties properties;
23
40
};
24
41
42
+
/**
43
+
* dwc3_core_probe - Initialize the core dwc3 driver
44
+
* @data: Initialization and configuration parameters for the controller
45
+
*
46
+
* Initializes the DesignWare USB3 core driver by setting up resources,
47
+
* registering interrupts, performing hardware setup, and preparing
48
+
* the controller for operation in the appropriate mode (host, gadget,
49
+
* or OTG). This is the main initialization function called by glue
50
+
* layer drivers to set up the core controller.
51
+
*
52
+
* Return: 0 on success, negative error code on failure
53
+
*/
25
54
int dwc3_core_probe(const struct dwc3_probe_data *data);
55
+
56
+
/**
57
+
* dwc3_core_remove - Deinitialize and remove the core dwc3 driver
58
+
* @dwc: Pointer to DWC3 controller context
59
+
*
60
+
* Cleans up resources and disables the dwc3 core driver. This should be called
61
+
* during driver removal or when the glue layer needs to shut down the
62
+
* controller completely.
63
+
*/
26
64
void dwc3_core_remove(struct dwc3 *dwc);
27
65
66
+
/*
67
+
* The following callbacks are provided for glue drivers to call from their
68
+
* own pm callbacks provided in struct dev_pm_ops. Glue drivers can perform
69
+
* platform-specific work before or after calling these functions and delegate
70
+
* the core suspend/resume operations to the core driver.
71
+
*/
28
72
int dwc3_runtime_suspend(struct dwc3 *dwc);
29
73
int dwc3_runtime_resume(struct dwc3 *dwc);
30
74
int dwc3_runtime_idle(struct dwc3 *dwc);
···
76
32
int dwc3_pm_resume(struct dwc3 *dwc);
77
33
void dwc3_pm_complete(struct dwc3 *dwc);
78
34
int dwc3_pm_prepare(struct dwc3 *dwc);
35
+
36
+
37
+
/* All of the following functions must only be used with skip_core_init_mode */
38
+
39
+
/**
40
+
* dwc3_core_init - Initialize DWC3 core hardware
41
+
* @dwc: Pointer to DWC3 controller context
42
+
*
43
+
* Configures and initializes the core hardware, usually done by dwc3_core_probe.
44
+
* This function is provided for platforms that use skip_core_init_mode and need
45
+
* to finalize the core initialization after some platform-specific setup.
46
+
* It must only be called when using skip_core_init_mode and before
47
+
* dwc3_host_init or dwc3_gadget_init.
48
+
*
49
+
* Return: 0 on success, negative error code on failure
50
+
*/
51
+
int dwc3_core_init(struct dwc3 *dwc);
52
+
53
+
/**
54
+
* dwc3_core_exit - Shut down DWC3 core hardware
55
+
* @dwc: Pointer to DWC3 controller context
56
+
*
57
+
* Disables and cleans up the core hardware state. This is usually handled
58
+
* internally by dwc3 and must only be called when using skip_core_init_mode
59
+
* and only after dwc3_core_init. Afterwards, dwc3_core_init may be called
60
+
* again.
61
+
*/
62
+
void dwc3_core_exit(struct dwc3 *dwc);
63
+
64
+
/**
65
+
* dwc3_host_init - Initialize host mode operation
66
+
* @dwc: Pointer to DWC3 controller context
67
+
*
68
+
* Initializes the controller for USB host mode operation, usually done by
69
+
* dwc3_core_probe or from within the dwc3 USB role switch callback.
70
+
* This function is provided for platforms that use skip_core_init_mode and need
71
+
* to finalize the host initialization after some platform-specific setup.
72
+
* It must not be called before dwc3_core_init or when skip_core_init_mode is
73
+
* not used. It must also not be called when gadget or host mode has already
74
+
* been initialized.
75
+
*
76
+
* Return: 0 on success, negative error code on failure
77
+
*/
78
+
int dwc3_host_init(struct dwc3 *dwc);
79
+
80
+
/**
81
+
* dwc3_host_exit - Shut down host mode operation
82
+
* @dwc: Pointer to DWC3 controller context
83
+
*
84
+
* Disables and cleans up host mode resources, usually done by
85
+
* the dwc3 USB role switch callback before switching controller mode.
86
+
* It must only be called when skip_core_init_mode is used and only after
87
+
* dwc3_host_init.
88
+
*/
89
+
void dwc3_host_exit(struct dwc3 *dwc);
90
+
91
+
/**
92
+
* dwc3_gadget_init - Initialize gadget mode operation
93
+
* @dwc: Pointer to DWC3 controller context
94
+
*
95
+
* Initializes the controller for USB gadget mode operation, usually done by
96
+
* dwc3_core_probe or from within the dwc3 USB role switch callback. This
97
+
* function is provided for platforms that use skip_core_init_mode and need to
98
+
* finalize the gadget initialization after some platform-specific setup.
99
+
* It must not be called before dwc3_core_init or when skip_core_init_mode is
100
+
* not used. It must also not be called when gadget or host mode has already
101
+
* been initialized.
102
+
*
103
+
* Return: 0 on success, negative error code on failure
104
+
*/
105
+
int dwc3_gadget_init(struct dwc3 *dwc);
106
+
107
+
/**
108
+
* dwc3_gadget_exit - Shut down gadget mode operation
109
+
* @dwc: Pointer to DWC3 controller context
110
+
*
111
+
* Disables and cleans up gadget mode resources, usually done by
112
+
* the dwc3 USB role switch callback before switching controller mode.
113
+
* It must only be called when skip_core_init_mode is used and only after
114
+
* dwc3_gadget_init.
115
+
*/
116
+
void dwc3_gadget_exit(struct dwc3 *dwc);
117
+
118
+
/**
119
+
* dwc3_enable_susphy - Control SUSPHY status for all USB ports
120
+
* @dwc: Pointer to DWC3 controller context
121
+
* @enable: True to enable SUSPHY, false to disable
122
+
*
123
+
* Enables or disables the USB3 PHY SUSPEND and USB2 PHY SUSPHY feature for
124
+
* all available ports.
125
+
* This is usually handled by the dwc3 core code and should only be used
126
+
* when skip_core_init_mode is used and the glue layer needs to manage SUSPHY
127
+
* settings itself, e.g., due to platform-specific requirements during mode
128
+
* switches.
129
+
*/
130
+
void dwc3_enable_susphy(struct dwc3 *dwc, bool enable);
131
+
132
+
/**
133
+
* dwc3_set_prtcap - Set the USB controller PRTCAP mode
134
+
* @dwc: Pointer to DWC3 controller context
135
+
* @mode: Target mode, must be one of DWC3_GCTL_PRTCAP_{HOST,DEVICE,OTG}
136
+
* @ignore_susphy: If true, skip disabling the SUSPHY and keep the current state
137
+
*
138
+
* Updates PRTCAP of the controller and current_dr_role inside the dwc3
139
+
* structure. For DRD controllers, this also disables SUSPHY unless explicitly
140
+
* told to skip via the ignore_susphy parameter.
141
+
*
142
+
* This is usually handled by the dwc3 core code and should only be used
143
+
* when skip_core_init_mode is used and the glue layer needs to manage mode
144
+
* transitions itself due to platform-specific requirements. It must be called
145
+
* with the correct mode before calling dwc3_host_init or dwc3_gadget_init.
146
+
*/
147
+
void dwc3_set_prtcap(struct dwc3 *dwc, u32 mode, bool ignore_susphy);
79
148
80
149
#endif
+6
-1
drivers/usb/dwc3/host.c
+6
-1
drivers/usb/dwc3/host.c
···
37
37
38
38
/* xhci regs are not mapped yet, do it temporarily here */
39
39
if (dwc->xhci_resources[0].start) {
40
-
xhci_regs = ioremap(dwc->xhci_resources[0].start, DWC3_XHCI_REGS_END);
40
+
if (dwc->xhci_resources[0].flags & IORESOURCE_MEM_NONPOSTED)
41
+
xhci_regs = ioremap_np(dwc->xhci_resources[0].start, DWC3_XHCI_REGS_END);
42
+
else
43
+
xhci_regs = ioremap(dwc->xhci_resources[0].start, DWC3_XHCI_REGS_END);
41
44
if (!xhci_regs) {
42
45
dev_err(dwc->dev, "Failed to ioremap xhci_regs\n");
43
46
return;
···
220
217
platform_device_put(xhci);
221
218
return ret;
222
219
}
220
+
EXPORT_SYMBOL_GPL(dwc3_host_init);
223
221
224
222
void dwc3_host_exit(struct dwc3 *dwc)
225
223
{
···
231
227
platform_device_unregister(dwc->xhci);
232
228
dwc->xhci = NULL;
233
229
}
230
+
EXPORT_SYMBOL_GPL(dwc3_host_exit);
+1
-3
drivers/usb/gadget/function/f_fs.c
+1
-3
drivers/usb/gadget/function/f_fs.c
···
1332
1332
struct dma_buf *dmabuf = attach->dmabuf;
1333
1333
1334
1334
pr_vdebug("FFS DMABUF release\n");
1335
-
dma_resv_lock(dmabuf->resv, NULL);
1336
-
dma_buf_unmap_attachment(attach, priv->sgt, priv->dir);
1337
-
dma_resv_unlock(dmabuf->resv);
1335
+
dma_buf_unmap_attachment_unlocked(attach, priv->sgt, priv->dir);
1338
1336
1339
1337
dma_buf_detach(attach->dmabuf, attach);
1340
1338
dma_buf_put(dmabuf);
+1
-2
drivers/usb/gadget/function/f_hid.c
+1
-2
drivers/usb/gadget/function/f_hid.c
+3
drivers/usb/gadget/legacy/raw_gadget.c
+3
drivers/usb/gadget/legacy/raw_gadget.c
···
40
40
41
41
static DEFINE_IDA(driver_id_numbers);
42
42
#define DRIVER_DRIVER_NAME_LENGTH_MAX 32
43
+
#define USB_RAW_IO_LENGTH_MAX KMALLOC_MAX_SIZE
43
44
44
45
#define RAW_EVENT_QUEUE_SIZE 16
45
46
···
667
666
if (io->ep >= USB_RAW_EPS_NUM_MAX)
668
667
return ERR_PTR(-EINVAL);
669
668
if (!usb_raw_io_flags_valid(io->flags))
669
+
return ERR_PTR(-EINVAL);
670
+
if (io->length > USB_RAW_IO_LENGTH_MAX)
670
671
return ERR_PTR(-EINVAL);
671
672
if (get_from_user)
672
673
data = memdup_user(ptr + sizeof(*io), io->length);
+18
-9
drivers/usb/gadget/legacy/zero.c
+18
-9
drivers/usb/gadget/legacy/zero.c
···
147
147
NULL,
148
148
};
149
149
150
+
static struct usb_function *func_lb;
151
+
static struct usb_function_instance *func_inst_lb;
152
+
153
+
static struct usb_function *func_ss;
154
+
static struct usb_function_instance *func_inst_ss;
155
+
150
156
/*-------------------------------------------------------------------------*/
151
157
152
158
static struct timer_list autoresume_timer;
···
162
156
{
163
157
struct usb_composite_dev *cdev = autoresume_cdev;
164
158
struct usb_gadget *g = cdev->gadget;
159
+
int status;
165
160
166
161
/* unconfigured devices can't issue wakeups */
167
162
if (!cdev->config)
···
172
165
* more significant than just a timer firing; likely
173
166
* because of some direct user request.
174
167
*/
175
-
if (g->speed != USB_SPEED_UNKNOWN) {
176
-
int status = usb_gadget_wakeup(g);
177
-
INFO(cdev, "%s --> %d\n", __func__, status);
168
+
if (g->speed == USB_SPEED_UNKNOWN)
169
+
return;
170
+
171
+
if (g->speed >= USB_SPEED_SUPER) {
172
+
if (loopdefault)
173
+
status = usb_func_wakeup(func_lb);
174
+
else
175
+
status = usb_func_wakeup(func_ss);
176
+
} else {
177
+
status = usb_gadget_wakeup(g);
178
178
}
179
+
INFO(cdev, "%s --> %d\n", __func__, status);
179
180
}
180
181
181
182
static void zero_suspend(struct usb_composite_dev *cdev)
···
220
205
.bmAttributes = USB_CONFIG_ATT_SELFPOWER,
221
206
/* .iConfiguration = DYNAMIC */
222
207
};
223
-
224
-
static struct usb_function *func_ss;
225
-
static struct usb_function_instance *func_inst_ss;
226
208
227
209
static int ss_config_setup(struct usb_configuration *c,
228
210
const struct usb_ctrlrequest *ctrl)
···
259
247
module_param_named(isoc_maxburst, gzero_options.isoc_maxburst, uint,
260
248
S_IRUGO|S_IWUSR);
261
249
MODULE_PARM_DESC(isoc_maxburst, "0 - 15 (ss only)");
262
-
263
-
static struct usb_function *func_lb;
264
-
static struct usb_function_instance *func_inst_lb;
265
250
266
251
module_param_named(qlen, gzero_options.qlen, uint, S_IRUGO|S_IWUSR);
267
252
MODULE_PARM_DESC(qlen, "depth of loopback queue");
-1
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
-1
drivers/usb/gadget/udc/cdns2/cdns2-gadget.c
-6
drivers/usb/gadget/udc/tegra-xudc.c
-6
drivers/usb/gadget/udc/tegra-xudc.c
···
1558
1558
return -ENOTSUPP;
1559
1559
}
1560
1560
1561
-
if (!!(xudc_readl(xudc, EP_HALT) & BIT(ep->index)) == halt) {
1562
-
dev_dbg(xudc->dev, "EP %u already %s\n", ep->index,
1563
-
halt ? "halted" : "not halted");
1564
-
return 0;
1565
-
}
1566
-
1567
1561
if (halt) {
1568
1562
ep_halt(xudc, ep->index);
1569
1563
} else {
+34
-6
drivers/usb/host/ehci-platform.c
+34
-6
drivers/usb/host/ehci-platform.c
···
27
27
#include <linux/io.h>
28
28
#include <linux/module.h>
29
29
#include <linux/of.h>
30
+
#include <linux/of_device.h>
30
31
#include <linux/platform_device.h>
31
32
#include <linux/reset.h>
32
33
#include <linux/sys_soc.h>
···
112
111
int clk;
113
112
114
113
for (clk = EHCI_MAX_CLKS - 1; clk >= 0; clk--)
115
-
if (priv->clks[clk])
116
-
clk_disable_unprepare(priv->clks[clk]);
114
+
clk_disable_unprepare(priv->clks[clk]);
117
115
}
118
116
119
117
static struct hc_driver __read_mostly ehci_platform_hc_driver;
···
239
239
struct usb_hcd *hcd;
240
240
struct resource *res_mem;
241
241
struct usb_ehci_pdata *pdata = dev_get_platdata(&dev->dev);
242
+
const struct of_device_id *match;
242
243
struct ehci_platform_priv *priv;
243
244
struct ehci_hcd *ehci;
244
245
int err, irq, clk = 0;
246
+
bool dma_mask_64;
245
247
246
248
if (usb_disabled())
247
249
return -ENODEV;
···
255
253
if (!pdata)
256
254
pdata = &ehci_platform_defaults;
257
255
256
+
dma_mask_64 = pdata->dma_mask_64;
257
+
match = of_match_device(dev->dev.driver->of_match_table, &dev->dev);
258
+
if (match && match->data)
259
+
dma_mask_64 = true;
260
+
258
261
err = dma_coerce_mask_and_coherent(&dev->dev,
259
-
pdata->dma_mask_64 ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32));
262
+
dma_mask_64 ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32));
260
263
if (err) {
261
264
dev_err(&dev->dev, "Error: DMA mask configuration failed\n");
262
265
return err;
···
305
298
if (of_device_is_compatible(dev->dev.of_node,
306
299
"aspeed,ast2500-ehci") ||
307
300
of_device_is_compatible(dev->dev.of_node,
308
-
"aspeed,ast2600-ehci"))
301
+
"aspeed,ast2600-ehci") ||
302
+
of_device_is_compatible(dev->dev.of_node,
303
+
"aspeed,ast2700-ehci"))
309
304
ehci->is_aspeed = 1;
310
305
311
306
if (soc_device_match(quirk_poll_match))
···
454
445
if (pdata->power_suspend)
455
446
pdata->power_suspend(pdev);
456
447
448
+
ret = reset_control_assert(priv->rsts);
449
+
if (ret) {
450
+
if (pdata->power_on)
451
+
pdata->power_on(pdev);
452
+
453
+
ehci_resume(hcd, false);
454
+
455
+
if (priv->quirk_poll)
456
+
quirk_poll_init(priv);
457
+
}
458
+
457
459
return ret;
458
460
}
459
461
···
475
455
struct platform_device *pdev = to_platform_device(dev);
476
456
struct ehci_platform_priv *priv = hcd_to_ehci_priv(hcd);
477
457
struct device *companion_dev;
458
+
int err;
459
+
460
+
err = reset_control_deassert(priv->rsts);
461
+
if (err)
462
+
return err;
478
463
479
464
if (pdata->power_on) {
480
-
int err = pdata->power_on(pdev);
481
-
if (err < 0)
465
+
err = pdata->power_on(pdev);
466
+
if (err < 0) {
467
+
reset_control_assert(priv->rsts);
482
468
return err;
469
+
}
483
470
}
484
471
485
472
companion_dev = usb_of_get_companion_dev(hcd->self.controller);
···
512
485
{ .compatible = "wm,prizm-ehci", },
513
486
{ .compatible = "generic-ehci", },
514
487
{ .compatible = "cavium,octeon-6335-ehci", },
488
+
{ .compatible = "aspeed,ast2700-ehci", .data = (void *)1 },
515
489
{}
516
490
};
517
491
MODULE_DEVICE_TABLE(of, vt8500_ehci_ids);
-17
drivers/usb/host/ohci-da8xx.c
-17
drivers/usb/host/ohci-da8xx.c
···
18
18
#include <linux/of.h>
19
19
#include <linux/platform_device.h>
20
20
#include <linux/phy/phy.h>
21
-
#include <linux/platform_data/usb-davinci.h>
22
21
#include <linux/regulator/consumer.h>
23
22
#include <linux/usb.h>
24
23
#include <linux/usb/hcd.h>
···
165
166
return 0;
166
167
}
167
168
168
-
static int ohci_da8xx_has_potpgt(struct usb_hcd *hcd)
169
-
{
170
-
struct device *dev = hcd->self.controller;
171
-
struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
172
-
173
-
if (hub && hub->potpgt)
174
-
return 1;
175
-
176
-
return 0;
177
-
}
178
-
179
169
static int ohci_da8xx_regulator_event(struct notifier_block *nb,
180
170
unsigned long event, void *data)
181
171
{
···
216
228
static int ohci_da8xx_reset(struct usb_hcd *hcd)
217
229
{
218
230
struct device *dev = hcd->self.controller;
219
-
struct da8xx_ohci_root_hub *hub = dev_get_platdata(dev);
220
231
struct ohci_hcd *ohci = hcd_to_ohci(hcd);
221
232
int result;
222
233
u32 rh_a;
···
252
265
if (ohci_da8xx_has_oci(hcd)) {
253
266
rh_a &= ~RH_A_NOCP;
254
267
rh_a |= RH_A_OCPM;
255
-
}
256
-
if (ohci_da8xx_has_potpgt(hcd)) {
257
-
rh_a &= ~RH_A_POTPGT;
258
-
rh_a |= hub->potpgt << 24;
259
268
}
260
269
ohci_writel(ohci, rh_a, &ohci->regs->roothub.a);
261
270
+20
-4
drivers/usb/host/ohci-platform.c
+20
-4
drivers/usb/host/ohci-platform.c
···
69
69
int clk;
70
70
71
71
for (clk = OHCI_MAX_CLKS - 1; clk >= 0; clk--)
72
-
if (priv->clks[clk])
73
-
clk_disable_unprepare(priv->clks[clk]);
72
+
clk_disable_unprepare(priv->clks[clk]);
74
73
}
75
74
76
75
static struct hc_driver __read_mostly ohci_platform_hc_driver;
···
270
271
struct usb_hcd *hcd = dev_get_drvdata(dev);
271
272
struct usb_ohci_pdata *pdata = dev->platform_data;
272
273
struct platform_device *pdev = to_platform_device(dev);
274
+
struct ohci_platform_priv *priv = hcd_to_ohci_priv(hcd);
273
275
bool do_wakeup = device_may_wakeup(dev);
274
276
int ret;
275
277
···
281
281
if (pdata->power_suspend)
282
282
pdata->power_suspend(pdev);
283
283
284
+
ret = reset_control_assert(priv->resets);
285
+
if (ret) {
286
+
if (pdata->power_on)
287
+
pdata->power_on(pdev);
288
+
289
+
ohci_resume(hcd, false);
290
+
}
291
+
284
292
return ret;
285
293
}
286
294
···
297
289
struct usb_hcd *hcd = dev_get_drvdata(dev);
298
290
struct usb_ohci_pdata *pdata = dev_get_platdata(dev);
299
291
struct platform_device *pdev = to_platform_device(dev);
292
+
struct ohci_platform_priv *priv = hcd_to_ohci_priv(hcd);
293
+
int err;
294
+
295
+
err = reset_control_deassert(priv->resets);
296
+
if (err)
297
+
return err;
300
298
301
299
if (pdata->power_on) {
302
-
int err = pdata->power_on(pdev);
303
-
if (err < 0)
300
+
err = pdata->power_on(pdev);
301
+
if (err < 0) {
302
+
reset_control_assert(priv->resets);
304
303
return err;
304
+
}
305
305
}
306
306
307
307
ohci_resume(hcd, hibernated);
+1
drivers/usb/host/uhci-hcd.h
+1
drivers/usb/host/uhci-hcd.h
+24
-4
drivers/usb/host/uhci-platform.c
+24
-4
drivers/usb/host/uhci-platform.c
···
11
11
#include <linux/of.h>
12
12
#include <linux/device.h>
13
13
#include <linux/platform_device.h>
14
+
#include <linux/reset.h>
14
15
15
16
static int uhci_platform_init(struct usb_hcd *hcd)
16
17
{
···
68
67
static int uhci_hcd_platform_probe(struct platform_device *pdev)
69
68
{
70
69
struct device_node *np = pdev->dev.of_node;
70
+
bool dma_mask_64 = false;
71
71
struct usb_hcd *hcd;
72
72
struct uhci_hcd *uhci;
73
73
struct resource *res;
···
82
80
* Since shared usb code relies on it, set it here for now.
83
81
* Once we have dma capability bindings this can go away.
84
82
*/
85
-
ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
83
+
if (of_device_get_match_data(&pdev->dev))
84
+
dma_mask_64 = true;
85
+
86
+
ret = dma_coerce_mask_and_coherent(&pdev->dev,
87
+
dma_mask_64 ? DMA_BIT_MASK(64) : DMA_BIT_MASK(32));
86
88
if (ret)
87
89
return ret;
88
90
···
119
113
}
120
114
if (of_device_is_compatible(np, "aspeed,ast2400-uhci") ||
121
115
of_device_is_compatible(np, "aspeed,ast2500-uhci") ||
122
-
of_device_is_compatible(np, "aspeed,ast2600-uhci")) {
116
+
of_device_is_compatible(np, "aspeed,ast2600-uhci") ||
117
+
of_device_is_compatible(np, "aspeed,ast2700-uhci")) {
123
118
uhci->is_aspeed = 1;
124
119
dev_info(&pdev->dev,
125
120
"Enabled Aspeed implementation workarounds\n");
···
139
132
goto err_rmr;
140
133
}
141
134
135
+
uhci->rsts = devm_reset_control_array_get_optional_shared(&pdev->dev);
136
+
if (IS_ERR(uhci->rsts)) {
137
+
ret = PTR_ERR(uhci->rsts);
138
+
goto err_clk;
139
+
}
140
+
ret = reset_control_deassert(uhci->rsts);
141
+
if (ret)
142
+
goto err_clk;
143
+
142
144
ret = platform_get_irq(pdev, 0);
143
145
if (ret < 0)
144
-
goto err_clk;
146
+
goto err_reset;
145
147
146
148
ret = usb_add_hcd(hcd, ret, IRQF_SHARED);
147
149
if (ret)
148
-
goto err_clk;
150
+
goto err_reset;
149
151
150
152
device_wakeup_enable(hcd->self.controller);
151
153
return 0;
152
154
155
+
err_reset:
156
+
reset_control_assert(uhci->rsts);
153
157
err_clk:
154
158
clk_disable_unprepare(uhci->clk);
155
159
err_rmr:
···
174
156
struct usb_hcd *hcd = platform_get_drvdata(pdev);
175
157
struct uhci_hcd *uhci = hcd_to_uhci(hcd);
176
158
159
+
reset_control_assert(uhci->rsts);
177
160
clk_disable_unprepare(uhci->clk);
178
161
usb_remove_hcd(hcd);
179
162
usb_put_hcd(hcd);
···
197
178
static const struct of_device_id platform_uhci_ids[] = {
198
179
{ .compatible = "generic-uhci", },
199
180
{ .compatible = "platform-uhci", },
181
+
{ .compatible = "aspeed,ast2700-uhci", .data = (void *)1 },
200
182
{}
201
183
};
202
184
MODULE_DEVICE_TABLE(of, platform_uhci_ids);
+2
-2
drivers/usb/host/xen-hcd.c
+2
-2
drivers/usb/host/xen-hcd.c
···
1388
1388
return 0;
1389
1389
}
1390
1390
1391
-
static struct hc_driver xenhcd_usb20_hc_driver = {
1391
+
static const struct hc_driver xenhcd_usb20_hc_driver = {
1392
1392
.description = "xen-hcd",
1393
1393
.product_desc = "Xen USB2.0 Virtual Host Controller",
1394
1394
.hcd_priv_size = sizeof(struct xenhcd_info),
···
1413
1413
#endif
1414
1414
};
1415
1415
1416
-
static struct hc_driver xenhcd_usb11_hc_driver = {
1416
+
static const struct hc_driver xenhcd_usb11_hc_driver = {
1417
1417
.description = "xen-hcd",
1418
1418
.product_desc = "Xen USB1.1 Virtual Host Controller",
1419
1419
.hcd_priv_size = sizeof(struct xenhcd_info),
+97
-70
drivers/usb/host/xhci-caps.h
+97
-70
drivers/usb/host/xhci-caps.h
···
1
1
/* SPDX-License-Identifier: GPL-2.0 */
2
+
/*
3
+
* xHCI Host Controller Capability Registers.
4
+
* xHCI Specification Section 5.3, Revision 1.2.
5
+
*/
2
6
3
-
/* hc_capbase bitmasks */
4
-
/* bits 7:0 - how long is the Capabilities register */
5
-
#define HC_LENGTH(p) XHCI_HC_LENGTH(p)
6
-
/* bits 31:16 */
7
+
#include <linux/bits.h>
8
+
9
+
/* hc_capbase - bitmasks */
10
+
/* bits 7:0 - Capability Registers Length */
11
+
#define HC_LENGTH(p) ((p) & 0xff)
12
+
/* bits 15:8 - Rsvd */
13
+
/* bits 31:16 - Host Controller Interface Version Number */
7
14
#define HC_VERSION(p) (((p) >> 16) & 0xffff)
8
15
9
16
/* HCSPARAMS1 - hcs_params1 - bitmasks */
10
-
/* bits 0:7, Max Device Slots */
17
+
/* bits 7:0 - Number of Device Slots */
11
18
#define HCS_MAX_SLOTS(p) (((p) >> 0) & 0xff)
12
19
#define HCS_SLOTS_MASK 0xff
13
-
/* bits 8:18, Max Interrupters */
20
+
/* bits 18:8 - Number of Interrupters, max values is 1024 */
14
21
#define HCS_MAX_INTRS(p) (((p) >> 8) & 0x7ff)
15
-
/* bits 24:31, Max Ports - max value is 0x7F = 127 ports */
16
-
#define HCS_MAX_PORTS(p) (((p) >> 24) & 0x7f)
22
+
/* bits 31:24, Max Ports - max value is 255 */
23
+
#define HCS_MAX_PORTS(p) (((p) >> 24) & 0xff)
17
24
18
25
/* HCSPARAMS2 - hcs_params2 - bitmasks */
19
-
/* bits 0:3, frames or uframes that SW needs to queue transactions
20
-
* ahead of the HW to meet periodic deadlines */
21
-
#define HCS_IST(p) (((p) >> 0) & 0xf)
22
-
/* bits 4:7, max number of Event Ring segments */
26
+
/*
27
+
* bits 3:0 - Isochronous Scheduling Threshold, frames or uframes that SW
28
+
* needs to queue transactions ahead of the HW to meet periodic deadlines.
29
+
* - Bits 2:0: Threshold value
30
+
* - Bit 3: Unit indicator
31
+
* - '1': Threshold in Frames
32
+
* - '0': Threshold in Microframes (uframes)
33
+
* Note: 1 Frame = 8 Microframes
34
+
* xHCI specification section 5.3.4.
35
+
*/
36
+
#define HCS_IST_VALUE(p) ((p) & 0x7)
37
+
#define HCS_IST_UNIT BIT(3)
38
+
/* bits 7:4 - Event Ring Segment Table Max, 2^(n) */
23
39
#define HCS_ERST_MAX(p) (((p) >> 4) & 0xf)
24
-
/* bits 21:25 Hi 5 bits of Scratchpad buffers SW must allocate for the HW */
25
-
/* bit 26 Scratchpad restore - for save/restore HW state - not used yet */
26
-
/* bits 27:31 Lo 5 bits of Scratchpad buffers SW must allocate for the HW */
27
-
#define HCS_MAX_SCRATCHPAD(p) ((((p) >> 16) & 0x3e0) | (((p) >> 27) & 0x1f))
40
+
/* bits 20:8 - Rsvd */
41
+
/* bits 25:21 - Max Scratchpad Buffers (Hi), 5 Most significant bits */
42
+
#define HCS_MAX_SP_HI(p) (((p) >> 21) & 0x1f)
43
+
/* bit 26 - Scratchpad restore, for save/restore HW state */
44
+
/* bits 31:27 - Max Scratchpad Buffers (Lo), 5 Least significant bits */
45
+
#define HCS_MAX_SP_LO(p) (((p) >> 27) & 0x1f)
46
+
#define HCS_MAX_SCRATCHPAD(p) (HCS_MAX_SP_HI(p) << 5 | HCS_MAX_SP_LO(p))
28
47
29
48
/* HCSPARAMS3 - hcs_params3 - bitmasks */
30
-
/* bits 0:7, Max U1 to U0 latency for the roothub ports */
49
+
/* bits 7:0 - U1 Device Exit Latency, Max U1 to U0 latency for the roothub ports */
31
50
#define HCS_U1_LATENCY(p) (((p) >> 0) & 0xff)
32
-
/* bits 16:31, Max U2 to U0 latency for the roothub ports */
51
+
/* bits 15:8 - Rsvd */
52
+
/* bits 31:16 - U2 Device Exit Latency, Max U2 to U0 latency for the roothub ports */
33
53
#define HCS_U2_LATENCY(p) (((p) >> 16) & 0xffff)
34
54
35
-
/* HCCPARAMS - hcc_params - bitmasks */
36
-
/* true: HC can use 64-bit address pointers */
37
-
#define HCC_64BIT_ADDR(p) ((p) & (1 << 0))
38
-
/* true: HC can do bandwidth negotiation */
39
-
#define HCC_BANDWIDTH_NEG(p) ((p) & (1 << 1))
40
-
/* true: HC uses 64-byte Device Context structures
41
-
* FIXME 64-byte context structures aren't supported yet.
42
-
*/
43
-
#define HCC_64BYTE_CONTEXT(p) ((p) & (1 << 2))
44
-
/* true: HC has port power switches */
45
-
#define HCC_PPC(p) ((p) & (1 << 3))
46
-
/* true: HC has port indicators */
47
-
#define HCS_INDICATOR(p) ((p) & (1 << 4))
48
-
/* true: HC has Light HC Reset Capability */
49
-
#define HCC_LIGHT_RESET(p) ((p) & (1 << 5))
50
-
/* true: HC supports latency tolerance messaging */
51
-
#define HCC_LTC(p) ((p) & (1 << 6))
52
-
/* true: no secondary Stream ID Support */
53
-
#define HCC_NSS(p) ((p) & (1 << 7))
54
-
/* true: HC supports Stopped - Short Packet */
55
-
#define HCC_SPC(p) ((p) & (1 << 9))
56
-
/* true: HC has Contiguous Frame ID Capability */
57
-
#define HCC_CFC(p) ((p) & (1 << 11))
58
-
/* Max size for Primary Stream Arrays - 2^(n+1), where n is bits 12:15 */
55
+
/* HCCPARAMS1 - hcc_params - bitmasks */
56
+
/* bit 0 - 64-bit Addressing Capability */
57
+
#define HCC_64BIT_ADDR BIT(0)
58
+
/* bit 1 - BW Negotiation Capability */
59
+
#define HCC_BANDWIDTH_NEG BIT(1)
60
+
/* bit 2 - Context Size */
61
+
#define HCC_64BYTE_CONTEXT BIT(2)
62
+
#define CTX_SIZE(_hcc) (_hcc & HCC_64BYTE_CONTEXT ? 64 : 32)
63
+
/* bit 3 - Port Power Control */
64
+
#define HCC_PPC BIT(3)
65
+
/* bit 4 - Port Indicators */
66
+
#define HCS_INDICATOR BIT(4)
67
+
/* bit 5 - Light HC Reset Capability */
68
+
#define HCC_LIGHT_RESET BIT(5)
69
+
/* bit 6 - Latency Tolerance Messaging Capability */
70
+
#define HCC_LTC BIT(6)
71
+
/* bit 7 - No Secondary Stream ID Support */
72
+
#define HCC_NSS BIT(7)
73
+
/* bit 8 - Parse All Event Data */
74
+
/* bit 9 - Short Packet Capability */
75
+
#define HCC_SPC BIT(9)
76
+
/* bit 10 - Stopped EDTLA Capability */
77
+
/* bit 11 - Contiguous Frame ID Capability */
78
+
#define HCC_CFC BIT(11)
79
+
/* bits 15:12 - Max size for Primary Stream Arrays, 2^(n+1) */
59
80
#define HCC_MAX_PSA(p) (1 << ((((p) >> 12) & 0xf) + 1))
60
-
/* Extended Capabilities pointer from PCI base - section 5.3.6 */
61
-
#define HCC_EXT_CAPS(p) XHCI_HCC_EXT_CAPS(p)
81
+
/* bits 31:16 - xHCI Extended Capabilities Pointer, from PCI base: 2^(n) */
82
+
#define HCC_EXT_CAPS(p) (((p) >> 16) & 0xffff)
62
83
63
-
#define CTX_SIZE(_hcc) (HCC_64BYTE_CONTEXT(_hcc) ? 64 : 32)
64
-
65
-
/* db_off bitmask - bits 31:2 Doorbell Array Offset */
84
+
/* DBOFF - db_off - bitmasks */
85
+
/* bits 1:0 - Rsvd */
86
+
/* bits 31:2 - Doorbell Array Offset */
66
87
#define DBOFF_MASK (0xfffffffc)
67
88
68
-
/* run_regs_off bitmask - bits 0:4 reserved */
89
+
/* RTSOFF - run_regs_off - bitmasks */
90
+
/* bits 4:0 - Rsvd */
91
+
/* bits 31:5 - Runtime Register Space Offse */
69
92
#define RTSOFF_MASK (~0x1f)
70
93
71
94
/* HCCPARAMS2 - hcc_params2 - bitmasks */
72
-
/* true: HC supports U3 entry Capability */
73
-
#define HCC2_U3C(p) ((p) & (1 << 0))
74
-
/* true: HC supports Configure endpoint command Max exit latency too large */
75
-
#define HCC2_CMC(p) ((p) & (1 << 1))
76
-
/* true: HC supports Force Save context Capability */
77
-
#define HCC2_FSC(p) ((p) & (1 << 2))
78
-
/* true: HC supports Compliance Transition Capability */
79
-
#define HCC2_CTC(p) ((p) & (1 << 3))
80
-
/* true: HC support Large ESIT payload Capability > 48k */
81
-
#define HCC2_LEC(p) ((p) & (1 << 4))
82
-
/* true: HC support Configuration Information Capability */
83
-
#define HCC2_CIC(p) ((p) & (1 << 5))
84
-
/* true: HC support Extended TBC Capability, Isoc burst count > 65535 */
85
-
#define HCC2_ETC(p) ((p) & (1 << 6))
86
-
/* true: HC support Extended TBC TRB Status Capability */
87
-
#define HCC2_ETC_TSC(p) ((p) & (1 << 7))
88
-
/* true: HC support Get/Set Extended Property Capability */
89
-
#define HCC2_GSC(p) ((p) & (1 << 8))
90
-
/* true: HC support Virtualization Based Trusted I/O Capability */
91
-
#define HCC2_VTC(p) ((p) & (1 << 9))
92
-
/* true: HC support Double BW on a eUSB2 HS ISOC EP */
93
-
#define HCC2_EUSB2_DIC(p) ((p) & (1 << 11))
95
+
/* bit 0 - U3 Entry Capability */
96
+
#define HCC2_U3C BIT(0)
97
+
/* bit 1 - Configure Endpoint Command Max Exit Latency Too Large Capability */
98
+
#define HCC2_CMC BIT(1)
99
+
/* bit 2 - Force Save Context Capabilitu */
100
+
#define HCC2_FSC BIT(2)
101
+
/* bit 3 - Compliance Transition Capability, false: compliance is enabled by default */
102
+
#define HCC2_CTC BIT(3)
103
+
/* bit 4 - Large ESIT Payload Capability, true: HC support ESIT payload > 48k */
104
+
#define HCC2_LEC BIT(4)
105
+
/* bit 5 - Configuration Information Capability */
106
+
#define HCC2_CIC BIT(5)
107
+
/* bit 6 - Extended TBC Capability, true: Isoc burst count > 65535 */
108
+
#define HCC2_ETC BIT(6)
109
+
/* bit 7 - Extended TBC TRB Status Capability */
110
+
#define HCC2_ETC_TSC BIT(7)
111
+
/* bit 8 - Get/Set Extended Property Capability */
112
+
#define HCC2_GSC BIT(8)
113
+
/* bit 9 - Virtualization Based Trusted I/O Capability */
114
+
#define HCC2_VTC BIT(9)
115
+
/* bit 10 - Rsvd */
116
+
/* bit 11 - HC support Double BW on a eUSB2 HS ISOC EP */
117
+
#define HCC2_EUSB2_DIC BIT(11)
118
+
/* bit 12 - HC support eUSB2V2 capability */
119
+
#define HCC2_E2V2C BIT(12)
120
+
/* bits 31:13 - Rsvd */
+4
-4
drivers/usb/host/xhci-dbgcap.c
+4
-4
drivers/usb/host/xhci-dbgcap.c
···
374
374
ret = dbc_ep_do_queue(req);
375
375
spin_unlock_irqrestore(&dbc->lock, flags);
376
376
377
-
mod_delayed_work(system_wq, &dbc->event_work, 0);
377
+
mod_delayed_work(system_percpu_wq, &dbc->event_work, 0);
378
378
379
379
trace_xhci_dbc_queue_request(req);
380
380
···
677
677
return ret;
678
678
}
679
679
680
-
return mod_delayed_work(system_wq, &dbc->event_work,
680
+
return mod_delayed_work(system_percpu_wq, &dbc->event_work,
681
681
msecs_to_jiffies(dbc->poll_interval));
682
682
}
683
683
···
1023
1023
return;
1024
1024
}
1025
1025
1026
-
mod_delayed_work(system_wq, &dbc->event_work,
1026
+
mod_delayed_work(system_percpu_wq, &dbc->event_work,
1027
1027
msecs_to_jiffies(poll_interval));
1028
1028
}
1029
1029
···
1274
1274
1275
1275
dbc->poll_interval = value;
1276
1276
1277
-
mod_delayed_work(system_wq, &dbc->event_work, 0);
1277
+
mod_delayed_work(system_percpu_wq, &dbc->event_work, 0);
1278
1278
1279
1279
return size;
1280
1280
}
+42
-15
drivers/usb/host/xhci-debugfs.c
+42
-15
drivers/usb/host/xhci-debugfs.c
···
329
329
u32 portsc;
330
330
char str[XHCI_MSG_MAX];
331
331
332
-
portsc = readl(port->addr);
332
+
portsc = xhci_portsc_readl(port);
333
333
seq_printf(s, "%s\n", xhci_decode_portsc(str, portsc));
334
334
335
335
return 0;
···
355
355
356
356
if (!strncmp(buf, "compliance", 10)) {
357
357
/* If CTC is clear, compliance is enabled by default */
358
-
if (!HCC2_CTC(xhci->hcc_params2))
358
+
if (!(xhci->hcc_params2 & HCC2_CTC))
359
359
return count;
360
360
spin_lock_irqsave(&xhci->lock, flags);
361
361
/* compliance mode can only be enabled on ports in RxDetect */
362
-
portsc = readl(port->addr);
362
+
portsc = xhci_portsc_readl(port);
363
363
if ((portsc & PORT_PLS_MASK) != XDEV_RXDETECT) {
364
364
spin_unlock_irqrestore(&xhci->lock, flags);
365
365
return -EPERM;
···
367
367
portsc = xhci_port_state_to_neutral(portsc);
368
368
portsc &= ~PORT_PLS_MASK;
369
369
portsc |= PORT_LINK_STROBE | XDEV_COMP_MODE;
370
-
writel(portsc, port->addr);
370
+
xhci_portsc_writel(port, portsc);
371
371
spin_unlock_irqrestore(&xhci->lock, flags);
372
372
} else {
373
373
return -EINVAL;
···
378
378
static const struct file_operations port_fops = {
379
379
.open = xhci_port_open,
380
380
.write = xhci_port_write,
381
+
.read = seq_read,
382
+
.llseek = seq_lseek,
383
+
.release = single_release,
384
+
};
385
+
386
+
static int xhci_portli_show(struct seq_file *s, void *unused)
387
+
{
388
+
struct xhci_port *port = s->private;
389
+
struct xhci_hcd *xhci = hcd_to_xhci(port->rhub->hcd);
390
+
u32 portli;
391
+
392
+
portli = readl(&port->port_reg->portli);
393
+
394
+
/* PORTLI fields are valid if port is a USB3 or eUSB2V2 port */
395
+
if (port->rhub == &xhci->usb3_rhub)
396
+
seq_printf(s, "0x%08x LEC=%u RLC=%u TLC=%u\n", portli,
397
+
PORT_LEC(portli), PORT_RX_LANES(portli), PORT_TX_LANES(portli));
398
+
else if (xhci->hcc_params2 & HCC2_E2V2C)
399
+
seq_printf(s, "0x%08x RDR=%u TDR=%u\n", portli,
400
+
PORTLI_RDR(portli), PORTLI_TDR(portli));
401
+
else
402
+
seq_printf(s, "0x%08x RsvdP\n", portli);
403
+
404
+
return 0;
405
+
}
406
+
407
+
static int xhci_portli_open(struct inode *inode, struct file *file)
408
+
{
409
+
return single_open(file, xhci_portli_show, inode->i_private);
410
+
}
411
+
412
+
static const struct file_operations portli_fops = {
413
+
.open = xhci_portli_open,
381
414
.read = seq_read,
382
415
.llseek = seq_lseek,
383
416
.release = single_release,
···
646
613
static void xhci_debugfs_create_ports(struct xhci_hcd *xhci,
647
614
struct dentry *parent)
648
615
{
649
-
unsigned int num_ports;
650
616
char port_name[8];
651
617
struct xhci_port *port;
652
618
struct dentry *dir;
653
619
654
-
num_ports = HCS_MAX_PORTS(xhci->hcs_params1);
655
-
656
620
parent = debugfs_create_dir("ports", parent);
657
621
658
-
while (num_ports--) {
659
-
scnprintf(port_name, sizeof(port_name), "port%02d",
660
-
num_ports + 1);
622
+
for (int i = 0; i < xhci->max_ports; i++) {
623
+
scnprintf(port_name, sizeof(port_name), "port%02d", i + 1);
661
624
dir = debugfs_create_dir(port_name, parent);
662
-
port = &xhci->hw_ports[num_ports];
625
+
port = &xhci->hw_ports[i];
663
626
debugfs_create_file("portsc", 0644, dir, port, &port_fops);
627
+
debugfs_create_file("portli", 0444, dir, port, &portli_fops);
664
628
}
665
629
}
666
630
667
631
static int xhci_port_bw_show(struct xhci_hcd *xhci, u8 dev_speed,
668
632
struct seq_file *s)
669
633
{
670
-
unsigned int num_ports;
671
634
unsigned int i;
672
635
int ret;
673
636
struct xhci_container_ctx *ctx;
···
673
644
ret = pm_runtime_get_sync(dev);
674
645
if (ret < 0)
675
646
return ret;
676
-
677
-
num_ports = HCS_MAX_PORTS(xhci->hcs_params1);
678
647
679
648
ctx = xhci_alloc_port_bw_ctx(xhci, 0);
680
649
if (!ctx) {
···
688
661
/* print all roothub ports available bandwidth
689
662
* refer to xhci rev1_2 protocol 6.2.6 , byte 0 is reserved
690
663
*/
691
-
for (i = 1; i < num_ports+1; i++)
664
+
for (i = 1; i <= xhci->max_ports; i++)
692
665
seq_printf(s, "port[%d] available bw: %d%%.\n", i,
693
666
ctx->bytes[i]);
694
667
err_out:
+62
-63
drivers/usb/host/xhci-hub.c
+62
-63
drivers/usb/host/xhci-hub.c
···
110
110
ss_cap->bU2DevExitLat = 0; /* set later */
111
111
112
112
reg = readl(&xhci->cap_regs->hcc_params);
113
-
if (HCC_LTC(reg))
113
+
if (reg & HCC_LTC)
114
114
ss_cap->bmAttributes |= USB_LTM_SUPPORT;
115
115
116
116
if ((xhci->quirks & XHCI_LPM_SUPPORT)) {
···
263
263
desc->bNbrPorts = ports;
264
264
temp = 0;
265
265
/* Bits 1:0 - support per-port power switching, or power always on */
266
-
if (HCC_PPC(xhci->hcc_params))
266
+
if (xhci->hcc_params & HCC_PPC)
267
267
temp |= HUB_CHAR_INDV_PORT_LPSM;
268
268
else
269
269
temp |= HUB_CHAR_NO_LPSM;
···
299
299
*/
300
300
memset(port_removable, 0, sizeof(port_removable));
301
301
for (i = 0; i < ports; i++) {
302
-
portsc = readl(rhub->ports[i]->addr);
302
+
portsc = xhci_portsc_readl(rhub->ports[i]);
303
303
/* If a device is removable, PORTSC reports a 0, same as in the
304
304
* hub descriptor DeviceRemovable bits.
305
305
*/
···
356
356
port_removable = 0;
357
357
/* bit 0 is reserved, bit 1 is for port 1, etc. */
358
358
for (i = 0; i < ports; i++) {
359
-
portsc = readl(rhub->ports[i]->addr);
359
+
portsc = xhci_portsc_readl(rhub->ports[i]);
360
360
if (portsc & PORT_DEV_REMOVE)
361
361
port_removable |= 1 << (i + 1);
362
362
}
···
566
566
return;
567
567
}
568
568
569
-
portsc = readl(port->addr);
569
+
portsc = xhci_portsc_readl(port);
570
570
portsc = xhci_port_state_to_neutral(portsc);
571
571
572
572
/* Write 1 to disable the port */
573
-
writel(portsc | PORT_PE, port->addr);
573
+
xhci_portsc_writel(port, portsc | PORT_PE);
574
574
575
-
portsc = readl(port->addr);
575
+
portsc = xhci_portsc_readl(port);
576
576
xhci_dbg(xhci, "disable port %d-%d, portsc: 0x%x\n",
577
577
hcd->self.busnum, port->hcd_portnum + 1, portsc);
578
578
}
579
579
580
580
static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
581
-
u16 wIndex, __le32 __iomem *addr, u32 port_status)
581
+
u16 wIndex, struct xhci_port *port, u32 port_status)
582
582
{
583
583
char *port_change_bit;
584
584
u32 status;
···
621
621
return;
622
622
}
623
623
/* Change bits are all write 1 to clear */
624
-
writel(port_status | status, addr);
625
-
port_status = readl(addr);
624
+
xhci_portsc_writel(port, port_status | status);
625
+
port_status = xhci_portsc_readl(port);
626
626
627
627
xhci_dbg(xhci, "clear port%d %s change, portsc: 0x%x\n",
628
628
wIndex + 1, port_change_bit, port_status);
···
650
650
u32 temp;
651
651
652
652
hcd = port->rhub->hcd;
653
-
temp = readl(port->addr);
653
+
temp = xhci_portsc_readl(port);
654
654
655
655
xhci_dbg(xhci, "set port power %d-%d %s, portsc: 0x%x\n",
656
656
hcd->self.busnum, port->hcd_portnum + 1, on ? "ON" : "OFF", temp);
···
659
659
660
660
if (on) {
661
661
/* Power on */
662
-
writel(temp | PORT_POWER, port->addr);
663
-
readl(port->addr);
662
+
xhci_portsc_writel(port, temp | PORT_POWER);
663
+
xhci_portsc_readl(port);
664
664
} else {
665
665
/* Power off */
666
-
writel(temp & ~PORT_POWER, port->addr);
666
+
xhci_portsc_writel(port, temp & ~PORT_POWER);
667
667
}
668
668
669
669
spin_unlock_irqrestore(&xhci->lock, *flags);
···
683
683
684
684
/* xhci only supports test mode for usb2 ports */
685
685
port = xhci->usb2_rhub.ports[wIndex];
686
-
temp = readl(port->addr + PORTPMSC);
686
+
temp = readl(&port->port_reg->portpmsc);
687
687
temp |= test_mode << PORT_TEST_MODE_SHIFT;
688
-
writel(temp, port->addr + PORTPMSC);
688
+
writel(temp, &port->port_reg->portpmsc);
689
689
xhci->test_mode = test_mode;
690
690
if (test_mode == USB_TEST_FORCE_ENABLE)
691
691
xhci_start(xhci);
···
700
700
/* Disable all Device Slots */
701
701
xhci_dbg(xhci, "Disable all slots\n");
702
702
spin_unlock_irqrestore(&xhci->lock, *flags);
703
-
for (i = 1; i <= HCS_MAX_SLOTS(xhci->hcs_params1); i++) {
703
+
for (i = 1; i <= xhci->max_slots; i++) {
704
704
if (!xhci->devs[i])
705
705
continue;
706
706
···
801
801
u32 temp;
802
802
u32 portsc;
803
803
804
-
portsc = readl(port->addr);
804
+
portsc = xhci_portsc_readl(port);
805
805
temp = xhci_port_state_to_neutral(portsc);
806
806
temp &= ~PORT_PLS_MASK;
807
807
temp |= PORT_LINK_STROBE | link_state;
808
-
writel(temp, port->addr);
808
+
xhci_portsc_writel(port, temp);
809
809
810
810
xhci_dbg(xhci, "Set port %d-%d link state, portsc: 0x%x, write 0x%x",
811
811
port->rhub->hcd->self.busnum, port->hcd_portnum + 1,
···
817
817
{
818
818
u32 temp;
819
819
820
-
temp = readl(port->addr);
820
+
temp = xhci_portsc_readl(port);
821
821
temp = xhci_port_state_to_neutral(temp);
822
822
823
823
if (wake_mask & USB_PORT_FEAT_REMOTE_WAKE_CONNECT)
···
835
835
else
836
836
temp &= ~PORT_WKOC_E;
837
837
838
-
writel(temp, port->addr);
838
+
xhci_portsc_writel(port, temp);
839
839
}
840
840
841
841
/* Test and clear port RWC bit */
···
844
844
{
845
845
u32 temp;
846
846
847
-
temp = readl(port->addr);
847
+
temp = xhci_portsc_readl(port);
848
848
if (temp & port_bit) {
849
849
temp = xhci_port_state_to_neutral(temp);
850
850
temp |= port_bit;
851
-
writel(temp, port->addr);
851
+
xhci_portsc_writel(port, temp);
852
852
}
853
853
}
854
854
···
1002
1002
}
1003
1003
xhci_ring_device(xhci, port->slot_id);
1004
1004
} else {
1005
-
int port_status = readl(port->addr);
1005
+
int port_status = xhci_portsc_readl(port);
1006
1006
1007
1007
xhci_warn(xhci, "Port resume timed out, port %d-%d: 0x%x\n",
1008
1008
hcd->self.busnum, wIndex + 1, port_status);
···
1263
1263
1264
1264
wIndex--;
1265
1265
port = ports[portnum1 - 1];
1266
-
temp = readl(port->addr);
1266
+
temp = xhci_portsc_readl(port);
1267
1267
if (temp == ~(u32)0) {
1268
1268
xhci_hc_died(xhci);
1269
1269
retval = -ENODEV;
···
1288
1288
retval = -EINVAL;
1289
1289
break;
1290
1290
}
1291
-
port_li = readl(port->addr + PORTLI);
1291
+
port_li = readl(&port->port_reg->portli);
1292
1292
status = xhci_get_ext_port_status(temp, port_li);
1293
1293
put_unaligned_le32(status, &buf[4]);
1294
1294
}
···
1309
1309
1310
1310
port = ports[portnum1 - 1];
1311
1311
wIndex--;
1312
-
temp = readl(port->addr);
1312
+
temp = xhci_portsc_readl(port);
1313
1313
if (temp == ~(u32)0) {
1314
1314
xhci_hc_died(xhci);
1315
1315
retval = -ENODEV;
···
1319
1319
/* FIXME: What new port features do we need to support? */
1320
1320
switch (wValue) {
1321
1321
case USB_PORT_FEAT_SUSPEND:
1322
-
temp = readl(port->addr);
1322
+
temp = xhci_portsc_readl(port);
1323
1323
if ((temp & PORT_PLS_MASK) != XDEV_U0) {
1324
1324
/* Resume the port to U0 first */
1325
1325
xhci_set_link_state(xhci, port, XDEV_U0);
···
1331
1331
* a port unless the port reports that it is in the
1332
1332
* enabled (PED = ‘1’,PLS < ‘3’) state.
1333
1333
*/
1334
-
temp = readl(port->addr);
1334
+
temp = xhci_portsc_readl(port);
1335
1335
if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
1336
1336
|| (temp & PORT_PLS_MASK) >= XDEV_U3) {
1337
1337
xhci_warn(xhci, "USB core suspending port %d-%d not in U0/U1/U2\n",
···
1354
1354
msleep(10); /* wait device to enter */
1355
1355
spin_lock_irqsave(&xhci->lock, flags);
1356
1356
1357
-
temp = readl(port->addr);
1357
+
temp = xhci_portsc_readl(port);
1358
1358
bus_state->suspended_ports |= 1 << wIndex;
1359
1359
break;
1360
1360
case USB_PORT_FEAT_LINK_STATE:
1361
-
temp = readl(port->addr);
1361
+
temp = xhci_portsc_readl(port);
1362
1362
/* Disable port */
1363
1363
if (link_state == USB_SS_PORT_LS_SS_DISABLED) {
1364
1364
xhci_dbg(xhci, "Disable port %d-%d\n",
···
1371
1371
temp |= PORT_CSC | PORT_PEC | PORT_WRC |
1372
1372
PORT_OCC | PORT_RC | PORT_PLC |
1373
1373
PORT_CEC;
1374
-
writel(temp | PORT_PE, port->addr);
1375
-
temp = readl(port->addr);
1374
+
xhci_portsc_writel(port, temp | PORT_PE);
1375
+
temp = xhci_portsc_readl(port);
1376
1376
break;
1377
1377
}
1378
1378
···
1381
1381
xhci_dbg(xhci, "Enable port %d-%d\n",
1382
1382
hcd->self.busnum, portnum1);
1383
1383
xhci_set_link_state(xhci, port, link_state);
1384
-
temp = readl(port->addr);
1384
+
temp = xhci_portsc_readl(port);
1385
1385
break;
1386
1386
}
1387
1387
···
1400
1400
* automatically entered as on 1.0 and prior.
1401
1401
*/
1402
1402
if (link_state == USB_SS_PORT_LS_COMP_MOD) {
1403
-
if (!HCC2_CTC(xhci->hcc_params2)) {
1403
+
if (!(xhci->hcc_params2 & HCC2_CTC)) {
1404
1404
xhci_dbg(xhci, "CTC flag is 0, port already supports entering compliance mode\n");
1405
1405
break;
1406
1406
}
···
1414
1414
hcd->self.busnum, portnum1);
1415
1415
xhci_set_link_state(xhci, port, link_state);
1416
1416
1417
-
temp = readl(port->addr);
1417
+
temp = xhci_portsc_readl(port);
1418
1418
break;
1419
1419
}
1420
1420
/* Port must be enabled */
···
1462
1462
xhci_dbg(xhci, "missing U0 port change event for port %d-%d\n",
1463
1463
hcd->self.busnum, portnum1);
1464
1464
spin_lock_irqsave(&xhci->lock, flags);
1465
-
temp = readl(port->addr);
1465
+
temp = xhci_portsc_readl(port);
1466
1466
break;
1467
1467
}
1468
1468
···
1480
1480
spin_unlock_irqrestore(&xhci->lock, flags);
1481
1481
while (retries--) {
1482
1482
usleep_range(4000, 8000);
1483
-
temp = readl(port->addr);
1483
+
temp = xhci_portsc_readl(port);
1484
1484
if ((temp & PORT_PLS_MASK) == XDEV_U3)
1485
1485
break;
1486
1486
}
1487
1487
spin_lock_irqsave(&xhci->lock, flags);
1488
-
temp = readl(port->addr);
1488
+
temp = xhci_portsc_readl(port);
1489
1489
bus_state->suspended_ports |= 1 << wIndex;
1490
1490
}
1491
1491
break;
···
1500
1500
break;
1501
1501
case USB_PORT_FEAT_RESET:
1502
1502
temp = (temp | PORT_RESET);
1503
-
writel(temp, port->addr);
1503
+
xhci_portsc_writel(port, temp);
1504
1504
1505
-
temp = readl(port->addr);
1505
+
temp = xhci_portsc_readl(port);
1506
1506
xhci_dbg(xhci, "set port reset, actual port %d-%d status = 0x%x\n",
1507
1507
hcd->self.busnum, portnum1, temp);
1508
1508
break;
1509
1509
case USB_PORT_FEAT_REMOTE_WAKE_MASK:
1510
1510
xhci_set_remote_wake_mask(xhci, port, wake_mask);
1511
-
temp = readl(port->addr);
1511
+
temp = xhci_portsc_readl(port);
1512
1512
xhci_dbg(xhci, "set port remote wake mask, actual port %d-%d status = 0x%x\n",
1513
1513
hcd->self.busnum, portnum1, temp);
1514
1514
break;
1515
1515
case USB_PORT_FEAT_BH_PORT_RESET:
1516
1516
temp |= PORT_WR;
1517
-
writel(temp, port->addr);
1518
-
temp = readl(port->addr);
1517
+
xhci_portsc_writel(port, temp);
1518
+
temp = xhci_portsc_readl(port);
1519
1519
break;
1520
1520
case USB_PORT_FEAT_U1_TIMEOUT:
1521
1521
if (hcd->speed < HCD_USB3)
1522
1522
goto error;
1523
-
temp = readl(port->addr + PORTPMSC);
1523
+
temp = readl(&port->port_reg->portpmsc);
1524
1524
temp &= ~PORT_U1_TIMEOUT_MASK;
1525
1525
temp |= PORT_U1_TIMEOUT(timeout);
1526
-
writel(temp, port->addr + PORTPMSC);
1526
+
writel(temp, &port->port_reg->portpmsc);
1527
1527
break;
1528
1528
case USB_PORT_FEAT_U2_TIMEOUT:
1529
1529
if (hcd->speed < HCD_USB3)
1530
1530
goto error;
1531
-
temp = readl(port->addr + PORTPMSC);
1531
+
temp = readl(&port->port_reg->portpmsc);
1532
1532
temp &= ~PORT_U2_TIMEOUT_MASK;
1533
1533
temp |= PORT_U2_TIMEOUT(timeout);
1534
-
writel(temp, port->addr + PORTPMSC);
1534
+
writel(temp, &port->port_reg->portpmsc);
1535
1535
break;
1536
1536
case USB_PORT_FEAT_TEST:
1537
1537
/* 4.19.6 Port Test Modes (USB2 Test Mode) */
···
1547
1547
goto error;
1548
1548
}
1549
1549
/* unblock any posted writes */
1550
-
temp = readl(port->addr);
1550
+
temp = xhci_portsc_readl(port);
1551
1551
break;
1552
1552
case ClearPortFeature:
1553
1553
if (!portnum1 || portnum1 > max_ports)
···
1556
1556
port = ports[portnum1 - 1];
1557
1557
1558
1558
wIndex--;
1559
-
temp = readl(port->addr);
1559
+
temp = xhci_portsc_readl(port);
1560
1560
if (temp == ~(u32)0) {
1561
1561
xhci_hc_died(xhci);
1562
1562
retval = -ENODEV;
···
1566
1566
temp = xhci_port_state_to_neutral(temp);
1567
1567
switch (wValue) {
1568
1568
case USB_PORT_FEAT_SUSPEND:
1569
-
temp = readl(port->addr);
1569
+
temp = xhci_portsc_readl(port);
1570
1570
xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
1571
1571
xhci_dbg(xhci, "PORTSC %04x\n", temp);
1572
1572
if (temp & PORT_RESET)
···
1603
1603
case USB_PORT_FEAT_C_ENABLE:
1604
1604
case USB_PORT_FEAT_C_PORT_LINK_STATE:
1605
1605
case USB_PORT_FEAT_C_PORT_CONFIG_ERROR:
1606
-
xhci_clear_port_change_bit(xhci, wValue, wIndex,
1607
-
port->addr, temp);
1606
+
xhci_clear_port_change_bit(xhci, wValue, wIndex, port, temp);
1608
1607
break;
1609
1608
case USB_PORT_FEAT_ENABLE:
1610
1609
xhci_disable_port(xhci, port);
···
1670
1671
* SS devices are only visible to roothub after link training completes.
1671
1672
* Keep polling roothubs for a grace period after xHC start
1672
1673
*/
1673
-
if (xhci->run_graceperiod) {
1674
+
if (hcd->speed >= HCD_USB3 && xhci->run_graceperiod) {
1674
1675
if (time_before(jiffies, xhci->run_graceperiod))
1675
1676
status = 1;
1676
1677
else
···
1681
1682
1682
1683
/* For each port, did anything change? If so, set that bit in buf. */
1683
1684
for (i = 0; i < max_ports; i++) {
1684
-
temp = readl(ports[i]->addr);
1685
+
temp = xhci_portsc_readl(ports[i]);
1685
1686
if (temp == ~(u32)0) {
1686
1687
xhci_hc_died(xhci);
1687
1688
retval = -ENODEV;
···
1750
1751
u32 t1, t2;
1751
1752
int retries = 10;
1752
1753
retry:
1753
-
t1 = readl(ports[port_index]->addr);
1754
+
t1 = xhci_portsc_readl(ports[port_index]);
1754
1755
t2 = xhci_port_state_to_neutral(t1);
1755
1756
portsc_buf[port_index] = 0;
1756
1757
···
1828
1829
spin_lock_irqsave(&xhci->lock, flags);
1829
1830
}
1830
1831
}
1831
-
writel(portsc_buf[port_index], ports[port_index]->addr);
1832
+
xhci_portsc_writel(ports[port_index], portsc_buf[port_index]);
1832
1833
}
1833
1834
hcd->state = HC_STATE_SUSPENDED;
1834
1835
bus_state->next_statechange = jiffies + msecs_to_jiffies(10);
···
1849
1850
{
1850
1851
u32 portsc;
1851
1852
1852
-
portsc = readl(port->addr);
1853
+
portsc = xhci_portsc_readl(port);
1853
1854
1854
1855
/* if any of these are set we are not stuck */
1855
1856
if (portsc & (PORT_CONNECT | PORT_CAS))
···
1862
1863
/* clear wakeup/change bits, and do a warm port reset */
1863
1864
portsc &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
1864
1865
portsc |= PORT_WR;
1865
-
writel(portsc, port->addr);
1866
+
xhci_portsc_writel(port, portsc);
1866
1867
/* flush write */
1867
-
readl(port->addr);
1868
+
xhci_portsc_readl(port);
1868
1869
return true;
1869
1870
}
1870
1871
···
1911
1912
}
1912
1913
port_index = max_ports;
1913
1914
while (port_index--) {
1914
-
portsc = readl(ports[port_index]->addr);
1915
+
portsc = xhci_portsc_readl(ports[port_index]);
1915
1916
1916
1917
/* warm reset CAS limited ports stuck in polling/compliance */
1917
1918
if ((xhci->quirks & XHCI_MISSING_CAS) &&
···
1941
1942
}
1942
1943
/* disable wake for all ports, write new link state if needed */
1943
1944
portsc &= ~(PORT_RWC_BITS | PORT_CEC | PORT_WAKE_BITS);
1944
-
writel(portsc, ports[port_index]->addr);
1945
+
xhci_portsc_writel(ports[port_index], portsc);
1945
1946
}
1946
1947
1947
1948
/* USB2 specific resume signaling delay and U0 link state transition */
···
1962
1963
1963
1964
/* poll for U0 link state complete, both USB2 and USB3 */
1964
1965
for_each_set_bit(port_index, &bus_state->bus_suspended, BITS_PER_LONG) {
1965
-
sret = xhci_handshake(ports[port_index]->addr, PORT_PLC,
1966
+
sret = xhci_handshake(&ports[port_index]->port_reg->portsc, PORT_PLC,
1966
1967
PORT_PLC, 10 * 1000);
1967
1968
if (sret) {
1968
1969
xhci_warn(xhci, "port %d-%d resume PLC timeout\n",
+17
-24
drivers/usb/host/xhci-mem.c
+17
-24
drivers/usb/host/xhci-mem.c
···
463
463
return NULL;
464
464
465
465
ctx->type = type;
466
-
ctx->size = HCC_64BYTE_CONTEXT(xhci->hcc_params) ? 2048 : 1024;
466
+
ctx->size = xhci->hcc_params & HCC_64BYTE_CONTEXT ? 2048 : 1024;
467
467
if (type == XHCI_CTX_TYPE_INPUT)
468
468
ctx->size += CTX_SIZE(xhci->hcc_params);
469
469
···
951
951
/* is this a hub device that added a tt_info to the tts list */
952
952
if (tt_info->slot_id == slot_id) {
953
953
/* are any devices using this tt_info? */
954
-
for (i = 1; i < HCS_MAX_SLOTS(xhci->hcs_params1); i++) {
954
+
for (i = 1; i < xhci->max_slots; i++) {
955
955
vdev = xhci->devs[i];
956
956
if (vdev && (vdev->tt_info == tt_info))
957
957
xhci_free_virt_devices_depth_first(
···
1344
1344
bool lec;
1345
1345
1346
1346
/* xHCI 1.1 with LEC set does not use mult field, except intel eUSB2 */
1347
-
lec = xhci->hci_version > 0x100 && HCC2_LEC(xhci->hcc_params2);
1347
+
lec = xhci->hci_version > 0x100 && (xhci->hcc_params2 & HCC2_LEC);
1348
1348
1349
1349
/* eUSB2 double isoc bw devices are the only USB2 devices using mult */
1350
1350
if (usb_endpoint_is_hs_isoc_double(udev, ep) &&
···
1433
1433
ring_type = usb_endpoint_type(&ep->desc);
1434
1434
1435
1435
/* Ensure host supports double isoc bandwidth for eUSB2 devices */
1436
-
if (usb_endpoint_is_hs_isoc_double(udev, ep) &&
1437
-
!HCC2_EUSB2_DIC(xhci->hcc_params2)) {
1436
+
if (usb_endpoint_is_hs_isoc_double(udev, ep) && !(xhci->hcc_params2 & HCC2_EUSB2_DIC)) {
1438
1437
dev_dbg(&udev->dev, "Double Isoc Bandwidth not supported by xhci\n");
1439
1438
return -EINVAL;
1440
1439
}
···
1898
1899
void xhci_mem_cleanup(struct xhci_hcd *xhci)
1899
1900
{
1900
1901
struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
1901
-
int i, j, num_ports;
1902
+
int i, j;
1902
1903
1903
1904
cancel_delayed_work_sync(&xhci->cmd_timer);
1904
1905
···
1917
1918
xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Freed command ring");
1918
1919
xhci_cleanup_command_queue(xhci);
1919
1920
1920
-
num_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1921
-
for (i = 0; i < num_ports && xhci->rh_bw; i++) {
1921
+
for (i = 0; i < xhci->max_ports && xhci->rh_bw; i++) {
1922
1922
struct xhci_interval_bw_table *bwt = &xhci->rh_bw[i].bw_table;
1923
1923
for (j = 0; j < XHCI_MAX_INTERVAL; j++) {
1924
1924
struct list_head *ep = &bwt->interval_bw[j].endpoints;
···
1926
1928
}
1927
1929
}
1928
1930
1929
-
for (i = HCS_MAX_SLOTS(xhci->hcs_params1); i > 0; i--)
1931
+
for (i = xhci->max_slots; i > 0; i--)
1930
1932
xhci_free_virt_devices_depth_first(xhci, i);
1931
1933
1932
1934
dma_pool_destroy(xhci->segment_pool);
···
1962
1964
if (!xhci->rh_bw)
1963
1965
goto no_bw;
1964
1966
1965
-
for (i = 0; i < num_ports; i++) {
1967
+
for (i = 0; i < xhci->max_ports; i++) {
1966
1968
struct xhci_tt_bw_info *tt, *n;
1967
1969
list_for_each_entry_safe(tt, n, &xhci->rh_bw[i].tts, tt_list) {
1968
1970
list_del(&tt->tt_list);
···
2163
2165
if (!rhub->ports)
2164
2166
return;
2165
2167
2166
-
for (i = 0; i < HCS_MAX_PORTS(xhci->hcs_params1); i++) {
2168
+
for (i = 0; i < xhci->max_ports; i++) {
2167
2169
if (xhci->hw_ports[i].rhub != rhub ||
2168
2170
xhci->hw_ports[i].hcd_portnum == DUPLICATE_ENTRY)
2169
2171
continue;
···
2186
2188
{
2187
2189
void __iomem *base;
2188
2190
u32 offset;
2189
-
unsigned int num_ports;
2190
2191
int i, j;
2191
2192
int cap_count = 0;
2192
2193
u32 cap_start;
2193
2194
struct device *dev = xhci_to_hcd(xhci)->self.sysdev;
2194
2195
2195
-
num_ports = HCS_MAX_PORTS(xhci->hcs_params1);
2196
-
xhci->hw_ports = kcalloc_node(num_ports, sizeof(*xhci->hw_ports),
2197
-
flags, dev_to_node(dev));
2196
+
xhci->hw_ports = kcalloc_node(xhci->max_ports, sizeof(*xhci->hw_ports),
2197
+
flags, dev_to_node(dev));
2198
2198
if (!xhci->hw_ports)
2199
2199
return -ENOMEM;
2200
2200
2201
-
for (i = 0; i < num_ports; i++) {
2202
-
xhci->hw_ports[i].addr = &xhci->op_regs->port_status_base +
2203
-
NUM_PORT_REGS * i;
2201
+
for (i = 0; i < xhci->max_ports; i++) {
2202
+
xhci->hw_ports[i].port_reg = &xhci->op_regs->port_regs[i];
2204
2203
xhci->hw_ports[i].hw_portnum = i;
2205
2204
2206
2205
init_completion(&xhci->hw_ports[i].rexit_done);
2207
2206
init_completion(&xhci->hw_ports[i].u3exit_done);
2208
2207
}
2209
2208
2210
-
xhci->rh_bw = kcalloc_node(num_ports, sizeof(*xhci->rh_bw), flags,
2211
-
dev_to_node(dev));
2209
+
xhci->rh_bw = kcalloc_node(xhci->max_ports, sizeof(*xhci->rh_bw), flags, dev_to_node(dev));
2212
2210
if (!xhci->rh_bw)
2213
2211
return -ENOMEM;
2214
-
for (i = 0; i < num_ports; i++) {
2212
+
for (i = 0; i < xhci->max_ports; i++) {
2215
2213
struct xhci_interval_bw_table *bw_table;
2216
2214
2217
2215
INIT_LIST_HEAD(&xhci->rh_bw[i].tts);
···
2239
2245
offset = cap_start;
2240
2246
2241
2247
while (offset) {
2242
-
xhci_add_in_port(xhci, num_ports, base + offset, cap_count);
2243
-
if (xhci->usb2_rhub.num_ports + xhci->usb3_rhub.num_ports ==
2244
-
num_ports)
2248
+
xhci_add_in_port(xhci, xhci->max_ports, base + offset, cap_count);
2249
+
if (xhci->usb2_rhub.num_ports + xhci->usb3_rhub.num_ports == xhci->max_ports)
2245
2250
break;
2246
2251
offset = xhci_find_next_ext_cap(base, offset,
2247
2252
XHCI_EXT_CAPS_PROTOCOL);
-1
drivers/usb/host/xhci-mtk.c
-1
drivers/usb/host/xhci-mtk.c
+6
-4
drivers/usb/host/xhci-mtk.h
+6
-4
drivers/usb/host/xhci-mtk.h
···
21
21
/* support at most 64 ep, use 32 size hash table */
22
22
#define SCH_EP_HASH_BITS 5
23
23
24
-
/**
24
+
/*
25
25
* To simplify scheduler algorithm, set a upper limit for ESIT,
26
26
* if a synchromous ep's ESIT is larger than @XHCI_MTK_MAX_ESIT,
27
27
* round down to the limit value, that means allocating more
···
34
34
#define XHCI_MTK_FRAMES_CNT (XHCI_MTK_MAX_ESIT / UFRAMES_PER_FRAME)
35
35
36
36
/**
37
+
* struct mu3h_sch_tt - TT scheduling data
37
38
* @fs_bus_bw_out: save bandwidth used by FS/LS OUT eps in each uframes
38
39
* @fs_bus_bw_in: save bandwidth used by FS/LS IN eps in each uframes
39
40
* @ls_bus_bw: save bandwidth used by LS eps in each uframes
···
52
51
};
53
52
54
53
/**
55
-
* struct mu3h_sch_bw_info: schedule information for bandwidth domain
54
+
* struct mu3h_sch_bw_info - schedule information for bandwidth domain
56
55
*
57
56
* @bus_bw: array to keep track of bandwidth already used at each uframes
58
57
*
···
64
63
};
65
64
66
65
/**
67
-
* struct mu3h_sch_ep_info: schedule information for endpoint
66
+
* struct mu3h_sch_ep_info - schedule information for endpoint
68
67
*
69
68
* @esit: unit is 125us, equal to 2 << Interval field in ep-context
70
69
* @num_esit: number of @esit in a period
···
78
77
* @ep_type: endpoint type
79
78
* @maxpkt: max packet size of endpoint
80
79
* @ep: address of usb_host_endpoint struct
80
+
* @speed: usb device speed
81
81
* @allocated: the bandwidth is aready allocated from bus_bw
82
82
* @offset: which uframe of the interval that transfer should be
83
83
* scheduled first time within the interval
···
127
125
#define MU3C_U2_PORT_MAX 5
128
126
129
127
/**
130
-
* struct mu3c_ippc_regs: MTK ssusb ip port control registers
128
+
* struct mu3c_ippc_regs - MTK ssusb ip port control registers
131
129
* @ip_pw_ctr0~3: ip power and clock control registers
132
130
* @ip_pw_sts1~2: ip power and clock status registers
133
131
* @ip_xhci_cap: ip xHCI capability register
+3
-3
drivers/usb/host/xhci-pci.c
+3
-3
drivers/usb/host/xhci-pci.c
···
896
896
if (!(xhci->quirks & XHCI_RESET_TO_DEFAULT))
897
897
return 0;
898
898
899
-
for (i = 0; i < HCS_MAX_PORTS(xhci->hcs_params1); i++) {
899
+
for (i = 0; i < xhci->max_ports; i++) {
900
900
port = &xhci->hw_ports[i];
901
-
portsc = readl(port->addr);
901
+
portsc = xhci_portsc_readl(port);
902
902
903
903
if ((portsc & PORT_PLS_MASK) != XDEV_U3)
904
904
continue;
···
919
919
xhci_dbg(xhci, "port %d-%d in U3 without wakeup, disable it\n",
920
920
port->rhub->hcd->self.busnum, port->hcd_portnum + 1);
921
921
portsc = xhci_port_state_to_neutral(portsc);
922
-
writel(portsc | PORT_PE, port->addr);
922
+
xhci_portsc_writel(port, portsc | PORT_PE);
923
923
}
924
924
925
925
return 0;
+5
drivers/usb/host/xhci-port.h
+5
drivers/usb/host/xhci-port.h
···
144
144
#define PORT_TEST_MODE_SHIFT 28
145
145
146
146
/* USB3 Protocol PORTLI Port Link Information */
147
+
#define PORT_LEC(p) ((p) & 0xffff)
147
148
#define PORT_RX_LANES(p) (((p) >> 16) & 0xf)
148
149
#define PORT_TX_LANES(p) (((p) >> 20) & 0xf)
150
+
151
+
/* eUSB2v2 protocol PORTLI Port Link information, RsvdP for normal USB2 */
152
+
#define PORTLI_RDR(p) ((p) & 0xf)
153
+
#define PORTLI_TDR(p) (((p) >> 4) & 0xf)
149
154
150
155
/* USB2 Protocol PORTHLPMC */
151
156
#define PORT_HIRDM(p)((p) & 3)
+107
-133
drivers/usb/host/xhci-ring.c
+107
-133
drivers/usb/host/xhci-ring.c
···
82
82
return seg->dma + (segment_offset * sizeof(*trb));
83
83
}
84
84
85
+
static union xhci_trb *xhci_dma_to_trb(struct xhci_segment *start_seg,
86
+
dma_addr_t dma,
87
+
struct xhci_segment **match_seg)
88
+
{
89
+
struct xhci_segment *seg;
90
+
91
+
xhci_for_each_ring_seg(start_seg, seg) {
92
+
if (in_range(dma, seg->dma, TRB_SEGMENT_SIZE)) {
93
+
if (match_seg)
94
+
*match_seg = seg;
95
+
return &seg->trbs[(dma - seg->dma) / sizeof(union xhci_trb)];
96
+
}
97
+
}
98
+
99
+
return NULL;
100
+
}
101
+
85
102
static bool trb_is_noop(union xhci_trb *trb)
86
103
{
87
104
return TRB_TYPE_NOOP_LE32(trb->generic.field[3]);
···
145
128
urb_priv->num_tds_done++;
146
129
}
147
130
148
-
static void trb_to_noop(union xhci_trb *trb, u32 noop_type)
131
+
static void trb_to_noop(union xhci_trb *trb, u32 noop_type, bool unchain_links)
149
132
{
150
133
if (trb_is_link(trb)) {
151
-
/* unchain chained link TRBs */
152
-
trb->link.control &= cpu_to_le32(~TRB_CHAIN);
134
+
if (unchain_links)
135
+
trb->link.control &= cpu_to_le32(~TRB_CHAIN);
153
136
} else {
154
137
trb->generic.field[0] = 0;
155
138
trb->generic.field[1] = 0;
···
158
141
trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
159
142
trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(noop_type));
160
143
}
144
+
}
145
+
146
+
static unsigned int trb_to_pos(struct xhci_segment *seg, union xhci_trb *trb)
147
+
{
148
+
return seg->num * TRBS_PER_SEGMENT + (trb - seg->trbs);
161
149
}
162
150
163
151
/* Updates trb to point to the next TRB in the ring, and updates seg if the next
···
304
282
inc_enq_past_link(xhci, ring, chain);
305
283
}
306
284
307
-
/*
308
-
* If the suspect DMA address is a TRB in this TD, this function returns that
309
-
* TRB's segment. Otherwise it returns 0.
310
-
*/
311
-
static struct xhci_segment *trb_in_td(struct xhci_td *td, dma_addr_t suspect_dma)
285
+
static bool dma_in_range(dma_addr_t dma,
286
+
struct xhci_segment *start_seg, union xhci_trb *start_trb,
287
+
struct xhci_segment *end_seg, union xhci_trb *end_trb)
312
288
{
313
-
dma_addr_t start_dma;
314
-
dma_addr_t end_seg_dma;
315
-
dma_addr_t end_trb_dma;
316
-
struct xhci_segment *cur_seg;
289
+
unsigned int pos, start, end;
290
+
struct xhci_segment *pos_seg;
291
+
union xhci_trb *pos_trb = xhci_dma_to_trb(start_seg, dma, &pos_seg);
317
292
318
-
start_dma = xhci_trb_virt_to_dma(td->start_seg, td->start_trb);
319
-
cur_seg = td->start_seg;
293
+
/* Is the trb dma address even part of the whole ring? */
294
+
if (!pos_trb)
295
+
return false;
320
296
321
-
do {
322
-
if (start_dma == 0)
323
-
return NULL;
324
-
/* We may get an event for a Link TRB in the middle of a TD */
325
-
end_seg_dma = xhci_trb_virt_to_dma(cur_seg,
326
-
&cur_seg->trbs[TRBS_PER_SEGMENT - 1]);
327
-
/* If the end TRB isn't in this segment, this is set to 0 */
328
-
end_trb_dma = xhci_trb_virt_to_dma(cur_seg, td->end_trb);
297
+
pos = trb_to_pos(pos_seg, pos_trb);
298
+
start = trb_to_pos(start_seg, start_trb);
299
+
end = trb_to_pos(end_seg, end_trb);
329
300
330
-
if (end_trb_dma > 0) {
331
-
/* The end TRB is in this segment, so suspect should be here */
332
-
if (start_dma <= end_trb_dma) {
333
-
if (suspect_dma >= start_dma && suspect_dma <= end_trb_dma)
334
-
return cur_seg;
335
-
} else {
336
-
/* Case for one segment with
337
-
* a TD wrapped around to the top
338
-
*/
339
-
if ((suspect_dma >= start_dma &&
340
-
suspect_dma <= end_seg_dma) ||
341
-
(suspect_dma >= cur_seg->dma &&
342
-
suspect_dma <= end_trb_dma))
343
-
return cur_seg;
344
-
}
345
-
return NULL;
346
-
}
347
-
/* Might still be somewhere in this segment */
348
-
if (suspect_dma >= start_dma && suspect_dma <= end_seg_dma)
349
-
return cur_seg;
301
+
/* end position is smaller than start, search range wraps around */
302
+
if (end < start)
303
+
return !(pos > end && pos < start);
350
304
351
-
cur_seg = cur_seg->next;
352
-
start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]);
353
-
} while (cur_seg != td->start_seg);
305
+
return (pos >= start && pos <= end);
306
+
}
354
307
355
-
return NULL;
308
+
/* If the suspect DMA address is a TRB in this TD, this function returns true */
309
+
static bool trb_in_td(struct xhci_td *td, dma_addr_t suspect_dma)
310
+
{
311
+
return dma_in_range(suspect_dma, td->start_seg, td->start_trb,
312
+
td->end_seg, td->end_trb);
356
313
}
357
314
358
315
/*
···
435
434
436
435
static bool xhci_mod_cmd_timer(struct xhci_hcd *xhci)
437
436
{
438
-
return mod_delayed_work(system_wq, &xhci->cmd_timer,
437
+
return mod_delayed_work(system_percpu_wq, &xhci->cmd_timer,
439
438
msecs_to_jiffies(xhci->current_cmd->timeout_ms));
440
439
}
441
440
···
466
465
xhci_dbg(xhci, "Turn aborted command %p to no-op\n",
467
466
i_cmd->command_trb);
468
467
469
-
trb_to_noop(i_cmd->command_trb, TRB_CMD_NOOP);
468
+
trb_to_noop(i_cmd->command_trb, TRB_CMD_NOOP, false);
470
469
471
470
/*
472
471
* caller waiting for completion is called when command
···
798
797
* (The last TRB actually points to the ring enqueue pointer, which is not part
799
798
* of this TD.) This is used to remove partially enqueued isoc TDs from a ring.
800
799
*/
801
-
static void td_to_noop(struct xhci_td *td, bool flip_cycle)
800
+
static void td_to_noop(struct xhci_hcd *xhci, struct xhci_virt_ep *ep,
801
+
struct xhci_td *td, bool flip_cycle)
802
802
{
803
+
bool unchain_links;
803
804
struct xhci_segment *seg = td->start_seg;
804
805
union xhci_trb *trb = td->start_trb;
805
806
807
+
/* link TRBs should now be unchained, but some old HCs expect otherwise */
808
+
unchain_links = !xhci_link_chain_quirk(xhci, ep->ring ? ep->ring->type : TYPE_STREAM);
809
+
806
810
while (1) {
807
-
trb_to_noop(trb, TRB_TR_NOOP);
811
+
trb_to_noop(trb, TRB_TR_NOOP, unchain_links);
808
812
809
813
/* flip cycle if asked to */
810
814
if (flip_cycle && trb != td->start_trb && trb != td->end_trb)
···
1097
1091
"Found multiple active URBs %p and %p in stream %u?\n",
1098
1092
td->urb, cached_td->urb,
1099
1093
td->urb->stream_id);
1100
-
td_to_noop(cached_td, false);
1094
+
td_to_noop(xhci, ep, cached_td, false);
1101
1095
cached_td->cancel_status = TD_CLEARED;
1102
1096
}
1103
-
td_to_noop(td, false);
1097
+
td_to_noop(xhci, ep, td, false);
1104
1098
td->cancel_status = TD_CLEARING_CACHE;
1105
1099
cached_td = td;
1106
1100
break;
1107
1101
}
1108
1102
} else {
1109
-
td_to_noop(td, false);
1103
+
td_to_noop(xhci, ep, td, false);
1110
1104
td->cancel_status = TD_CLEARED;
1111
1105
}
1112
1106
}
···
1131
1125
continue;
1132
1126
xhci_warn(xhci, "Failed to clear cancelled cached URB %p, mark clear anyway\n",
1133
1127
td->urb);
1134
-
td_to_noop(td, false);
1128
+
td_to_noop(xhci, ep, td, false);
1135
1129
td->cancel_status = TD_CLEARED;
1136
1130
}
1137
1131
}
···
1394
1388
xhci_cleanup_command_queue(xhci);
1395
1389
1396
1390
/* return any pending urbs, remove may be waiting for them */
1397
-
for (i = 0; i <= HCS_MAX_SLOTS(xhci->hcs_params1); i++) {
1391
+
for (i = 0; i <= xhci->max_slots; i++) {
1398
1392
if (!xhci->devs[i])
1399
1393
continue;
1400
1394
for (j = 0; j < 31; j++)
···
1995
1989
struct usb_hcd *hcd;
1996
1990
u32 port_id;
1997
1991
u32 portsc, cmd_reg;
1998
-
int max_ports;
1999
1992
unsigned int hcd_portnum;
2000
1993
struct xhci_bus_state *bus_state;
2001
1994
bool bogus_port_status = false;
···
2006
2001
"WARN: xHC returned failed port status event\n");
2007
2002
2008
2003
port_id = GET_PORT_ID(le32_to_cpu(event->generic.field[0]));
2009
-
max_ports = HCS_MAX_PORTS(xhci->hcs_params1);
2010
2004
2011
-
if ((port_id <= 0) || (port_id > max_ports)) {
2005
+
if ((port_id <= 0) || (port_id > xhci->max_ports)) {
2012
2006
xhci_warn(xhci, "Port change event with invalid port ID %d\n",
2013
2007
port_id);
2014
2008
return;
···
2034
2030
hcd = port->rhub->hcd;
2035
2031
bus_state = &port->rhub->bus_state;
2036
2032
hcd_portnum = port->hcd_portnum;
2037
-
portsc = readl(port->addr);
2033
+
portsc = xhci_portsc_readl(port);
2038
2034
2039
2035
xhci_dbg(xhci, "Port change event, %d-%d, id %d, portsc: 0x%x\n",
2040
2036
hcd->self.busnum, hcd_portnum + 1, port_id, portsc);
···
2188
2184
* External device side is also halted in functional stall cases. Class driver
2189
2185
* will clear the device halt with a CLEAR_FEATURE(ENDPOINT_HALT) request later.
2190
2186
*/
2191
-
static bool xhci_halted_host_endpoint(struct xhci_ep_ctx *ep_ctx, unsigned int comp_code)
2187
+
static bool xhci_halted_host_endpoint(struct xhci_hcd *xhci, struct xhci_ep_ctx *ep_ctx,
2188
+
unsigned int comp_code)
2192
2189
{
2193
-
/* Stall halts both internal and device side endpoint */
2194
-
if (comp_code == COMP_STALL_ERROR)
2195
-
return true;
2190
+
int ep_type = CTX_TO_EP_TYPE(le32_to_cpu(ep_ctx->ep_info2));
2196
2191
2197
-
/* TRB completion codes that may require internal halt cleanup */
2198
-
if (comp_code == COMP_USB_TRANSACTION_ERROR ||
2199
-
comp_code == COMP_BABBLE_DETECTED_ERROR ||
2200
-
comp_code == COMP_SPLIT_TRANSACTION_ERROR)
2192
+
switch (comp_code) {
2193
+
case COMP_STALL_ERROR:
2194
+
/* on xHCI this always halts, including protocol stall */
2195
+
return true;
2196
+
case COMP_BABBLE_DETECTED_ERROR:
2201
2197
/*
2202
2198
* The 0.95 spec says a babbling control endpoint is not halted.
2203
2199
* The 0.96 spec says it is. Some HW claims to be 0.95
2204
2200
* compliant, but it halts the control endpoint anyway.
2205
2201
* Check endpoint context if endpoint is halted.
2206
2202
*/
2207
-
if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_HALTED)
2208
-
return true;
2203
+
if (xhci->hci_version <= 0x95 && ep_type == CTRL_EP)
2204
+
return GET_EP_CTX_STATE(ep_ctx) == EP_STATE_HALTED;
2205
+
2206
+
fallthrough;
2207
+
case COMP_USB_TRANSACTION_ERROR:
2208
+
case COMP_SPLIT_TRANSACTION_ERROR:
2209
+
/* these errors halt all non-isochronous endpoints */
2210
+
return ep_type != ISOC_IN_EP && ep_type != ISOC_OUT_EP;
2211
+
}
2209
2212
2210
2213
return false;
2211
2214
}
···
2249
2238
* the ring dequeue pointer or take this TD off any lists yet.
2250
2239
*/
2251
2240
return;
2252
-
case COMP_USB_TRANSACTION_ERROR:
2253
-
case COMP_BABBLE_DETECTED_ERROR:
2254
-
case COMP_SPLIT_TRANSACTION_ERROR:
2255
-
/*
2256
-
* If endpoint context state is not halted we might be
2257
-
* racing with a reset endpoint command issued by a unsuccessful
2258
-
* stop endpoint completion (context error). In that case the
2259
-
* td should be on the cancelled list, and EP_HALTED flag set.
2260
-
*
2261
-
* Or then it's not halted due to the 0.95 spec stating that a
2262
-
* babbling control endpoint should not halt. The 0.96 spec
2263
-
* again says it should. Some HW claims to be 0.95 compliant,
2264
-
* but it halts the control endpoint anyway.
2265
-
*/
2266
-
if (GET_EP_CTX_STATE(ep_ctx) != EP_STATE_HALTED) {
2267
-
/*
2268
-
* If EP_HALTED is set and TD is on the cancelled list
2269
-
* the TD and dequeue pointer will be handled by reset
2270
-
* ep command completion
2271
-
*/
2272
-
if ((ep->ep_state & EP_HALTED) &&
2273
-
!list_empty(&td->cancelled_td_list)) {
2274
-
xhci_dbg(xhci, "Already resolving halted ep for 0x%llx\n",
2275
-
(unsigned long long)xhci_trb_virt_to_dma(
2276
-
td->start_seg, td->start_trb));
2277
-
return;
2278
-
}
2279
-
/* endpoint not halted, don't reset it */
2280
-
break;
2281
-
}
2282
-
/* Almost same procedure as for STALL_ERROR below */
2283
-
xhci_clear_hub_tt_buffer(xhci, td, ep);
2284
-
xhci_handle_halted_endpoint(xhci, ep, td, EP_HARD_RESET);
2285
-
return;
2286
-
case COMP_STALL_ERROR:
2241
+
}
2242
+
2243
+
if (xhci_halted_host_endpoint(xhci, ep_ctx, trb_comp_code)) {
2287
2244
/*
2288
2245
* xhci internal endpoint state will go to a "halt" state for
2289
2246
* any stall, including default control pipe protocol stall.
···
2262
2283
* stall later. Hub TT buffer should only be cleared for FS/LS
2263
2284
* devices behind HS hubs for functional stalls.
2264
2285
*/
2265
-
if (ep->ep_index != 0)
2286
+
if (!(ep->ep_index == 0 && trb_comp_code == COMP_STALL_ERROR))
2266
2287
xhci_clear_hub_tt_buffer(xhci, td, ep);
2267
2288
2268
2289
xhci_handle_halted_endpoint(xhci, ep, td, EP_HARD_RESET);
2269
2290
2270
2291
return; /* xhci_handle_halted_endpoint marked td cancelled */
2271
-
default:
2272
-
break;
2273
2292
}
2274
2293
2275
2294
xhci_dequeue_td(xhci, td, ep_ring, td->status);
···
2344
2367
case COMP_STOPPED_LENGTH_INVALID:
2345
2368
goto finish_td;
2346
2369
default:
2347
-
if (!xhci_halted_host_endpoint(ep_ctx, trb_comp_code))
2370
+
if (!xhci_halted_host_endpoint(xhci, ep_ctx, trb_comp_code))
2348
2371
break;
2349
2372
xhci_dbg(xhci, "TRB error %u, halted endpoint index = %u\n",
2350
2373
trb_comp_code, ep->ep_index);
···
2640
2663
int ep_index;
2641
2664
struct xhci_td *td = NULL;
2642
2665
dma_addr_t ep_trb_dma;
2643
-
struct xhci_segment *ep_seg;
2644
2666
union xhci_trb *ep_trb;
2645
2667
int status = -EINPROGRESS;
2646
2668
struct xhci_ep_ctx *ep_ctx;
···
2669
2693
2670
2694
if (!ep_ring)
2671
2695
return handle_transferless_tx_event(xhci, ep, trb_comp_code);
2696
+
2697
+
/* find the transfer trb this events points to */
2698
+
ep_trb = xhci_dma_to_trb(ep_ring->deq_seg, ep_trb_dma, NULL);
2672
2699
2673
2700
/* Look for common error cases */
2674
2701
switch (trb_comp_code) {
···
2846
2867
td = list_first_entry(&ep_ring->td_list, struct xhci_td,
2847
2868
td_list);
2848
2869
2849
-
/* Is this a TRB in the currently executing TD? */
2850
-
ep_seg = trb_in_td(td, ep_trb_dma);
2851
-
2852
-
if (!ep_seg) {
2870
+
/* Is this TRB not part of the currently executing TD? */
2871
+
if (!trb_in_td(td, ep_trb_dma)) {
2853
2872
2854
2873
if (ep->skip && usb_endpoint_xfer_isoc(&td->urb->ep->desc)) {
2855
2874
/* this event is unlikely to match any TD, don't skip them all */
···
2930
2953
if (ring_xrun_event)
2931
2954
return 0;
2932
2955
2933
-
ep_trb = &ep_seg->trbs[(ep_trb_dma - ep_seg->dma) / sizeof(*ep_trb)];
2934
2956
trace_xhci_handle_transfer(ep_ring, (struct xhci_generic_trb *) ep_trb, ep_trb_dma);
2935
2957
2936
2958
/*
···
2954
2978
return 0;
2955
2979
2956
2980
check_endpoint_halted:
2957
-
if (xhci_halted_host_endpoint(ep_ctx, trb_comp_code))
2981
+
if (xhci_halted_host_endpoint(xhci, ep_ctx, trb_comp_code))
2958
2982
xhci_handle_halted_endpoint(xhci, ep, td, EP_HARD_RESET);
2959
2983
2960
2984
return 0;
···
3966
3990
return total_packet_count - 1;
3967
3991
}
3968
3992
3993
+
/* Returns the Isochronous Scheduling Threshold in Microframes. 1 Frame is 8 Microframes. */
3994
+
static int xhci_ist_microframes(struct xhci_hcd *xhci)
3995
+
{
3996
+
int ist = HCS_IST_VALUE(xhci->hcs_params2);
3997
+
3998
+
if (xhci->hcs_params2 & HCS_IST_UNIT)
3999
+
ist *= 8;
4000
+
return ist;
4001
+
}
4002
+
3969
4003
/*
3970
4004
* Calculates Frame ID field of the isochronous TRB identifies the
3971
4005
* target frame that the Interval associated with this Isochronous
···
3995
4009
else
3996
4010
start_frame = (urb->start_frame + index * urb->interval) >> 3;
3997
4011
3998
-
/* Isochronous Scheduling Threshold (IST, bits 0~3 in HCSPARAMS2):
3999
-
*
4000
-
* If bit [3] of IST is cleared to '0', software can add a TRB no
4001
-
* later than IST[2:0] Microframes before that TRB is scheduled to
4002
-
* be executed.
4003
-
* If bit [3] of IST is set to '1', software can add a TRB no later
4004
-
* than IST[2:0] Frames before that TRB is scheduled to be executed.
4005
-
*/
4006
-
ist = HCS_IST(xhci->hcs_params2) & 0x7;
4007
-
if (HCS_IST(xhci->hcs_params2) & (1 << 3))
4008
-
ist <<= 3;
4012
+
ist = xhci_ist_microframes(xhci);
4009
4013
4010
4014
/* Software shall not schedule an Isoch TD with a Frame ID value that
4011
4015
* is less than the Start Frame ID or greater than the End Frame ID,
···
4140
4164
/* use SIA as default, if frame id is used overwrite it */
4141
4165
sia_frame_id = TRB_SIA;
4142
4166
if (!(urb->transfer_flags & URB_ISO_ASAP) &&
4143
-
HCC_CFC(xhci->hcc_params)) {
4167
+
(xhci->hcc_params & HCC_CFC)) {
4144
4168
frame_id = xhci_get_isoc_frame_id(xhci, urb, i);
4145
4169
if (frame_id >= 0)
4146
4170
sia_frame_id = TRB_FRAME_ID(frame_id);
···
4224
4248
}
4225
4249
4226
4250
/* store the next frame id */
4227
-
if (HCC_CFC(xhci->hcc_params))
4251
+
if (xhci->hcc_params & HCC_CFC)
4228
4252
xep->next_frame_id = urb->start_frame + num_tds * urb->interval;
4229
4253
4230
4254
if (xhci_to_hcd(xhci)->self.bandwidth_isoc_reqs == 0) {
···
4249
4273
*/
4250
4274
urb_priv->td[0].end_trb = ep_ring->enqueue;
4251
4275
/* Every TRB except the first & last will have its cycle bit flipped. */
4252
-
td_to_noop(&urb_priv->td[0], true);
4276
+
td_to_noop(xhci, xep, &urb_priv->td[0], true);
4253
4277
4254
4278
/* Reset the ring enqueue back to the first TRB and its cycle bit. */
4255
4279
ep_ring->enqueue = urb_priv->td[0].start_trb;
···
4303
4327
check_interval(urb, ep_ctx);
4304
4328
4305
4329
/* Calculate the start frame and put it in urb->start_frame. */
4306
-
if (HCC_CFC(xhci->hcc_params) && !list_empty(&ep_ring->td_list)) {
4330
+
if ((xhci->hcc_params & HCC_CFC) && !list_empty(&ep_ring->td_list)) {
4307
4331
if (GET_EP_CTX_STATE(ep_ctx) == EP_STATE_RUNNING) {
4308
4332
urb->start_frame = xep->next_frame_id;
4309
4333
goto skip_start_over;
···
4316
4340
* Round up to the next frame and consider the time before trb really
4317
4341
* gets scheduled by hardare.
4318
4342
*/
4319
-
ist = HCS_IST(xhci->hcs_params2) & 0x7;
4320
-
if (HCS_IST(xhci->hcs_params2) & (1 << 3))
4321
-
ist <<= 3;
4343
+
ist = xhci_ist_microframes(xhci);
4322
4344
start_frame += ist + XHCI_CFC_DELAY;
4323
4345
start_frame = roundup(start_frame, 8);
4324
4346
+6
-7
drivers/usb/host/xhci-tegra.c
+6
-7
drivers/usb/host/xhci-tegra.c
···
1399
1399
}
1400
1400
1401
1401
tegra_xhci_set_port_power(tegra, true, true);
1402
-
pm_runtime_mark_last_busy(tegra->dev);
1403
1402
1404
1403
} else {
1405
1404
if (tegra->otg_usb3_port >= 0)
···
2035
2036
u32 value;
2036
2037
2037
2038
for (i = 0; i < hub->num_ports; i++) {
2038
-
value = readl(hub->ports[i]->addr);
2039
+
value = xhci_portsc_readl(hub->ports[i]);
2039
2040
if ((value & PORT_PE) == 0)
2040
2041
continue;
2041
2042
···
2161
2162
if (!is_host_mode_phy(tegra, i, j))
2162
2163
continue;
2163
2164
2164
-
portsc = readl(rhub->ports[index]->addr);
2165
+
portsc = xhci_portsc_readl(rhub->ports[index]);
2165
2166
speed = tegra_xhci_portsc_to_speed(tegra, portsc);
2166
2167
tegra_xusb_padctl_enable_phy_sleepwalk(padctl, phy, speed);
2167
2168
tegra_xusb_padctl_enable_phy_wake(padctl, phy);
···
2256
2257
for (i = 0; i < xhci->usb2_rhub.num_ports; i++) {
2257
2258
if (!xhci->usb2_rhub.ports[i])
2258
2259
continue;
2259
-
portsc = readl(xhci->usb2_rhub.ports[i]->addr);
2260
+
portsc = xhci_portsc_readl(xhci->usb2_rhub.ports[i]);
2260
2261
tegra->lp0_utmi_pad_mask &= ~BIT(i);
2261
2262
if (((portsc & PORT_PLS_MASK) == XDEV_U3) || ((portsc & DEV_SPEED_MASK) == XDEV_FS))
2262
2263
tegra->lp0_utmi_pad_mask |= BIT(i);
···
2789
2790
while (i--) {
2790
2791
if (!test_bit(i, &bus_state->resuming_ports))
2791
2792
continue;
2792
-
portsc = readl(ports[i]->addr);
2793
+
portsc = xhci_portsc_readl(ports[i]);
2793
2794
if ((portsc & PORT_PLS_MASK) == XDEV_RESUME)
2794
2795
tegra_phy_xusb_utmi_pad_power_on(
2795
2796
tegra_xusb_get_phy(tegra, "usb2", (int) i));
···
2807
2808
if (!index || index > rhub->num_ports)
2808
2809
return -EPIPE;
2809
2810
ports = rhub->ports;
2810
-
portsc = readl(ports[port]->addr);
2811
+
portsc = xhci_portsc_readl(ports[port]);
2811
2812
if (portsc & PORT_CONNECT)
2812
2813
tegra_phy_xusb_utmi_pad_power_on(phy);
2813
2814
}
···
2826
2827
2827
2828
if ((type_req == ClearPortFeature) && (value == USB_PORT_FEAT_C_CONNECTION)) {
2828
2829
ports = rhub->ports;
2829
-
portsc = readl(ports[port]->addr);
2830
+
portsc = xhci_portsc_readl(ports[port]);
2830
2831
if (!(portsc & PORT_CONNECT)) {
2831
2832
/* We don't suspend the PAD while HNP role swap happens on the OTG
2832
2833
* port
+10
-15
drivers/usb/host/xhci-trace.h
+10
-15
drivers/usb/host/xhci-trace.h
···
71
71
);
72
72
73
73
DECLARE_EVENT_CLASS(xhci_log_ctx,
74
-
TP_PROTO(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx,
75
-
unsigned int ep_num),
76
-
TP_ARGS(xhci, ctx, ep_num),
74
+
TP_PROTO(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx),
75
+
TP_ARGS(xhci, ctx),
77
76
TP_STRUCT__entry(
78
77
__field(int, ctx_64)
79
78
__field(unsigned, ctx_type)
80
79
__field(dma_addr_t, ctx_dma)
81
80
__field(u8 *, ctx_va)
82
-
__field(unsigned, ctx_ep_num)
83
-
__dynamic_array(u32, ctx_data,
84
-
((HCC_64BYTE_CONTEXT(xhci->hcc_params) + 1) * 8) *
85
-
((ctx->type == XHCI_CTX_TYPE_INPUT) + ep_num + 1))
86
81
),
87
82
TP_fast_assign(
88
83
89
-
__entry->ctx_64 = HCC_64BYTE_CONTEXT(xhci->hcc_params);
84
+
__entry->ctx_64 = xhci->hcc_params & HCC_64BYTE_CONTEXT;
90
85
__entry->ctx_type = ctx->type;
91
86
__entry->ctx_dma = ctx->dma;
92
87
__entry->ctx_va = ctx->bytes;
93
-
__entry->ctx_ep_num = ep_num;
94
-
memcpy(__get_dynamic_array(ctx_data), ctx->bytes,
95
-
((HCC_64BYTE_CONTEXT(xhci->hcc_params) + 1) * 32) *
96
-
((ctx->type == XHCI_CTX_TYPE_INPUT) + ep_num + 1));
97
88
),
98
89
TP_printk("ctx_64=%d, ctx_type=%u, ctx_dma=@%llx, ctx_va=@%p",
99
90
__entry->ctx_64, __entry->ctx_type,
···
93
102
);
94
103
95
104
DEFINE_EVENT(xhci_log_ctx, xhci_address_ctx,
96
-
TP_PROTO(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx,
97
-
unsigned int ep_num),
98
-
TP_ARGS(xhci, ctx, ep_num)
105
+
TP_PROTO(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx),
106
+
TP_ARGS(xhci, ctx)
99
107
);
100
108
101
109
DECLARE_EVENT_CLASS(xhci_log_trb,
···
561
571
);
562
572
563
573
DEFINE_EVENT(xhci_log_portsc, xhci_hub_status_data,
574
+
TP_PROTO(struct xhci_port *port, u32 portsc),
575
+
TP_ARGS(port, portsc)
576
+
);
577
+
578
+
DEFINE_EVENT(xhci_log_portsc, xhci_portsc_writel,
564
579
TP_PROTO(struct xhci_port *port, u32 portsc),
565
580
TP_ARGS(port, portsc)
566
581
);
+49
-43
drivers/usb/host/xhci.c
+49
-43
drivers/usb/host/xhci.c
···
41
41
module_param(quirks, ullong, S_IRUGO);
42
42
MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
43
43
44
+
void xhci_portsc_writel(struct xhci_port *port, u32 val)
45
+
{
46
+
trace_xhci_portsc_writel(port, val);
47
+
writel(val, &port->port_reg->portsc);
48
+
}
49
+
EXPORT_SYMBOL_GPL(xhci_portsc_writel);
50
+
51
+
u32 xhci_portsc_readl(struct xhci_port *port)
52
+
{
53
+
return readl(&port->port_reg->portsc);
54
+
}
55
+
EXPORT_SYMBOL_GPL(xhci_portsc_readl);
56
+
44
57
static bool td_on_ring(struct xhci_td *td, struct xhci_ring *ring)
45
58
{
46
59
struct xhci_segment *seg;
···
250
237
struct iommu_domain *domain;
251
238
int err, i;
252
239
u64 val;
253
-
u32 intrs;
254
240
255
241
/*
256
242
* Some Renesas controllers get into a weird state if they are
···
290
278
if (upper_32_bits(val))
291
279
xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring);
292
280
293
-
intrs = min_t(u32, HCS_MAX_INTRS(xhci->hcs_params1),
294
-
ARRAY_SIZE(xhci->run_regs->ir_set));
295
-
296
-
for (i = 0; i < intrs; i++) {
281
+
for (i = 0; i < xhci->max_interrupters; i++) {
297
282
struct xhci_intr_reg __iomem *ir;
298
283
299
284
ir = &xhci->run_regs->ir_set[i];
···
382
373
return;
383
374
384
375
for (i = 0; i < rhub->num_ports; i++) {
385
-
temp = readl(rhub->ports[i]->addr);
376
+
temp = xhci_portsc_readl(rhub->ports[i]);
386
377
if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
387
378
/*
388
379
* Compliance Mode Detected. Letting USB Core
···
480
471
static void xhci_enable_max_dev_slots(struct xhci_hcd *xhci)
481
472
{
482
473
u32 config_reg;
483
-
u32 max_slots;
484
474
485
-
max_slots = HCS_MAX_SLOTS(xhci->hcs_params1);
486
475
xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xHC can handle at most %d device slots",
487
-
max_slots);
476
+
xhci->max_slots);
488
477
489
478
config_reg = readl(&xhci->op_regs->config_reg);
490
479
config_reg &= ~HCS_SLOTS_MASK;
491
-
config_reg |= max_slots;
480
+
config_reg |= xhci->max_slots;
492
481
493
482
xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Setting Max device slots reg = 0x%x",
494
483
config_reg);
···
903
896
spin_lock_irqsave(&xhci->lock, flags);
904
897
905
898
for (i = 0; i < rhub->num_ports; i++) {
906
-
portsc = readl(rhub->ports[i]->addr);
899
+
portsc = xhci_portsc_readl(rhub->ports[i]);
907
900
t1 = xhci_port_state_to_neutral(portsc);
908
901
t2 = t1;
909
902
···
916
909
t2 |= PORT_CSC;
917
910
918
911
if (t1 != t2) {
919
-
writel(t2, rhub->ports[i]->addr);
912
+
xhci_portsc_writel(rhub->ports[i], t2);
920
913
xhci_dbg(xhci, "config port %d-%d wake bits, portsc: 0x%x, write: 0x%x\n",
921
914
rhub->hcd->self.busnum, i + 1, portsc, t2);
922
915
}
···
943
936
port_index = xhci->usb2_rhub.num_ports;
944
937
ports = xhci->usb2_rhub.ports;
945
938
while (port_index--) {
946
-
portsc = readl(ports[port_index]->addr);
939
+
portsc = xhci_portsc_readl(ports[port_index]);
947
940
if (portsc & PORT_CHANGE_MASK ||
948
941
(portsc & PORT_PLS_MASK) == XDEV_RESUME)
949
942
return true;
···
951
944
port_index = xhci->usb3_rhub.num_ports;
952
945
ports = xhci->usb3_rhub.ports;
953
946
while (port_index--) {
954
-
portsc = readl(ports[port_index]->addr);
947
+
portsc = xhci_portsc_readl(ports[port_index]);
955
948
if (portsc & (PORT_CHANGE_MASK | PORT_CAS) ||
956
949
(portsc & PORT_PLS_MASK) == XDEV_RESUME)
957
950
return true;
···
4230
4223
xhci_err(xhci, "Error while assigning device slot ID: %s\n",
4231
4224
xhci_trb_comp_code_string(command->status));
4232
4225
xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
4233
-
HCS_MAX_SLOTS(
4234
-
readl(&xhci->cap_regs->hcs_params1)));
4226
+
xhci->max_slots);
4235
4227
xhci_free_command(xhci, command);
4236
4228
return 0;
4237
4229
}
···
4373
4367
ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
4374
4368
ctrl_ctx->drop_flags = 0;
4375
4369
4376
-
trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
4377
-
le32_to_cpu(slot_ctx->dev_info) >> 27);
4370
+
trace_xhci_address_ctx(xhci, virt_dev->in_ctx);
4378
4371
4379
4372
trace_xhci_address_ctrl_ctx(ctrl_ctx);
4380
4373
spin_lock_irqsave(&xhci->lock, flags);
···
4433
4428
xhci_err(xhci,
4434
4429
"ERROR: unexpected setup %s command completion code 0x%x.\n",
4435
4430
act, command->status);
4436
-
trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
4431
+
trace_xhci_address_ctx(xhci, virt_dev->out_ctx);
4437
4432
ret = -EINVAL;
4438
4433
break;
4439
4434
}
···
4451
4446
xhci_dbg_trace(xhci, trace_xhci_dbg_address,
4452
4447
"Output Context DMA address = %#08llx",
4453
4448
(unsigned long long)virt_dev->out_ctx->dma);
4454
-
trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
4455
-
le32_to_cpu(slot_ctx->dev_info) >> 27);
4449
+
trace_xhci_address_ctx(xhci, virt_dev->in_ctx);
4456
4450
/*
4457
4451
* USB core uses address 1 for the roothubs, so we add one to the
4458
4452
* address given back to us by the HC.
4459
4453
*/
4460
-
trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
4461
-
le32_to_cpu(slot_ctx->dev_info) >> 27);
4454
+
trace_xhci_address_ctx(xhci, virt_dev->out_ctx);
4462
4455
/* Zero the input context control for later use */
4463
4456
ctrl_ctx->add_flags = 0;
4464
4457
ctrl_ctx->drop_flags = 0;
···
4640
4637
{
4641
4638
struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4642
4639
struct xhci_port **ports;
4643
-
__le32 __iomem *pm_addr, *hlpm_addr;
4640
+
struct xhci_port_regs __iomem *port_reg;
4644
4641
u32 pm_val, hlpm_val, field;
4645
4642
unsigned int port_num;
4646
4643
unsigned long flags;
···
4665
4662
4666
4663
ports = xhci->usb2_rhub.ports;
4667
4664
port_num = udev->portnum - 1;
4668
-
pm_addr = ports[port_num]->addr + PORTPMSC;
4669
-
pm_val = readl(pm_addr);
4670
-
hlpm_addr = ports[port_num]->addr + PORTHLPMC;
4665
+
port_reg = ports[port_num]->port_reg;
4666
+
pm_val = readl(&port_reg->portpmsc);
4671
4667
4672
4668
xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4673
4669
str_enable_disable(enable), port_num + 1);
···
4695
4693
spin_lock_irqsave(&xhci->lock, flags);
4696
4694
4697
4695
hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4698
-
writel(hlpm_val, hlpm_addr);
4696
+
writel(hlpm_val, &port_reg->porthlmpc);
4699
4697
/* flush write */
4700
-
readl(hlpm_addr);
4698
+
readl(&port_reg->porthlmpc);
4701
4699
} else {
4702
4700
hird = xhci_calculate_hird_besl(xhci, udev);
4703
4701
}
4704
4702
4705
4703
pm_val &= ~PORT_HIRD_MASK;
4706
4704
pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4707
-
writel(pm_val, pm_addr);
4708
-
pm_val = readl(pm_addr);
4705
+
writel(pm_val, &port_reg->portpmsc);
4706
+
pm_val = readl(&port_reg->portpmsc);
4709
4707
pm_val |= PORT_HLE;
4710
-
writel(pm_val, pm_addr);
4708
+
writel(pm_val, &port_reg->portpmsc);
4711
4709
/* flush write */
4712
-
readl(pm_addr);
4710
+
readl(&port_reg->portpmsc);
4713
4711
} else {
4714
4712
pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4715
-
writel(pm_val, pm_addr);
4713
+
writel(pm_val, &port_reg->portpmsc);
4716
4714
/* flush write */
4717
-
readl(pm_addr);
4715
+
readl(&port_reg->portpmsc);
4718
4716
if (udev->usb2_hw_lpm_besl_capable) {
4719
4717
spin_unlock_irqrestore(&xhci->lock, flags);
4720
4718
xhci_change_max_exit_latency(xhci, udev, 0);
4721
-
readl_poll_timeout(ports[port_num]->addr, pm_val,
4719
+
readl_poll_timeout(&ports[port_num]->port_reg->portsc, pm_val,
4722
4720
(pm_val & PORT_PLS_MASK) == XDEV_U0,
4723
4721
100, 10000);
4724
4722
return 0;
···
5411
5409
*/
5412
5410
struct device *dev = hcd->self.sysdev;
5413
5411
int retval;
5412
+
u32 hcs_params1;
5414
5413
5415
5414
/* Accept arbitrarily long scatter-gather lists */
5416
5415
hcd->self.sg_tablesize = ~0;
···
5437
5434
xhci->run_regs = hcd->regs +
5438
5435
(readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
5439
5436
/* Cache read-only capability registers */
5440
-
xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
5437
+
hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
5441
5438
xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
5442
5439
xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
5443
5440
xhci->hci_version = HC_VERSION(readl(&xhci->cap_regs->hc_capbase));
···
5445
5442
if (xhci->hci_version > 0x100)
5446
5443
xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);
5447
5444
5445
+
xhci->max_slots = HCS_MAX_SLOTS(hcs_params1);
5446
+
xhci->max_ports = min(HCS_MAX_PORTS(hcs_params1), MAX_HC_PORTS);
5448
5447
/* xhci-plat or xhci-pci might have set max_interrupters already */
5449
-
if ((!xhci->max_interrupters) ||
5450
-
xhci->max_interrupters > HCS_MAX_INTRS(xhci->hcs_params1))
5451
-
xhci->max_interrupters = HCS_MAX_INTRS(xhci->hcs_params1);
5448
+
if (!xhci->max_interrupters)
5449
+
xhci->max_interrupters = min(HCS_MAX_INTRS(hcs_params1), MAX_HC_INTRS);
5450
+
else if (xhci->max_interrupters > HCS_MAX_INTRS(hcs_params1))
5451
+
xhci->max_interrupters = HCS_MAX_INTRS(hcs_params1);
5452
5452
5453
5453
xhci->quirks |= quirks;
5454
5454
···
5496
5490
5497
5491
/* Set dma_mask and coherent_dma_mask to 64-bits,
5498
5492
* if xHC supports 64-bit addressing */
5499
-
if (HCC_64BIT_ADDR(xhci->hcc_params) &&
5493
+
if ((xhci->hcc_params & HCC_64BIT_ADDR) &&
5500
5494
!dma_set_mask(dev, DMA_BIT_MASK(64))) {
5501
5495
xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
5502
5496
dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
···
5670
5664
BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
5671
5665
BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 8*32/8);
5672
5666
BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
5673
-
/* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
5674
-
BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
5667
+
/* xhci_run_regs has eight fields and embeds 1024 xhci_intr_regs */
5668
+
BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*1024)*32/8);
5675
5669
5676
5670
if (usb_disabled())
5677
5671
return -ENODEV;
+66
-52
drivers/usb/host/xhci.h
+66
-52
drivers/usb/host/xhci.h
···
34
34
35
35
/* Max number of USB devices for any host controller - limit in section 6.1 */
36
36
#define MAX_HC_SLOTS 256
37
-
/* Section 5.3.3 - MaxPorts */
37
+
/*
38
+
* Max Number of Ports. xHCI specification section 5.3.3
39
+
* Valid values are in the range of 1 to 255.
40
+
*/
38
41
#define MAX_HC_PORTS 127
42
+
/*
43
+
* Max number of Interrupter Register Sets. xHCI specification section 5.3.3
44
+
* Valid values are in the range of 1 to 1024.
45
+
*/
46
+
#define MAX_HC_INTRS 128
39
47
40
48
/*
41
49
* xHCI register interface.
···
74
66
/* Reserved up to (CAPLENGTH - 0x1C) */
75
67
};
76
68
77
-
/* Number of registers per port */
78
-
#define NUM_PORT_REGS 4
79
-
80
-
#define PORTSC 0
81
-
#define PORTPMSC 1
82
-
#define PORTLI 2
83
-
#define PORTHLPMC 3
69
+
/*
70
+
* struct xhci_port_regs - Host Controller USB Port Register Set. xHCI spec 5.4.8
71
+
* @portsc: Port Status and Control
72
+
* @portpmsc: Port Power Management Status and Control
73
+
* @portli: Port Link Info
74
+
* @porthlmpc: Port Hardware LPM Control
75
+
*/
76
+
struct xhci_port_regs {
77
+
__le32 portsc;
78
+
__le32 portpmsc;
79
+
__le32 portli;
80
+
__le32 porthlmpc;
81
+
};
84
82
85
83
/**
86
84
* struct xhci_op_regs - xHCI Host Controller Operational Registers.
···
99
85
* @cmd_ring: CRP - 64-bit Command Ring Pointer
100
86
* @dcbaa_ptr: DCBAAP - 64-bit Device Context Base Address Array Pointer
101
87
* @config_reg: CONFIG - Configure Register
102
-
* @port_status_base: PORTSCn - base address for Port Status and Control
103
-
* Each port has a Port Status and Control register,
104
-
* followed by a Port Power Management Status and Control
105
-
* register, a Port Link Info register, and a reserved
106
-
* register.
107
-
* @port_power_base: PORTPMSCn - base address for
108
-
* Port Power Management Status and Control
109
-
* @port_link_base: PORTLIn - base address for Port Link Info (current
110
-
* Link PM state and control) for USB 2.1 and USB 3.0
111
-
* devices.
88
+
* @port_regs: Port Register Sets, from 1 to MaxPorts (defined by HCSPARAMS1).
112
89
*/
113
90
struct xhci_op_regs {
114
91
__le32 command;
···
115
110
__le32 config_reg;
116
111
/* rsvd: offset 0x3C-3FF */
117
112
__le32 reserved4[241];
118
-
/* port 1 registers, which serve as a base address for other ports */
119
-
__le32 port_status_base;
120
-
__le32 port_power_base;
121
-
__le32 port_link_base;
122
-
__le32 reserved5;
123
-
/* registers for ports 2-255 */
124
-
__le32 reserved6[NUM_PORT_REGS*254];
113
+
struct xhci_port_regs port_regs[];
125
114
};
126
115
127
116
/* USBCMD - USB command - command bitmasks */
···
283
284
struct xhci_run_regs {
284
285
__le32 microframe_index;
285
286
__le32 rsvd[7];
286
-
struct xhci_intr_reg ir_set[128];
287
+
struct xhci_intr_reg ir_set[1024];
287
288
};
288
289
289
290
/**
···
799
800
/* private xHCD pointers */
800
801
dma_addr_t dma;
801
802
};
802
-
/* TODO: write function to set the 64-bit device DMA address */
803
803
/*
804
804
* TODO: change this to be dynamically sized at HC mem init time since the HC
805
805
* might not be able to handle the maximum number of devices possible.
···
1472
1474
};
1473
1475
1474
1476
struct xhci_port {
1475
-
__le32 __iomem *addr;
1477
+
struct xhci_port_regs __iomem *port_reg;
1476
1478
int hw_portnum;
1477
1479
int hcd_portnum;
1478
1480
struct xhci_hub *rhub;
···
1508
1510
struct xhci_doorbell_array __iomem *dba;
1509
1511
1510
1512
/* Cached register copies of read-only HC data */
1511
-
__u32 hcs_params1;
1512
1513
__u32 hcs_params2;
1513
1514
__u32 hcs_params3;
1514
1515
__u32 hcc_params;
···
1518
1521
/* packed release number */
1519
1522
u16 hci_version;
1520
1523
u16 max_interrupters;
1524
+
u8 max_slots;
1525
+
u8 max_ports;
1521
1526
/* imod_interval in ns (I * 250ns) */
1522
1527
u32 imod_interval;
1523
1528
u32 page_size;
···
1960
1961
void xhci_add_interrupter(struct xhci_hcd *xhci, unsigned int intr_num);
1961
1962
int xhci_usb_endpoint_maxp(struct usb_device *udev,
1962
1963
struct usb_host_endpoint *host_ep);
1964
+
void xhci_portsc_writel(struct xhci_port *port, u32 val);
1965
+
u32 xhci_portsc_readl(struct xhci_port *port);
1963
1966
1964
1967
/* xHCI roothub code */
1965
1968
void xhci_set_link_state(struct xhci_hcd *xhci, struct xhci_port *port,
···
2400
2399
if (portsc == ~(u32)0)
2401
2400
return str;
2402
2401
2403
-
ret += sprintf(str + ret, "%s %s %s Link:%s PortSpeed:%d ",
2404
-
portsc & PORT_POWER ? "Powered" : "Powered-off",
2405
-
portsc & PORT_CONNECT ? "Connected" : "Not-connected",
2406
-
portsc & PORT_PE ? "Enabled" : "Disabled",
2407
-
xhci_portsc_link_state_string(portsc),
2408
-
DEV_PORT_SPEED(portsc));
2402
+
ret += sprintf(str + ret, "Speed=%d ", DEV_PORT_SPEED(portsc));
2403
+
ret += sprintf(str + ret, "Link=%s ", xhci_portsc_link_state_string(portsc));
2409
2404
2405
+
/* RO/ROS: Read-only */
2406
+
if (portsc & PORT_CONNECT)
2407
+
ret += sprintf(str + ret, "CCS ");
2410
2408
if (portsc & PORT_OC)
2411
-
ret += sprintf(str + ret, "OverCurrent ");
2412
-
if (portsc & PORT_RESET)
2413
-
ret += sprintf(str + ret, "In-Reset ");
2409
+
ret += sprintf(str + ret, "OCA "); /* No set for USB2 ports */
2410
+
if (portsc & PORT_CAS)
2411
+
ret += sprintf(str + ret, "CAS ");
2412
+
if (portsc & PORT_DEV_REMOVE)
2413
+
ret += sprintf(str + ret, "DR ");
2414
2414
2415
-
ret += sprintf(str + ret, "Change: ");
2415
+
/* RWS; writing 1 sets the bit, writing 0 clears the bit. */
2416
+
if (portsc & PORT_POWER)
2417
+
ret += sprintf(str + ret, "PP ");
2418
+
if (portsc & PORT_WKCONN_E)
2419
+
ret += sprintf(str + ret, "WCE ");
2420
+
if (portsc & PORT_WKDISC_E)
2421
+
ret += sprintf(str + ret, "WDE ");
2422
+
if (portsc & PORT_WKOC_E)
2423
+
ret += sprintf(str + ret, "WOE ");
2424
+
2425
+
/* RW; writing 1 sets the bit, writing 0 clears the bit */
2426
+
if (portsc & PORT_LINK_STROBE)
2427
+
ret += sprintf(str + ret, "LWS "); /* LWS 0 write is ignored */
2428
+
2429
+
/* RW1S; writing 1 sets the bit, writing 0 has no effect */
2430
+
if (portsc & PORT_RESET)
2431
+
ret += sprintf(str + ret, "PR ");
2432
+
if (portsc & PORT_WR)
2433
+
ret += sprintf(str + ret, "WPR "); /* RsvdZ for USB2 ports */
2434
+
2435
+
/* RW1CS; writing 1 clears the bit, writing 0 has no effect. */
2436
+
if (portsc & PORT_PE)
2437
+
ret += sprintf(str + ret, "PED ");
2416
2438
if (portsc & PORT_CSC)
2417
2439
ret += sprintf(str + ret, "CSC ");
2418
2440
if (portsc & PORT_PEC)
2419
-
ret += sprintf(str + ret, "PEC ");
2441
+
ret += sprintf(str + ret, "PEC "); /* No set for USB3 ports */
2420
2442
if (portsc & PORT_WRC)
2421
-
ret += sprintf(str + ret, "WRC ");
2443
+
ret += sprintf(str + ret, "WRC "); /* RsvdZ for USB2 ports */
2422
2444
if (portsc & PORT_OCC)
2423
2445
ret += sprintf(str + ret, "OCC ");
2424
2446
if (portsc & PORT_RC)
···
2449
2425
if (portsc & PORT_PLC)
2450
2426
ret += sprintf(str + ret, "PLC ");
2451
2427
if (portsc & PORT_CEC)
2452
-
ret += sprintf(str + ret, "CEC ");
2453
-
if (portsc & PORT_CAS)
2454
-
ret += sprintf(str + ret, "CAS ");
2455
-
2456
-
ret += sprintf(str + ret, "Wake: ");
2457
-
if (portsc & PORT_WKCONN_E)
2458
-
ret += sprintf(str + ret, "WCE ");
2459
-
if (portsc & PORT_WKDISC_E)
2460
-
ret += sprintf(str + ret, "WDE ");
2461
-
if (portsc & PORT_WKOC_E)
2462
-
ret += sprintf(str + ret, "WOE ");
2428
+
ret += sprintf(str + ret, "CEC "); /* RsvdZ for USB2 ports */
2463
2429
2464
2430
return str;
2465
2431
}
-1
drivers/usb/misc/apple-mfi-fastcharge.c
-1
drivers/usb/misc/apple-mfi-fastcharge.c
+13
-3
drivers/usb/misc/chaoskey.c
+13
-3
drivers/usb/misc/chaoskey.c
···
444
444
goto bail;
445
445
mutex_unlock(&dev->rng_lock);
446
446
447
-
result = mutex_lock_interruptible(&dev->lock);
448
-
if (result)
449
-
goto bail;
447
+
if (file->f_flags & O_NONBLOCK) {
448
+
result = mutex_trylock(&dev->lock);
449
+
if (result == 0) {
450
+
result = -EAGAIN;
451
+
goto bail;
452
+
} else {
453
+
result = 0;
454
+
}
455
+
} else {
456
+
result = mutex_lock_interruptible(&dev->lock);
457
+
if (result)
458
+
goto bail;
459
+
}
450
460
if (dev->valid == dev->used) {
451
461
result = _chaoskey_fill(dev);
452
462
if (result < 0) {
+25
-14
drivers/usb/misc/usb-ljca.c
+25
-14
drivers/usb/misc/usb-ljca.c
···
164
164
struct acpi_device *adev;
165
165
};
166
166
167
+
/*
168
+
* ACPI hardware IDs for LJCA client devices.
169
+
*
170
+
* [1] Some BIOS implementations use these IDs for denoting LJCA client devices
171
+
* even though the IDs have been allocated for USBIO. This isn't a problem
172
+
* as the usb-ljca driver is probed based on the USB device's vendor and
173
+
* product IDs and its client drivers are probed based on auxiliary device
174
+
* names, not these ACPI _HIDs. List of such systems:
175
+
*
176
+
* Dell Precision 5490
177
+
*/
167
178
static const struct acpi_device_id ljca_gpio_hids[] = {
168
-
{ "INTC1074" },
169
-
{ "INTC1096" },
170
-
{ "INTC100B" },
171
-
{ "INTC10D1" },
172
-
{ "INTC10B5" },
179
+
{ "INTC100B" }, /* RPL LJCA GPIO */
180
+
{ "INTC1074" }, /* CVF LJCA GPIO */
181
+
{ "INTC1096" }, /* ADL LJCA GPIO */
182
+
{ "INTC10B5" }, /* LNL LJCA GPIO */
183
+
{ "INTC10D1" }, /* MTL (CVF VSC) USBIO GPIO [1] */
173
184
{},
174
185
};
175
186
176
187
static const struct acpi_device_id ljca_i2c_hids[] = {
177
-
{ "INTC1075" },
178
-
{ "INTC1097" },
179
-
{ "INTC100C" },
180
-
{ "INTC10D2" },
188
+
{ "INTC100C" }, /* RPL LJCA I2C */
189
+
{ "INTC1075" }, /* CVF LJCA I2C */
190
+
{ "INTC1097" }, /* ADL LJCA I2C */
191
+
{ "INTC10D2" }, /* MTL (CVF VSC) USBIO I2C [1] */
181
192
{},
182
193
};
183
194
184
195
static const struct acpi_device_id ljca_spi_hids[] = {
185
-
{ "INTC1091" },
186
-
{ "INTC1098" },
187
-
{ "INTC100D" },
188
-
{ "INTC10D3" },
196
+
{ "INTC100D" }, /* RPL LJCA SPI */
197
+
{ "INTC1091" }, /* TGL/ADL LJCA SPI */
198
+
{ "INTC1098" }, /* ADL LJCA SPI */
199
+
{ "INTC10D3" }, /* MTL (CVF VSC) USBIO SPI [1] */
189
200
{},
190
201
};
191
202
···
902
891
};
903
892
module_usb_driver(ljca_driver);
904
893
905
-
MODULE_AUTHOR("Wentong Wu <wentong.wu@intel.com>");
894
+
MODULE_AUTHOR("Wentong Wu");
906
895
MODULE_AUTHOR("Zhifeng Wang <zhifeng.wang@intel.com>");
907
896
MODULE_AUTHOR("Lixu Zhang <lixu.zhang@intel.com>");
908
897
MODULE_DESCRIPTION("Intel La Jolla Cove Adapter USB driver");
+21
-13
drivers/usb/mtu3/mtu3.h
+21
-13
drivers/usb/mtu3/mtu3.h
···
65
65
#define MTU3_U3_IP_SLOT_DEFAULT 2
66
66
#define MTU3_U2_IP_SLOT_DEFAULT 1
67
67
68
-
/**
68
+
/*
69
69
* IP TRUNK version
70
70
* from 0x1003 version, USB3 Gen2 is supported, two changes affect driver:
71
71
* 1. MAXPKT and MULTI bits layout of TXCSR1 and RXCSR1 are adjusted,
···
74
74
*/
75
75
#define MTU3_TRUNK_VERS_1003 0x1003
76
76
77
-
/**
77
+
/*
78
78
* Normally the device works on HS or SS, to simplify fifo management,
79
-
* devide fifo into some 512B parts, use bitmap to manage it; And
79
+
* divide fifo into some 512B parts, use bitmap to manage it; And
80
80
* 128 bits size of bitmap is large enough, that means it can manage
81
81
* up to 64KB fifo size.
82
82
* NOTE: MTU3_EP_FIFO_UNIT should be power of two
···
85
85
#define MTU3_FIFO_BIT_SIZE 128
86
86
#define MTU3_U2_IP_EP0_FIFO_SIZE 64
87
87
88
-
/**
88
+
/*
89
89
* Maximum size of ep0 response buffer for ch9 requests,
90
90
* the SET_SEL request uses 6 so far, and GET_STATUS is 2
91
91
*/
···
103
103
};
104
104
105
105
/**
106
+
* enum mtu3_g_ep0_state - endpoint 0 states
106
107
* @MU3D_EP0_STATE_SETUP: waits for SETUP or received a SETUP
107
108
* without data stage.
108
109
* @MU3D_EP0_STATE_TX: IN data stage
···
122
121
};
123
122
124
123
/**
125
-
* MTU3_DR_FORCE_NONE: automatically switch host and periperal mode
124
+
* enum mtu3_dr_force_mode - indicates host/OTG operating mode
125
+
* @MTU3_DR_FORCE_NONE: automatically switch host and peripheral mode
126
126
* by IDPIN signal.
127
-
* MTU3_DR_FORCE_HOST: force to enter host mode and override OTG
127
+
* @MTU3_DR_FORCE_HOST: force to enter host mode and override OTG
128
128
* IDPIN signal.
129
-
* MTU3_DR_FORCE_DEVICE: force to enter peripheral mode.
129
+
* @MTU3_DR_FORCE_DEVICE: force to enter peripheral mode.
130
130
*/
131
131
enum mtu3_dr_force_mode {
132
132
MTU3_DR_FORCE_NONE = 0,
···
136
134
};
137
135
138
136
/**
137
+
* struct mtu3_fifo_info - HW FIFO description and management data
139
138
* @base: the base address of fifo
140
139
* @limit: the bitmap size in bits
141
140
* @bitmap: fifo bitmap in unit of @MTU3_EP_FIFO_UNIT
···
148
145
};
149
146
150
147
/**
151
-
* General Purpose Descriptor (GPD):
148
+
* struct qmu_gpd - General Purpose Descriptor (GPD):
152
149
* The format of TX GPD is a little different from RX one.
153
150
* And the size of GPD is 16 bytes.
154
151
*
···
182
179
} __packed;
183
180
184
181
/**
185
-
* dma: physical base address of GPD segment
186
-
* start: virtual base address of GPD segment
187
-
* end: the last GPD element
188
-
* enqueue: the first empty GPD to use
189
-
* dequeue: the first completed GPD serviced by ISR
182
+
* struct mtu3_gpd_ring - GPD ring descriptor
183
+
* @dma: physical base address of GPD segment
184
+
* @start: virtual base address of GPD segment
185
+
* @end: the last GPD element
186
+
* @enqueue: the first empty GPD to use
187
+
* @dequeue: the first completed GPD serviced by ISR
188
+
*
190
189
* NOTE: the size of GPD ring should be >= 2
191
190
*/
192
191
struct mtu3_gpd_ring {
···
200
195
};
201
196
202
197
/**
198
+
* struct otg_switch_mtk - OTG/dual-role switch management
203
199
* @vbus: vbus 5V used by host mode
204
200
* @edev: external connector used to detect vbus and iddig changes
205
201
* @id_nb : notifier for iddig(idpin) detection
···
228
222
};
229
223
230
224
/**
225
+
* struct ssusb_mtk - SuperSpeed USB descriptor (MTK)
231
226
* @mac_base: register base address of device MAC, exclude xHCI's
232
227
* @ippc_base: register base address of IP Power and Clock interface (IPPC)
233
228
* @vusb33: usb3.3V shared by device/host IP
···
275
268
};
276
269
277
270
/**
271
+
* struct mtu3_ep - common mtu3 endpoint description
278
272
* @fifo_size: it is (@slot + 1) * @fifo_seg_size
279
273
* @fifo_seg_size: it is roundup_pow_of_two(@maxp)
280
274
*/
+1
-1
drivers/usb/mtu3/mtu3_core.c
+1
-1
drivers/usb/mtu3/mtu3_core.c
···
290
290
291
291
/* delay about 0.1us from detecting reset to send chirp-K */
292
292
mtu3_clrbits(mbase, U3D_LINK_RESET_INFO, WTCHRP_MSK);
293
-
/* enable automatical HWRW from L1 */
293
+
/* enable automatic HWRW from L1 */
294
294
mtu3_setbits(mbase, U3D_POWER_MANAGEMENT, LPM_HRWE);
295
295
}
296
296
-1
drivers/usb/mtu3/mtu3_plat.c
-1
drivers/usb/mtu3/mtu3_plat.c
+1
-1
drivers/usb/mtu3/mtu3_qmu.c
+1
-1
drivers/usb/mtu3/mtu3_qmu.c
-5
drivers/usb/musb/musb_core.c
-5
drivers/usb/musb/musb_core.c
···
2031
2031
if (!musb->session)
2032
2032
break;
2033
2033
trace_musb_state(musb, devctl, "Allow PM on possible host mode disconnect");
2034
-
pm_runtime_mark_last_busy(musb->controller);
2035
2034
pm_runtime_put_autosuspend(musb->controller);
2036
2035
musb->session = false;
2037
2036
return;
···
2062
2063
msecs_to_jiffies(3000));
2063
2064
} else {
2064
2065
trace_musb_state(musb, devctl, "Allow PM with no session");
2065
-
pm_runtime_mark_last_busy(musb->controller);
2066
2066
pm_runtime_put_autosuspend(musb->controller);
2067
2067
}
2068
2068
···
2088
2090
sysfs_notify(&musb->controller->kobj, NULL, "mode");
2089
2091
}
2090
2092
2091
-
pm_runtime_mark_last_busy(musb->controller);
2092
2093
pm_runtime_put_autosuspend(musb->controller);
2093
2094
}
2094
2095
···
2561
2564
musb_init_debugfs(musb);
2562
2565
2563
2566
musb->is_initialized = 1;
2564
-
pm_runtime_mark_last_busy(musb->controller);
2565
2567
pm_runtime_put_autosuspend(musb->controller);
2566
2568
2567
2569
return 0;
···
2883
2887
error);
2884
2888
spin_unlock_irqrestore(&musb->lock, flags);
2885
2889
2886
-
pm_runtime_mark_last_busy(dev);
2887
2890
pm_runtime_put_autosuspend(dev);
2888
2891
2889
2892
return 0;
-5
drivers/usb/musb/musb_debugfs.c
-5
drivers/usb/musb/musb_debugfs.c
···
106
106
}
107
107
}
108
108
109
-
pm_runtime_mark_last_busy(musb->controller);
110
109
pm_runtime_put_autosuspend(musb->controller);
111
110
return 0;
112
111
}
···
118
119
119
120
pm_runtime_get_sync(musb->controller);
120
121
test = musb_readb(musb->mregs, MUSB_TESTMODE);
121
-
pm_runtime_mark_last_busy(musb->controller);
122
122
pm_runtime_put_autosuspend(musb->controller);
123
123
124
124
if (test == (MUSB_TEST_FORCE_HOST | MUSB_TEST_FORCE_FS))
···
214
216
musb_writeb(musb->mregs, MUSB_TESTMODE, test);
215
217
216
218
ret:
217
-
pm_runtime_mark_last_busy(musb->controller);
218
219
pm_runtime_put_autosuspend(musb->controller);
219
220
return count;
220
221
}
···
240
243
reg = musb_readb(musb->mregs, MUSB_DEVCTL);
241
244
connect = reg & MUSB_DEVCTL_SESSION ? 1 : 0;
242
245
243
-
pm_runtime_mark_last_busy(musb->controller);
244
246
pm_runtime_put_autosuspend(musb->controller);
245
247
break;
246
248
default:
···
300
304
}
301
305
}
302
306
303
-
pm_runtime_mark_last_busy(musb->controller);
304
307
pm_runtime_put_autosuspend(musb->controller);
305
308
return count;
306
309
}
-1
drivers/usb/musb/musb_dsps.c
-1
drivers/usb/musb/musb_dsps.c
-4
drivers/usb/musb/musb_gadget.c
-4
drivers/usb/musb/musb_gadget.c
···
1258
1258
1259
1259
unlock:
1260
1260
spin_unlock_irqrestore(&musb->lock, lockflags);
1261
-
pm_runtime_mark_last_busy(musb->controller);
1262
1261
pm_runtime_put_autosuspend(musb->controller);
1263
1262
1264
1263
return status;
···
1641
1642
spin_lock_irqsave(&musb->lock, flags);
1642
1643
musb_pullup(musb, musb->softconnect);
1643
1644
spin_unlock_irqrestore(&musb->lock, flags);
1644
-
pm_runtime_mark_last_busy(musb->controller);
1645
1645
pm_runtime_put_autosuspend(musb->controller);
1646
1646
}
1647
1647
···
1860
1862
if (musb->xceiv && musb->xceiv->last_event == USB_EVENT_ID)
1861
1863
musb_platform_set_vbus(musb, 1);
1862
1864
1863
-
pm_runtime_mark_last_busy(musb->controller);
1864
1865
pm_runtime_put_autosuspend(musb->controller);
1865
1866
1866
1867
return 0;
···
1913
1916
usb_gadget_set_state(g, USB_STATE_NOTATTACHED);
1914
1917
1915
1918
/* Force check of devctl register for PM runtime */
1916
-
pm_runtime_mark_last_busy(musb->controller);
1917
1919
pm_runtime_put_autosuspend(musb->controller);
1918
1920
1919
1921
return 0;
-1
drivers/usb/musb/omap2430.c
-1
drivers/usb/musb/omap2430.c
+4
drivers/usb/phy/phy.c
+4
drivers/usb/phy/phy.c
···
646
646
return -EINVAL;
647
647
}
648
648
649
+
INIT_LIST_HEAD(&x->head);
650
+
649
651
usb_charger_init(x);
650
652
ret = usb_add_extcon(x);
651
653
if (ret)
···
697
695
dev_err(x->dev, "no device provided for PHY\n");
698
696
return -EINVAL;
699
697
}
698
+
699
+
INIT_LIST_HEAD(&x->head);
700
700
701
701
usb_charger_init(x);
702
702
ret = usb_add_extcon(x);
+34
-17
drivers/usb/renesas_usbhs/common.c
+34
-17
drivers/usb/renesas_usbhs/common.c
···
827
827
pm_runtime_disable(&pdev->dev);
828
828
}
829
829
830
-
static int usbhsc_suspend(struct device *dev)
831
-
{
832
-
struct usbhs_priv *priv = dev_get_drvdata(dev);
833
-
struct usbhs_mod *mod = usbhs_mod_get_current(priv);
834
-
835
-
if (mod) {
836
-
usbhs_mod_call(priv, stop, priv);
837
-
usbhs_mod_change(priv, -1);
838
-
}
839
-
840
-
if (mod || !usbhs_get_dparam(priv, runtime_pwctrl))
841
-
usbhsc_power_ctrl(priv, 0);
842
-
843
-
return 0;
844
-
}
845
-
846
-
static int usbhsc_resume(struct device *dev)
830
+
static void usbhsc_restore(struct device *dev)
847
831
{
848
832
struct usbhs_priv *priv = dev_get_drvdata(dev);
849
833
struct platform_device *pdev = usbhs_priv_to_pdev(priv);
···
840
856
usbhs_platform_call(priv, phy_reset, pdev);
841
857
842
858
usbhsc_schedule_notify_hotplug(pdev);
859
+
}
860
+
861
+
static int usbhsc_suspend(struct device *dev)
862
+
{
863
+
struct usbhs_priv *priv = dev_get_drvdata(dev);
864
+
struct usbhs_mod *mod = usbhs_mod_get_current(priv);
865
+
int ret;
866
+
867
+
if (mod) {
868
+
usbhs_mod_call(priv, stop, priv);
869
+
usbhs_mod_change(priv, -1);
870
+
}
871
+
872
+
if (mod || !usbhs_get_dparam(priv, runtime_pwctrl))
873
+
usbhsc_power_ctrl(priv, 0);
874
+
875
+
ret = reset_control_assert(priv->rsts);
876
+
if (ret)
877
+
usbhsc_restore(dev);
878
+
879
+
return ret;
880
+
}
881
+
882
+
static int usbhsc_resume(struct device *dev)
883
+
{
884
+
struct usbhs_priv *priv = dev_get_drvdata(dev);
885
+
int ret;
886
+
887
+
ret = reset_control_deassert(priv->rsts);
888
+
if (ret)
889
+
return ret;
890
+
891
+
usbhsc_restore(dev);
843
892
844
893
return 0;
845
894
}
+19
-23
drivers/usb/serial/belkin_sa.c
+19
-23
drivers/usb/serial/belkin_sa.c
···
435
435
struct belkin_sa_private *priv = usb_get_serial_port_data(port);
436
436
unsigned long control_state;
437
437
unsigned long flags;
438
-
int retval;
439
-
int rts = 0;
440
-
int dtr = 0;
438
+
int retval = 0;
441
439
442
440
spin_lock_irqsave(&priv->lock, flags);
443
441
control_state = priv->control_state;
444
442
445
-
if (set & TIOCM_RTS) {
443
+
if (set & TIOCM_RTS)
446
444
control_state |= TIOCM_RTS;
447
-
rts = 1;
448
-
}
449
-
if (set & TIOCM_DTR) {
445
+
if (set & TIOCM_DTR)
450
446
control_state |= TIOCM_DTR;
451
-
dtr = 1;
452
-
}
453
-
if (clear & TIOCM_RTS) {
447
+
if (clear & TIOCM_RTS)
454
448
control_state &= ~TIOCM_RTS;
455
-
rts = 0;
456
-
}
457
-
if (clear & TIOCM_DTR) {
449
+
if (clear & TIOCM_DTR)
458
450
control_state &= ~TIOCM_DTR;
459
-
dtr = 0;
460
-
}
461
451
462
452
priv->control_state = control_state;
463
453
spin_unlock_irqrestore(&priv->lock, flags);
464
454
465
-
retval = BSA_USB_CMD(BELKIN_SA_SET_RTS_REQUEST, rts);
466
-
if (retval < 0) {
467
-
dev_err(&port->dev, "Set RTS error %d\n", retval);
468
-
goto exit;
455
+
if ((set | clear) & TIOCM_RTS) {
456
+
retval = BSA_USB_CMD(BELKIN_SA_SET_RTS_REQUEST,
457
+
!!(control_state & TIOCM_RTS));
458
+
if (retval < 0) {
459
+
dev_err(&port->dev, "Set RTS error %d\n", retval);
460
+
goto exit;
461
+
}
469
462
}
470
463
471
-
retval = BSA_USB_CMD(BELKIN_SA_SET_DTR_REQUEST, dtr);
472
-
if (retval < 0) {
473
-
dev_err(&port->dev, "Set DTR error %d\n", retval);
474
-
goto exit;
464
+
if ((set | clear) & TIOCM_DTR) {
465
+
retval = BSA_USB_CMD(BELKIN_SA_SET_DTR_REQUEST,
466
+
!!(control_state & TIOCM_DTR));
467
+
if (retval < 0) {
468
+
dev_err(&port->dev, "Set DTR error %d\n", retval);
469
+
goto exit;
470
+
}
475
471
}
476
472
exit:
477
473
return retval;
+68
-132
drivers/usb/serial/ftdi_sio.c
+68
-132
drivers/usb/serial/ftdi_sio.c
···
107
107
};
108
108
109
109
static int ftdi_jtag_probe(struct usb_serial *serial);
110
-
static int ftdi_NDI_device_setup(struct usb_serial *serial);
111
110
static int ftdi_stmclite_probe(struct usb_serial *serial);
112
111
static int ftdi_8u2232c_probe(struct usb_serial *serial);
113
-
static void ftdi_USB_UIRT_setup(struct ftdi_private *priv);
114
-
static void ftdi_HE_TIRA1_setup(struct ftdi_private *priv);
112
+
static void ftdi_usb_uirt_setup(struct ftdi_private *priv);
113
+
static void ftdi_he_tira1_setup(struct ftdi_private *priv);
115
114
116
115
static const struct ftdi_quirk ftdi_jtag_quirk = {
117
116
.probe = ftdi_jtag_probe,
118
117
};
119
118
120
-
static const struct ftdi_quirk ftdi_NDI_device_quirk = {
121
-
.probe = ftdi_NDI_device_setup,
119
+
static const struct ftdi_quirk ftdi_ndi_quirk = {
122
120
};
123
121
124
-
static const struct ftdi_quirk ftdi_USB_UIRT_quirk = {
125
-
.port_probe = ftdi_USB_UIRT_setup,
122
+
static const struct ftdi_quirk ftdi_usb_uirt_quirk = {
123
+
.port_probe = ftdi_usb_uirt_setup,
126
124
};
127
125
128
-
static const struct ftdi_quirk ftdi_HE_TIRA1_quirk = {
129
-
.port_probe = ftdi_HE_TIRA1_setup,
126
+
static const struct ftdi_quirk ftdi_he_tira1_quirk = {
127
+
.port_probe = ftdi_he_tira1_setup,
130
128
};
131
129
132
130
static const struct ftdi_quirk ftdi_stmclite_quirk = {
···
588
590
{ USB_DEVICE(OCT_VID, OCT_US101_PID) },
589
591
{ USB_DEVICE(OCT_VID, OCT_DK201_PID) },
590
592
{ USB_DEVICE(FTDI_VID, FTDI_HE_TIRA1_PID),
591
-
.driver_info = (kernel_ulong_t)&ftdi_HE_TIRA1_quirk },
593
+
.driver_info = (kernel_ulong_t)&ftdi_he_tira1_quirk },
592
594
{ USB_DEVICE(FTDI_VID, FTDI_USB_UIRT_PID),
593
-
.driver_info = (kernel_ulong_t)&ftdi_USB_UIRT_quirk },
595
+
.driver_info = (kernel_ulong_t)&ftdi_usb_uirt_quirk },
594
596
{ USB_DEVICE(FTDI_VID, PROTEGO_SPECIAL_1) },
595
597
{ USB_DEVICE(FTDI_VID, PROTEGO_R2X0) },
596
598
{ USB_DEVICE(FTDI_VID, PROTEGO_SPECIAL_3) },
···
626
628
{ USB_DEVICE(FTDI_VID, FTDI_IBS_PEDO_PID) },
627
629
{ USB_DEVICE(FTDI_VID, FTDI_IBS_PROD_PID) },
628
630
{ USB_DEVICE(FTDI_VID, FTDI_TAVIR_STK500_PID) },
629
-
{ USB_DEVICE(FTDI_VID, FTDI_TIAO_UMPA_PID),
630
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
631
-
{ USB_DEVICE(FTDI_VID, FTDI_NT_ORIONLXM_PID),
632
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
631
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, FTDI_TIAO_UMPA_PID, 1) },
632
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, FTDI_NT_ORIONLXM_PID, 1) },
633
633
{ USB_DEVICE(FTDI_VID, FTDI_NT_ORIONLX_PLUS_PID) },
634
634
{ USB_DEVICE(FTDI_VID, FTDI_NT_ORION_IO_PID) },
635
635
{ USB_DEVICE(FTDI_VID, FTDI_NT_ORIONMX_PID) },
···
790
794
{ USB_DEVICE(FTDI_VID, FTDI_TACTRIX_OPENPORT_13U_PID) },
791
795
{ USB_DEVICE(ELEKTOR_VID, ELEKTOR_FT323R_PID) },
792
796
{ USB_DEVICE(FTDI_VID, FTDI_NDI_HUC_PID),
793
-
.driver_info = (kernel_ulong_t)&ftdi_NDI_device_quirk },
797
+
.driver_info = (kernel_ulong_t)&ftdi_ndi_quirk },
794
798
{ USB_DEVICE(FTDI_VID, FTDI_NDI_SPECTRA_SCU_PID),
795
-
.driver_info = (kernel_ulong_t)&ftdi_NDI_device_quirk },
799
+
.driver_info = (kernel_ulong_t)&ftdi_ndi_quirk },
796
800
{ USB_DEVICE(FTDI_VID, FTDI_NDI_FUTURE_2_PID),
797
-
.driver_info = (kernel_ulong_t)&ftdi_NDI_device_quirk },
801
+
.driver_info = (kernel_ulong_t)&ftdi_ndi_quirk },
798
802
{ USB_DEVICE(FTDI_VID, FTDI_NDI_FUTURE_3_PID),
799
-
.driver_info = (kernel_ulong_t)&ftdi_NDI_device_quirk },
803
+
.driver_info = (kernel_ulong_t)&ftdi_ndi_quirk },
800
804
{ USB_DEVICE(FTDI_VID, FTDI_NDI_AURORA_SCU_PID),
801
-
.driver_info = (kernel_ulong_t)&ftdi_NDI_device_quirk },
805
+
.driver_info = (kernel_ulong_t)&ftdi_ndi_quirk },
802
806
{ USB_DEVICE(FTDI_NDI_VID, FTDI_NDI_EMGUIDE_GEMINI_PID),
803
-
.driver_info = (kernel_ulong_t)&ftdi_NDI_device_quirk },
807
+
.driver_info = (kernel_ulong_t)&ftdi_ndi_quirk },
804
808
{ USB_DEVICE(TELLDUS_VID, TELLDUS_TELLSTICK_PID) },
805
809
{ USB_DEVICE(NOVITUS_VID, NOVITUS_BONO_E_PID) },
806
810
{ USB_DEVICE(FTDI_VID, RTSYSTEMS_USB_VX8_PID) },
···
838
842
{ USB_DEVICE(FTDI_VID, FTDI_ELSTER_UNICOM_PID) },
839
843
{ USB_DEVICE(FTDI_VID, FTDI_PROPOX_JTAGCABLEII_PID) },
840
844
{ USB_DEVICE(FTDI_VID, FTDI_PROPOX_ISPCABLEIII_PID) },
841
-
{ USB_DEVICE(FTDI_VID, CYBER_CORTEX_AV_PID),
842
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
845
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, CYBER_CORTEX_AV_PID, 1) },
843
846
{ USB_DEVICE_INTERFACE_NUMBER(OLIMEX_VID, OLIMEX_ARM_USB_OCD_PID, 1) },
844
847
{ USB_DEVICE_INTERFACE_NUMBER(OLIMEX_VID, OLIMEX_ARM_USB_OCD_H_PID, 1) },
845
848
{ USB_DEVICE_INTERFACE_NUMBER(OLIMEX_VID, OLIMEX_ARM_USB_TINY_PID, 1) },
846
849
{ USB_DEVICE_INTERFACE_NUMBER(OLIMEX_VID, OLIMEX_ARM_USB_TINY_H_PID, 1) },
847
-
{ USB_DEVICE(FIC_VID, FIC_NEO1973_DEBUG_PID),
848
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
849
-
{ USB_DEVICE(FTDI_VID, FTDI_OOCDLINK_PID),
850
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
851
-
{ USB_DEVICE(FTDI_VID, LMI_LM3S_DEVEL_BOARD_PID),
852
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
853
-
{ USB_DEVICE(FTDI_VID, LMI_LM3S_EVAL_BOARD_PID),
854
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
855
-
{ USB_DEVICE(FTDI_VID, LMI_LM3S_ICDI_BOARD_PID),
856
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
857
-
{ USB_DEVICE(FTDI_VID, FTDI_TURTELIZER_PID),
858
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
850
+
{ USB_DEVICE_INTERFACE_NUMBER(FIC_VID, FIC_NEO1973_DEBUG_PID, 1) },
851
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, FTDI_OOCDLINK_PID, 1) },
852
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, LMI_LM3S_DEVEL_BOARD_PID, 1) },
853
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, LMI_LM3S_EVAL_BOARD_PID, 1) },
854
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, LMI_LM3S_ICDI_BOARD_PID, 1) },
855
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, FTDI_TURTELIZER_PID, 1) },
859
856
{ USB_DEVICE(RATOC_VENDOR_ID, RATOC_PRODUCT_ID_USB60F) },
860
857
{ USB_DEVICE(RATOC_VENDOR_ID, RATOC_PRODUCT_ID_SCU18) },
861
858
{ USB_DEVICE(FTDI_VID, FTDI_REU_TINY_PID) },
···
890
901
{ USB_DEVICE(ATMEL_VID, STK541_PID) },
891
902
{ USB_DEVICE(DE_VID, STB_PID) },
892
903
{ USB_DEVICE(DE_VID, WHT_PID) },
893
-
{ USB_DEVICE(ADI_VID, ADI_GNICE_PID),
894
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
895
-
{ USB_DEVICE(ADI_VID, ADI_GNICEPLUS_PID),
896
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
904
+
{ USB_DEVICE_INTERFACE_NUMBER(ADI_VID, ADI_GNICE_PID, 1) },
905
+
{ USB_DEVICE_INTERFACE_NUMBER(ADI_VID, ADI_GNICEPLUS_PID, 1) },
897
906
{ USB_DEVICE_AND_INTERFACE_INFO(MICROCHIP_VID, MICROCHIP_USB_BOARD_PID,
898
907
USB_CLASS_VENDOR_SPEC,
899
908
USB_SUBCLASS_VENDOR_SPEC, 0x00) },
900
909
{ USB_DEVICE_INTERFACE_NUMBER(ACTEL_VID, MICROSEMI_ARROW_SF2PLUS_BOARD_PID, 2) },
901
910
{ USB_DEVICE(JETI_VID, JETI_SPC1201_PID) },
902
-
{ USB_DEVICE(MARVELL_VID, MARVELL_SHEEVAPLUG_PID),
903
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
911
+
{ USB_DEVICE_INTERFACE_NUMBER(MARVELL_VID, MARVELL_SHEEVAPLUG_PID, 1) },
904
912
{ USB_DEVICE(LARSENBRUSGAARD_VID, LB_ALTITRACK_PID) },
905
913
{ USB_DEVICE(GN_OTOMETRICS_VID, AURICAL_USB_PID) },
906
914
{ USB_DEVICE(FTDI_VID, PI_C865_PID) },
···
920
934
{ USB_DEVICE(PI_VID, PI_1016_PID) },
921
935
{ USB_DEVICE(KONDO_VID, KONDO_USB_SERIAL_PID) },
922
936
{ USB_DEVICE(BAYER_VID, BAYER_CONTOUR_CABLE_PID) },
923
-
{ USB_DEVICE(FTDI_VID, MARVELL_OPENRD_PID),
924
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
925
-
{ USB_DEVICE(FTDI_VID, TI_XDS100V2_PID),
926
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
937
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, MARVELL_OPENRD_PID, 1) },
938
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, TI_XDS100V2_PID, 1) },
927
939
{ USB_DEVICE(FTDI_VID, HAMEG_HO820_PID) },
928
940
{ USB_DEVICE(FTDI_VID, HAMEG_HO720_PID) },
929
941
{ USB_DEVICE(FTDI_VID, HAMEG_HO730_PID) },
···
930
946
{ USB_DEVICE(FTDI_VID, MJSG_SR_RADIO_PID) },
931
947
{ USB_DEVICE(FTDI_VID, MJSG_HD_RADIO_PID) },
932
948
{ USB_DEVICE(FTDI_VID, MJSG_XM_RADIO_PID) },
933
-
{ USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_ST_PID),
934
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
935
-
{ USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_SLITE_PID),
936
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
937
-
{ USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_SH2_PID),
938
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
949
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, XVERVE_SIGNALYZER_ST_PID, 1) },
950
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, XVERVE_SIGNALYZER_SLITE_PID, 1) },
951
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, XVERVE_SIGNALYZER_SH2_PID, 1) },
939
952
{ USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_SH4_PID),
940
953
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
941
954
{ USB_DEVICE(FTDI_VID, SEGWAY_RMP200_PID) },
942
955
{ USB_DEVICE(FTDI_VID, ACCESIO_COM4SM_PID) },
943
-
{ USB_DEVICE(IONICS_VID, IONICS_PLUGCOMPUTER_PID),
944
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
956
+
{ USB_DEVICE_INTERFACE_NUMBER(IONICS_VID, IONICS_PLUGCOMPUTER_PID, 1) },
945
957
{ USB_DEVICE(FTDI_VID, FTDI_CHAMSYS_24_MASTER_WING_PID) },
946
958
{ USB_DEVICE(FTDI_VID, FTDI_CHAMSYS_PC_WING_PID) },
947
959
{ USB_DEVICE(FTDI_VID, FTDI_CHAMSYS_USB_DMX_PID) },
···
952
972
{ USB_DEVICE(FTDI_VID, FTDI_CINTERION_MC55I_PID) },
953
973
{ USB_DEVICE(FTDI_VID, FTDI_FHE_PID) },
954
974
{ USB_DEVICE(FTDI_VID, FTDI_DOTEC_PID) },
955
-
{ USB_DEVICE(QIHARDWARE_VID, MILKYMISTONE_JTAGSERIAL_PID),
956
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
957
-
{ USB_DEVICE(ST_VID, ST_STMCLT_2232_PID),
958
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
975
+
{ USB_DEVICE_INTERFACE_NUMBER(QIHARDWARE_VID, MILKYMISTONE_JTAGSERIAL_PID, 1) },
976
+
{ USB_DEVICE_INTERFACE_NUMBER(ST_VID, ST_STMCLT_2232_PID, 1) },
959
977
{ USB_DEVICE(ST_VID, ST_STMCLT_4232_PID),
960
978
.driver_info = (kernel_ulong_t)&ftdi_stmclite_quirk },
961
979
{ USB_DEVICE(FTDI_VID, FTDI_RF_R106) },
962
-
{ USB_DEVICE(FTDI_VID, FTDI_DISTORTEC_JTAG_LOCK_PICK_PID),
963
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
980
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, FTDI_DISTORTEC_JTAG_LOCK_PICK_PID, 1) },
964
981
{ USB_DEVICE(FTDI_VID, FTDI_LUMEL_PD12_PID) },
965
982
/* Crucible Devices */
966
983
{ USB_DEVICE(FTDI_VID, FTDI_CT_COMET_PID) },
···
1032
1055
{ USB_DEVICE(ICPDAS_VID, ICPDAS_I7561U_PID) },
1033
1056
{ USB_DEVICE(ICPDAS_VID, ICPDAS_I7563U_PID) },
1034
1057
{ USB_DEVICE(WICED_VID, WICED_USB20706V2_PID) },
1035
-
{ USB_DEVICE(TI_VID, TI_CC3200_LAUNCHPAD_PID),
1036
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
1058
+
{ USB_DEVICE_INTERFACE_NUMBER(TI_VID, TI_CC3200_LAUNCHPAD_PID, 1) },
1037
1059
{ USB_DEVICE(CYPRESS_VID, CYPRESS_WICED_BT_USB_PID) },
1038
1060
{ USB_DEVICE(CYPRESS_VID, CYPRESS_WICED_WL_USB_PID) },
1039
1061
{ USB_DEVICE(AIRBUS_DS_VID, AIRBUS_DS_P8GR) },
···
1052
1076
{ USB_DEVICE(UBLOX_VID, UBLOX_C099F9P_ODIN_PID) },
1053
1077
{ USB_DEVICE_INTERFACE_NUMBER(UBLOX_VID, UBLOX_EVK_M101_PID, 2) },
1054
1078
/* FreeCalypso USB adapters */
1055
-
{ USB_DEVICE(FTDI_VID, FTDI_FALCONIA_JTAG_BUF_PID),
1056
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
1057
-
{ USB_DEVICE(FTDI_VID, FTDI_FALCONIA_JTAG_UNBUF_PID),
1058
-
.driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
1079
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, FTDI_FALCONIA_JTAG_BUF_PID, 1) },
1080
+
{ USB_DEVICE_INTERFACE_NUMBER(FTDI_VID, FTDI_FALCONIA_JTAG_UNBUF_PID, 1) },
1059
1081
/* GMC devices */
1060
1082
{ USB_DEVICE(GMC_VID, GMC_Z216C_PID) },
1061
1083
/* Altera USB Blaster 3 */
···
1245
1271
static u32 get_ftdi_divisor(struct tty_struct *tty,
1246
1272
struct usb_serial_port *port)
1247
1273
{
1274
+
const struct ftdi_quirk *quirk = usb_get_serial_data(port->serial);
1248
1275
struct ftdi_private *priv = usb_get_serial_port_data(port);
1249
1276
struct device *dev = &port->dev;
1250
1277
u32 div_value = 0;
···
1305
1330
case FT232R:
1306
1331
case FTX:
1307
1332
if (baud <= 3000000) {
1308
-
u16 product_id = le16_to_cpu(
1309
-
port->serial->dev->descriptor.idProduct);
1310
-
if (((product_id == FTDI_NDI_HUC_PID) ||
1311
-
(product_id == FTDI_NDI_SPECTRA_SCU_PID) ||
1312
-
(product_id == FTDI_NDI_FUTURE_2_PID) ||
1313
-
(product_id == FTDI_NDI_FUTURE_3_PID) ||
1314
-
(product_id == FTDI_NDI_AURORA_SCU_PID)) &&
1315
-
(baud == 19200)) {
1333
+
if (quirk == &ftdi_ndi_quirk && baud == 19200)
1316
1334
baud = 1200000;
1317
-
}
1318
1335
div_value = ftdi_232bm_baud_to_divisor(baud);
1319
1336
} else {
1320
1337
dev_dbg(dev, "%s - Baud rate too high!\n", __func__);
···
2203
2236
goto err_free;
2204
2237
2205
2238
ftdi_set_max_packet_size(port);
2206
-
if (read_latency_timer(port) < 0)
2239
+
if (quirk == &ftdi_ndi_quirk)
2240
+
priv->latency = 1;
2241
+
else if (read_latency_timer(port) < 0)
2207
2242
priv->latency = 16;
2208
2243
write_latency_timer(port);
2209
2244
···
2224
2255
return result;
2225
2256
}
2226
2257
2227
-
/* Setup for the USB-UIRT device, which requires hardwired
2228
-
* baudrate (38400 gets mapped to 312500) */
2229
-
/* Called from usbserial:serial_probe */
2230
-
static void ftdi_USB_UIRT_setup(struct ftdi_private *priv)
2258
+
/*
2259
+
* Setup for the USB-UIRT device, which requires hardwired baudrate
2260
+
* (38400 gets mapped to 312500).
2261
+
*/
2262
+
static void ftdi_usb_uirt_setup(struct ftdi_private *priv)
2231
2263
{
2232
2264
priv->flags |= ASYNC_SPD_CUST;
2233
2265
priv->custom_divisor = 77;
2234
2266
priv->force_baud = 38400;
2235
2267
}
2236
2268
2237
-
/* Setup for the HE-TIRA1 device, which requires hardwired
2238
-
* baudrate (38400 gets mapped to 100000) and RTS-CTS enabled. */
2239
-
2240
-
static void ftdi_HE_TIRA1_setup(struct ftdi_private *priv)
2269
+
/*
2270
+
* Setup for the HE-TIRA1 device, which requires hardwired baudrate
2271
+
* (38400 gets mapped to 100000) and RTS-CTS enabled.
2272
+
*/
2273
+
static void ftdi_he_tira1_setup(struct ftdi_private *priv)
2241
2274
{
2242
2275
priv->flags |= ASYNC_SPD_CUST;
2243
2276
priv->custom_divisor = 240;
2244
2277
priv->force_baud = 38400;
2245
2278
priv->force_rtscts = 1;
2246
-
}
2247
-
2248
-
/*
2249
-
* Module parameter to control latency timer for NDI FTDI-based USB devices.
2250
-
* If this value is not set in /etc/modprobe.d/ its value will be set
2251
-
* to 1ms.
2252
-
*/
2253
-
static int ndi_latency_timer = 1;
2254
-
2255
-
/* Setup for the NDI FTDI-based USB devices, which requires hardwired
2256
-
* baudrate (19200 gets mapped to 1200000).
2257
-
*
2258
-
* Called from usbserial:serial_probe.
2259
-
*/
2260
-
static int ftdi_NDI_device_setup(struct usb_serial *serial)
2261
-
{
2262
-
struct usb_device *udev = serial->dev;
2263
-
int latency = ndi_latency_timer;
2264
-
2265
-
if (latency == 0)
2266
-
latency = 1;
2267
-
if (latency > 99)
2268
-
latency = 99;
2269
-
2270
-
dev_dbg(&udev->dev, "%s setting NDI device latency to %d\n", __func__, latency);
2271
-
dev_info(&udev->dev, "NDI device with a latency value of %d\n", latency);
2272
-
2273
-
/* FIXME: errors are not returned */
2274
-
usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
2275
-
FTDI_SIO_SET_LATENCY_TIMER_REQUEST,
2276
-
FTDI_SIO_SET_LATENCY_TIMER_REQUEST_TYPE,
2277
-
latency, 0, NULL, 0, WDR_TIMEOUT);
2278
-
return 0;
2279
2279
}
2280
2280
2281
2281
/*
···
2257
2319
struct usb_interface *intf = serial->interface;
2258
2320
int ifnum = intf->cur_altsetting->desc.bInterfaceNumber;
2259
2321
2260
-
if (ifnum == 0) {
2261
-
dev_info(&intf->dev, "Ignoring interface reserved for JTAG\n");
2322
+
if (ifnum == 0)
2262
2323
return -ENODEV;
2263
-
}
2264
2324
2265
2325
return 0;
2266
2326
}
2267
2327
2268
2328
static int ftdi_8u2232c_probe(struct usb_serial *serial)
2269
2329
{
2330
+
struct usb_interface *intf = serial->interface;
2270
2331
struct usb_device *udev = serial->dev;
2332
+
int ifnum = intf->cur_altsetting->desc.bInterfaceNumber;
2271
2333
2272
-
if (udev->manufacturer && !strcmp(udev->manufacturer, "CALAO Systems"))
2273
-
return ftdi_jtag_probe(serial);
2334
+
if (ifnum == 0) {
2335
+
if (udev->manufacturer &&
2336
+
!strcmp(udev->manufacturer, "CALAO Systems"))
2337
+
return -ENODEV;
2274
2338
2275
-
if (udev->product &&
2276
-
(!strcmp(udev->product, "Arrow USB Blaster") ||
2277
-
!strcmp(udev->product, "BeagleBone/XDS100V2") ||
2278
-
!strcmp(udev->product, "SNAP Connect E10")))
2279
-
return ftdi_jtag_probe(serial);
2339
+
if (udev->product &&
2340
+
(!strcmp(udev->product, "Arrow USB Blaster") ||
2341
+
!strcmp(udev->product, "BeagleBone/XDS100V2") ||
2342
+
!strcmp(udev->product, "SNAP Connect E10")))
2343
+
return -ENODEV;
2344
+
}
2280
2345
2281
2346
return 0;
2282
2347
}
···
2296
2355
struct usb_interface *intf = serial->interface;
2297
2356
int ifnum = intf->cur_altsetting->desc.bInterfaceNumber;
2298
2357
2299
-
if (ifnum < 2) {
2300
-
dev_info(&intf->dev, "Ignoring interface reserved for JTAG\n");
2358
+
if (ifnum < 2)
2301
2359
return -ENODEV;
2302
-
}
2303
2360
2304
2361
return 0;
2305
2362
}
···
2874
2935
MODULE_AUTHOR(DRIVER_AUTHOR);
2875
2936
MODULE_DESCRIPTION(DRIVER_DESC);
2876
2937
MODULE_LICENSE("GPL");
2877
-
2878
-
module_param(ndi_latency_timer, int, 0644);
2879
-
MODULE_PARM_DESC(ndi_latency_timer, "NDI device latency timer override");
+75
-133
drivers/usb/serial/kobil_sct.c
+75
-133
drivers/usb/serial/kobil_sct.c
···
109
109
__u16 device_type;
110
110
};
111
111
112
+
static int kobil_ctrl_send(struct usb_serial_port *port, u8 req, u16 val)
113
+
{
114
+
return usb_control_msg(port->serial->dev,
115
+
usb_sndctrlpipe(port->serial->dev, 0),
116
+
req, USB_TYPE_VENDOR | USB_RECIP_ENDPOINT | USB_DIR_OUT,
117
+
val, 0, NULL, 0, KOBIL_TIMEOUT);
118
+
}
119
+
120
+
static int kobil_ctrl_recv(struct usb_serial_port *port, u8 req, u16 val, void *buf, u16 size)
121
+
{
122
+
return usb_control_msg(port->serial->dev,
123
+
usb_rcvctrlpipe(port->serial->dev, 0),
124
+
req, USB_TYPE_VENDOR | USB_RECIP_ENDPOINT | USB_DIR_IN,
125
+
val, 0, buf, size, KOBIL_TIMEOUT);
126
+
}
112
127
113
128
static int kobil_port_probe(struct usb_serial_port *port)
114
129
{
···
178
163
static int kobil_open(struct tty_struct *tty, struct usb_serial_port *port)
179
164
{
180
165
struct device *dev = &port->dev;
181
-
int result = 0;
182
166
struct kobil_private *priv;
183
167
unsigned char *transfer_buffer;
184
168
int transfer_buffer_length = 8;
169
+
int result;
185
170
186
171
priv = usb_get_serial_port_data(port);
187
172
···
191
176
return -ENOMEM;
192
177
193
178
/* get hardware version */
194
-
result = usb_control_msg(port->serial->dev,
195
-
usb_rcvctrlpipe(port->serial->dev, 0),
196
-
SUSBCRequest_GetMisc,
197
-
USB_TYPE_VENDOR | USB_RECIP_ENDPOINT | USB_DIR_IN,
198
-
SUSBCR_MSC_GetHWVersion,
199
-
0,
200
-
transfer_buffer,
201
-
transfer_buffer_length,
202
-
KOBIL_TIMEOUT
203
-
);
179
+
result = kobil_ctrl_recv(port, SUSBCRequest_GetMisc, SUSBCR_MSC_GetHWVersion,
180
+
transfer_buffer, transfer_buffer_length);
204
181
dev_dbg(dev, "%s - Send get_HW_version URB returns: %i\n", __func__, result);
205
182
if (result >= 3) {
206
183
dev_dbg(dev, "Hardware version: %i.%i.%i\n", transfer_buffer[0],
···
200
193
}
201
194
202
195
/* get firmware version */
203
-
result = usb_control_msg(port->serial->dev,
204
-
usb_rcvctrlpipe(port->serial->dev, 0),
205
-
SUSBCRequest_GetMisc,
206
-
USB_TYPE_VENDOR | USB_RECIP_ENDPOINT | USB_DIR_IN,
207
-
SUSBCR_MSC_GetFWVersion,
208
-
0,
209
-
transfer_buffer,
210
-
transfer_buffer_length,
211
-
KOBIL_TIMEOUT
212
-
);
196
+
result = kobil_ctrl_recv(port, SUSBCRequest_GetMisc, SUSBCR_MSC_GetFWVersion,
197
+
transfer_buffer, transfer_buffer_length);
213
198
dev_dbg(dev, "%s - Send get_FW_version URB returns: %i\n", __func__, result);
214
199
if (result >= 3) {
215
200
dev_dbg(dev, "Firmware version: %i.%i.%i\n", transfer_buffer[0],
···
211
212
if (priv->device_type == KOBIL_ADAPTER_B_PRODUCT_ID ||
212
213
priv->device_type == KOBIL_ADAPTER_K_PRODUCT_ID) {
213
214
/* Setting Baudrate, Parity and Stopbits */
214
-
result = usb_control_msg(port->serial->dev,
215
-
usb_sndctrlpipe(port->serial->dev, 0),
216
-
SUSBCRequest_SetBaudRateParityAndStopBits,
217
-
USB_TYPE_VENDOR | USB_RECIP_ENDPOINT | USB_DIR_OUT,
218
-
SUSBCR_SBR_9600 | SUSBCR_SPASB_EvenParity |
219
-
SUSBCR_SPASB_1StopBit,
220
-
0,
221
-
NULL,
222
-
0,
223
-
KOBIL_TIMEOUT
224
-
);
215
+
result = kobil_ctrl_send(port, SUSBCRequest_SetBaudRateParityAndStopBits,
216
+
SUSBCR_SBR_9600 | SUSBCR_SPASB_EvenParity | SUSBCR_SPASB_1StopBit);
225
217
dev_dbg(dev, "%s - Send set_baudrate URB returns: %i\n", __func__, result);
226
218
227
219
/* reset all queues */
228
-
result = usb_control_msg(port->serial->dev,
229
-
usb_sndctrlpipe(port->serial->dev, 0),
230
-
SUSBCRequest_Misc,
231
-
USB_TYPE_VENDOR | USB_RECIP_ENDPOINT | USB_DIR_OUT,
232
-
SUSBCR_MSC_ResetAllQueues,
233
-
0,
234
-
NULL,
235
-
0,
236
-
KOBIL_TIMEOUT
237
-
);
220
+
result = kobil_ctrl_send(port, SUSBCRequest_Misc, SUSBCR_MSC_ResetAllQueues);
238
221
dev_dbg(dev, "%s - Send reset_all_queues URB returns: %i\n", __func__, result);
239
222
}
240
223
if (priv->device_type == KOBIL_USBTWIN_PRODUCT_ID ||
241
-
priv->device_type == KOBIL_ADAPTER_B_PRODUCT_ID ||
242
-
priv->device_type == KOBIL_KAAN_SIM_PRODUCT_ID) {
224
+
priv->device_type == KOBIL_ADAPTER_B_PRODUCT_ID ||
225
+
priv->device_type == KOBIL_KAAN_SIM_PRODUCT_ID) {
243
226
/* start reading (Adapter B 'cause PNP string) */
244
227
result = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
245
228
dev_dbg(dev, "%s - Send read URB returns: %i\n", __func__, result);
···
272
291
static int kobil_write(struct tty_struct *tty, struct usb_serial_port *port,
273
292
const unsigned char *buf, int count)
274
293
{
275
-
int length = 0;
276
-
int result = 0;
277
-
int todo = 0;
278
294
struct kobil_private *priv;
295
+
int length, todo, result;
279
296
280
297
if (count == 0) {
281
298
dev_dbg(&port->dev, "%s - write request of 0 bytes\n", __func__);
···
297
318
if (((priv->device_type != KOBIL_ADAPTER_B_PRODUCT_ID) && (priv->filled > 2) && (priv->filled >= (priv->buf[1] + 3))) ||
298
319
((priv->device_type == KOBIL_ADAPTER_B_PRODUCT_ID) && (priv->filled > 3) && (priv->filled >= (priv->buf[2] + 4)))) {
299
320
/* stop reading (except TWIN and KAAN SIM) */
300
-
if ((priv->device_type == KOBIL_ADAPTER_B_PRODUCT_ID)
301
-
|| (priv->device_type == KOBIL_ADAPTER_K_PRODUCT_ID))
321
+
if (priv->device_type == KOBIL_ADAPTER_B_PRODUCT_ID ||
322
+
priv->device_type == KOBIL_ADAPTER_K_PRODUCT_ID) {
302
323
usb_kill_urb(port->interrupt_in_urb);
324
+
}
303
325
304
326
todo = priv->filled - priv->cur_pos;
305
327
···
327
347
328
348
/* start reading (except TWIN and KAAN SIM) */
329
349
if (priv->device_type == KOBIL_ADAPTER_B_PRODUCT_ID ||
330
-
priv->device_type == KOBIL_ADAPTER_K_PRODUCT_ID) {
350
+
priv->device_type == KOBIL_ADAPTER_K_PRODUCT_ID) {
331
351
result = usb_submit_urb(port->interrupt_in_urb,
332
352
GFP_ATOMIC);
333
353
dev_dbg(&port->dev, "%s - Send read URB returns: %i\n", __func__, result);
···
353
373
int transfer_buffer_length = 8;
354
374
355
375
priv = usb_get_serial_port_data(port);
356
-
if (priv->device_type == KOBIL_USBTWIN_PRODUCT_ID
357
-
|| priv->device_type == KOBIL_KAAN_SIM_PRODUCT_ID) {
376
+
if (priv->device_type == KOBIL_USBTWIN_PRODUCT_ID ||
377
+
priv->device_type == KOBIL_KAAN_SIM_PRODUCT_ID) {
358
378
/* This device doesn't support ioctl calls */
359
379
return -EINVAL;
360
380
}
···
364
384
if (!transfer_buffer)
365
385
return -ENOMEM;
366
386
367
-
result = usb_control_msg(port->serial->dev,
368
-
usb_rcvctrlpipe(port->serial->dev, 0),
369
-
SUSBCRequest_GetStatusLineState,
370
-
USB_TYPE_VENDOR | USB_RECIP_ENDPOINT | USB_DIR_IN,
371
-
0,
372
-
0,
373
-
transfer_buffer,
374
-
transfer_buffer_length,
375
-
KOBIL_TIMEOUT);
376
-
387
+
result = kobil_ctrl_recv(port, SUSBCRequest_GetStatusLineState, 0,
388
+
transfer_buffer, transfer_buffer_length);
377
389
dev_dbg(&port->dev, "Send get_status_line_state URB returns: %i\n",
378
390
result);
379
391
if (result < 1) {
···
390
418
struct usb_serial_port *port = tty->driver_data;
391
419
struct device *dev = &port->dev;
392
420
struct kobil_private *priv;
421
+
int dtr, rts;
393
422
int result;
394
-
int dtr = 0;
395
-
int rts = 0;
423
+
u16 val = 0;
396
424
397
-
/* FIXME: locking ? */
398
425
priv = usb_get_serial_port_data(port);
399
-
if (priv->device_type == KOBIL_USBTWIN_PRODUCT_ID
400
-
|| priv->device_type == KOBIL_KAAN_SIM_PRODUCT_ID) {
426
+
if (priv->device_type == KOBIL_USBTWIN_PRODUCT_ID ||
427
+
priv->device_type == KOBIL_KAAN_SIM_PRODUCT_ID) {
401
428
/* This device doesn't support ioctl calls */
402
429
return -EINVAL;
403
430
}
404
431
405
-
if (set & TIOCM_RTS)
406
-
rts = 1;
407
-
if (set & TIOCM_DTR)
408
-
dtr = 1;
409
-
if (clear & TIOCM_RTS)
410
-
rts = 0;
411
-
if (clear & TIOCM_DTR)
412
-
dtr = 0;
432
+
dtr = (set | clear) & TIOCM_DTR;
433
+
rts = (set | clear) & TIOCM_RTS;
413
434
414
-
if (priv->device_type == KOBIL_ADAPTER_B_PRODUCT_ID) {
415
-
if (dtr != 0)
416
-
dev_dbg(dev, "%s - Setting DTR\n", __func__);
435
+
if (dtr && priv->device_type == KOBIL_ADAPTER_B_PRODUCT_ID) {
436
+
if (set & TIOCM_DTR)
437
+
val = SUSBCR_SSL_SETDTR;
417
438
else
418
-
dev_dbg(dev, "%s - Clearing DTR\n", __func__);
419
-
result = usb_control_msg(port->serial->dev,
420
-
usb_sndctrlpipe(port->serial->dev, 0),
421
-
SUSBCRequest_SetStatusLinesOrQueues,
422
-
USB_TYPE_VENDOR | USB_RECIP_ENDPOINT | USB_DIR_OUT,
423
-
((dtr != 0) ? SUSBCR_SSL_SETDTR : SUSBCR_SSL_CLRDTR),
424
-
0,
425
-
NULL,
426
-
0,
427
-
KOBIL_TIMEOUT);
428
-
} else {
429
-
if (rts != 0)
430
-
dev_dbg(dev, "%s - Setting RTS\n", __func__);
439
+
val = SUSBCR_SSL_CLRDTR;
440
+
} else if (rts) {
441
+
if (set & TIOCM_RTS)
442
+
val = SUSBCR_SSL_SETRTS;
431
443
else
432
-
dev_dbg(dev, "%s - Clearing RTS\n", __func__);
433
-
result = usb_control_msg(port->serial->dev,
434
-
usb_sndctrlpipe(port->serial->dev, 0),
435
-
SUSBCRequest_SetStatusLinesOrQueues,
436
-
USB_TYPE_VENDOR | USB_RECIP_ENDPOINT | USB_DIR_OUT,
437
-
((rts != 0) ? SUSBCR_SSL_SETRTS : SUSBCR_SSL_CLRRTS),
438
-
0,
439
-
NULL,
440
-
0,
441
-
KOBIL_TIMEOUT);
444
+
val = SUSBCR_SSL_CLRRTS;
442
445
}
443
-
dev_dbg(dev, "%s - Send set_status_line URB returns: %i\n", __func__, result);
444
-
return (result < 0) ? result : 0;
446
+
447
+
if (val) {
448
+
result = kobil_ctrl_send(port, SUSBCRequest_SetStatusLinesOrQueues, val);
449
+
if (result < 0) {
450
+
dev_err(dev, "failed to set status lines: %d\n", result);
451
+
return result;
452
+
}
453
+
}
454
+
455
+
return 0;
445
456
}
446
457
447
458
static void kobil_set_termios(struct tty_struct *tty,
···
433
478
{
434
479
struct kobil_private *priv;
435
480
int result;
436
-
unsigned short urb_val = 0;
437
481
int c_cflag = tty->termios.c_cflag;
438
482
speed_t speed;
483
+
u16 val;
439
484
440
485
priv = usb_get_serial_port_data(port);
441
486
if (priv->device_type == KOBIL_USBTWIN_PRODUCT_ID ||
···
448
493
speed = tty_get_baud_rate(tty);
449
494
switch (speed) {
450
495
case 1200:
451
-
urb_val = SUSBCR_SBR_1200;
496
+
val = SUSBCR_SBR_1200;
452
497
break;
453
498
default:
454
499
speed = 9600;
455
500
fallthrough;
456
501
case 9600:
457
-
urb_val = SUSBCR_SBR_9600;
502
+
val = SUSBCR_SBR_9600;
458
503
break;
459
504
}
460
-
urb_val |= (c_cflag & CSTOPB) ? SUSBCR_SPASB_2StopBits :
461
-
SUSBCR_SPASB_1StopBit;
505
+
506
+
if (c_cflag & CSTOPB)
507
+
val |= SUSBCR_SPASB_2StopBits;
508
+
else
509
+
val |= SUSBCR_SPASB_1StopBit;
510
+
462
511
if (c_cflag & PARENB) {
463
512
if (c_cflag & PARODD)
464
-
urb_val |= SUSBCR_SPASB_OddParity;
513
+
val |= SUSBCR_SPASB_OddParity;
465
514
else
466
-
urb_val |= SUSBCR_SPASB_EvenParity;
467
-
} else
468
-
urb_val |= SUSBCR_SPASB_NoParity;
515
+
val |= SUSBCR_SPASB_EvenParity;
516
+
} else {
517
+
val |= SUSBCR_SPASB_NoParity;
518
+
}
519
+
469
520
tty->termios.c_cflag &= ~CMSPAR;
470
521
tty_encode_baud_rate(tty, speed, speed);
471
522
472
-
result = usb_control_msg(port->serial->dev,
473
-
usb_sndctrlpipe(port->serial->dev, 0),
474
-
SUSBCRequest_SetBaudRateParityAndStopBits,
475
-
USB_TYPE_VENDOR | USB_RECIP_ENDPOINT | USB_DIR_OUT,
476
-
urb_val,
477
-
0,
478
-
NULL,
479
-
0,
480
-
KOBIL_TIMEOUT
481
-
);
523
+
result = kobil_ctrl_send(port, SUSBCRequest_SetBaudRateParityAndStopBits, val);
482
524
if (result) {
483
525
dev_err(&port->dev, "failed to update line settings: %d\n",
484
526
result);
···
496
544
497
545
switch (cmd) {
498
546
case TCFLSH:
499
-
result = usb_control_msg(port->serial->dev,
500
-
usb_sndctrlpipe(port->serial->dev, 0),
501
-
SUSBCRequest_Misc,
502
-
USB_TYPE_VENDOR | USB_RECIP_ENDPOINT | USB_DIR_OUT,
503
-
SUSBCR_MSC_ResetAllQueues,
504
-
0,
505
-
NULL,
506
-
0,
507
-
KOBIL_TIMEOUT
508
-
);
509
-
547
+
result = kobil_ctrl_send(port, SUSBCRequest_Misc, SUSBCR_MSC_ResetAllQueues);
510
548
dev_dbg(&port->dev,
511
549
"%s - Send reset_all_queues (FLUSH) URB returns: %i\n",
512
550
__func__, result);
+19
-3
drivers/usb/serial/option.c
+19
-3
drivers/usb/serial/option.c
···
1433
1433
{ USB_DEVICE_AND_INTERFACE_INFO(TELIT_VENDOR_ID, 0x10b3, 0xff, 0xff, 0x60) },
1434
1434
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10c0, 0xff), /* Telit FE910C04 (rmnet) */
1435
1435
.driver_info = RSVD(0) | NCTRL(3) },
1436
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10c1, 0xff), /* Telit FE910C04 (RNDIS) */
1437
+
.driver_info = NCTRL(4) },
1438
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10c2, 0xff), /* Telit FE910C04 (MBIM) */
1439
+
.driver_info = NCTRL(4) },
1440
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10c3, 0xff), /* Telit FE910C04 (ECM) */
1441
+
.driver_info = NCTRL(4) },
1436
1442
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10c4, 0xff), /* Telit FE910C04 (rmnet) */
1437
1443
.driver_info = RSVD(0) | NCTRL(3) },
1444
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10c5, 0xff), /* Telit FE910C04 (RNDIS) */
1445
+
.driver_info = NCTRL(4) },
1446
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10c6, 0xff), /* Telit FE910C04 (MBIM) */
1447
+
.driver_info = NCTRL(4) },
1448
+
{ USB_DEVICE_AND_INTERFACE_INFO(TELIT_VENDOR_ID, 0x10c7, 0xff, 0xff, 0x30), /* Telit FE910C04 (ECM) */
1449
+
.driver_info = NCTRL(4) },
1450
+
{ USB_DEVICE_AND_INTERFACE_INFO(TELIT_VENDOR_ID, 0x10c7, 0xff, 0xff, 0x40) },
1438
1451
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10c8, 0xff), /* Telit FE910C04 (rmnet) */
1439
1452
.driver_info = RSVD(0) | NCTRL(2) | RSVD(3) | RSVD(4) },
1453
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10c9, 0xff), /* Telit FE910C04 (MBIM) */
1454
+
.driver_info = NCTRL(3) | RSVD(4) | RSVD(5) },
1455
+
{ USB_DEVICE_INTERFACE_CLASS(TELIT_VENDOR_ID, 0x10cb, 0xff), /* Telit FE910C04 (RNDIS) */
1456
+
.driver_info = NCTRL(3) | RSVD(4) | RSVD(5) },
1440
1457
{ USB_DEVICE_AND_INTERFACE_INFO(TELIT_VENDOR_ID, 0x10d0, 0xff, 0xff, 0x30), /* Telit FN990B (rmnet) */
1441
1458
.driver_info = NCTRL(5) },
1442
1459
{ USB_DEVICE_AND_INTERFACE_INFO(TELIT_VENDOR_ID, 0x10d0, 0xff, 0xff, 0x40) },
1443
1460
{ USB_DEVICE_AND_INTERFACE_INFO(TELIT_VENDOR_ID, 0x10d0, 0xff, 0xff, 0x60) },
1444
-
{ USB_DEVICE_AND_INTERFACE_INFO(TELIT_VENDOR_ID, 0x10c7, 0xff, 0xff, 0x30), /* Telit FE910C04 (ECM) */
1445
-
.driver_info = NCTRL(4) },
1446
-
{ USB_DEVICE_AND_INTERFACE_INFO(TELIT_VENDOR_ID, 0x10c7, 0xff, 0xff, 0x40) },
1447
1461
{ USB_DEVICE_AND_INTERFACE_INFO(TELIT_VENDOR_ID, 0x10d1, 0xff, 0xff, 0x30), /* Telit FN990B (MBIM) */
1448
1462
.driver_info = NCTRL(6) },
1449
1463
{ USB_DEVICE_AND_INTERFACE_INFO(TELIT_VENDOR_ID, 0x10d1, 0xff, 0xff, 0x40) },
···
2389
2375
{ USB_DEVICE_INTERFACE_CLASS(0x0489, 0xe0ee, 0xff), /* Foxconn T99W368 MBIM */
2390
2376
.driver_info = RSVD(3) },
2391
2377
{ USB_DEVICE_INTERFACE_CLASS(0x0489, 0xe0f0, 0xff), /* Foxconn T99W373 MBIM */
2378
+
.driver_info = RSVD(3) },
2379
+
{ USB_DEVICE_INTERFACE_CLASS(0x0489, 0xe123, 0xff), /* Foxconn T99W760 MBIM */
2392
2380
.driver_info = RSVD(3) },
2393
2381
{ USB_DEVICE_INTERFACE_CLASS(0x0489, 0xe145, 0xff), /* Foxconn T99W651 RNDIS */
2394
2382
.driver_info = RSVD(5) | RSVD(6) },
+1
-2
drivers/usb/storage/protocol.c
+1
-2
drivers/usb/storage/protocol.c
···
139
139
return cnt;
140
140
141
141
while (sg_miter_next(&miter) && cnt < buflen) {
142
-
unsigned int len = min_t(unsigned int, miter.length,
143
-
buflen - cnt);
142
+
unsigned int len = min(miter.length, buflen - cnt);
144
143
145
144
if (dir == FROM_XFER_BUF)
146
145
memcpy(buffer + cnt, miter.addr, len);
+17
-12
drivers/usb/storage/uas.c
+17
-12
drivers/usb/storage/uas.c
···
309
309
int status = urb->status;
310
310
bool success;
311
311
312
+
if (status) {
313
+
if (status != -ENOENT && status != -ECONNRESET && status != -ESHUTDOWN)
314
+
dev_err(&urb->dev->dev, "stat urb: status %d\n", status);
315
+
goto bail;
316
+
}
317
+
318
+
idx = be16_to_cpup(&iu->tag) - 1;
319
+
312
320
spin_lock_irqsave(&devinfo->lock, flags);
313
321
314
322
if (devinfo->resetting)
315
323
goto out;
316
-
317
-
if (status) {
318
-
if (status != -ENOENT && status != -ECONNRESET && status != -ESHUTDOWN)
319
-
dev_err(&urb->dev->dev, "stat urb: status %d\n", status);
320
-
goto out;
321
-
}
322
-
323
-
idx = be16_to_cpup(&iu->tag) - 1;
324
324
if (idx >= MAX_CMNDS || !devinfo->cmnd[idx]) {
325
325
dev_err(&urb->dev->dev,
326
326
"stat urb: no pending cmd for uas-tag %d\n", idx + 1);
···
375
375
default:
376
376
uas_log_cmd_state(cmnd, "bogus IU", iu->iu_id);
377
377
}
378
-
out:
379
-
usb_free_urb(urb);
380
378
spin_unlock_irqrestore(&devinfo->lock, flags);
379
+
usb_free_urb(urb);
381
380
382
381
/* Unlinking of data urbs must be done without holding the lock */
383
382
if (data_in_urb) {
···
387
388
usb_unlink_urb(data_out_urb);
388
389
usb_put_urb(data_out_urb);
389
390
}
391
+
return;
392
+
393
+
out:
394
+
spin_unlock_irqrestore(&devinfo->lock, flags);
395
+
bail:
396
+
usb_free_urb(urb);
390
397
}
391
398
392
399
static void uas_data_cmplt(struct urb *urb)
···
434
429
}
435
430
uas_try_complete(cmnd, __func__);
436
431
out:
437
-
usb_free_urb(urb);
438
432
spin_unlock_irqrestore(&devinfo->lock, flags);
433
+
usb_free_urb(urb);
439
434
}
440
435
441
436
static void uas_cmd_cmplt(struct urb *urb)
···
1275
1270
{
1276
1271
int rv;
1277
1272
1278
-
workqueue = alloc_workqueue("uas", WQ_MEM_RECLAIM, 0);
1273
+
workqueue = alloc_workqueue("uas", WQ_MEM_RECLAIM | WQ_PERCPU, 0);
1279
1274
if (!workqueue)
1280
1275
return -ENOMEM;
1281
1276
+1
-1
drivers/usb/storage/unusual_uas.h
+1
-1
drivers/usb/storage/unusual_uas.h
···
98
98
US_FL_NO_ATA_1X),
99
99
100
100
/* Reported-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> */
101
-
UNUSUAL_DEV(0x13fd, 0x3940, 0x0000, 0x9999,
101
+
UNUSUAL_DEV(0x13fd, 0x3940, 0x0309, 0x0309,
102
102
"Initio Corporation",
103
103
"INIC-3069",
104
104
USB_SC_DEVICE, USB_PR_DEVICE, NULL,
+3
-1
drivers/usb/typec/altmodes/displayport.c
+3
-1
drivers/usb/typec/altmodes/displayport.c
···
758
758
struct fwnode_handle *fwnode;
759
759
struct dp_altmode *dp;
760
760
761
-
/* FIXME: Port can only be DFP_U. */
761
+
/* Port can only be DFP_U. */
762
+
if (typec_altmode_get_data_role(alt) != TYPEC_HOST)
763
+
return -EPROTO;
762
764
763
765
/* Make sure we have compatible pin configurations */
764
766
if (!(DP_CAP_PIN_ASSIGN_DFP_D(port->vdo) &
+1
-2
drivers/usb/typec/anx7411.c
+1
-2
drivers/usb/typec/anx7411.c
···
1516
1516
1517
1517
INIT_WORK(&plat->work, anx7411_work_func);
1518
1518
plat->workqueue = alloc_workqueue("anx7411_work",
1519
-
WQ_FREEZABLE |
1520
-
WQ_MEM_RECLAIM,
1519
+
WQ_FREEZABLE | WQ_MEM_RECLAIM | WQ_PERCPU,
1521
1520
1);
1522
1521
if (!plat->workqueue) {
1523
1522
dev_err(dev, "fail to create work queue\n");
+13
drivers/usb/typec/class.c
+13
drivers/usb/typec/class.c
···
2121
2121
EXPORT_SYMBOL_GPL(typec_set_data_role);
2122
2122
2123
2123
/**
2124
+
* typec_get_data_role - Get port data role
2125
+
* @port: The USB Type-C Port to query
2126
+
*
2127
+
* This routine is used by the altmode drivers to determine if the port is the
2128
+
* DFP before issuing Enter Mode
2129
+
*/
2130
+
enum typec_data_role typec_get_data_role(struct typec_port *port)
2131
+
{
2132
+
return port->data_role;
2133
+
}
2134
+
EXPORT_SYMBOL_GPL(typec_get_data_role);
2135
+
2136
+
/**
2124
2137
* typec_set_pwr_role - Report power role change
2125
2138
* @port: The USB Type-C Port where the role was changed
2126
2139
* @role: The new data role
+73
-2
drivers/usb/typec/hd3ss3220.c
+73
-2
drivers/usb/typec/hd3ss3220.c
···
15
15
#include <linux/usb/typec.h>
16
16
#include <linux/delay.h>
17
17
#include <linux/workqueue.h>
18
+
#include <linux/gpio/consumer.h>
19
+
#include <linux/regulator/consumer.h>
20
+
#include <linux/of_graph.h>
18
21
19
22
#define HD3SS3220_REG_CN_STAT 0x08
20
23
#define HD3SS3220_REG_CN_STAT_CTRL 0x09
···
57
54
struct delayed_work output_poll_work;
58
55
enum usb_role role_state;
59
56
bool poll;
57
+
58
+
struct gpio_desc *id_gpiod;
59
+
int id_irq;
60
+
61
+
struct regulator *vbus;
60
62
};
61
63
62
64
static int hd3ss3220_set_power_opmode(struct hd3ss3220 *hd3ss3220, int power_opmode)
···
327
319
.max_register = 0x0A,
328
320
};
329
321
322
+
static irqreturn_t hd3ss3220_id_isr(int irq, void *dev_id)
323
+
{
324
+
struct hd3ss3220 *hd3ss3220 = dev_id;
325
+
int ret;
326
+
int id;
327
+
328
+
id = gpiod_get_value_cansleep(hd3ss3220->id_gpiod);
329
+
if (!id)
330
+
ret = regulator_enable(hd3ss3220->vbus);
331
+
else
332
+
ret = regulator_disable(hd3ss3220->vbus);
333
+
334
+
if (ret)
335
+
dev_err(hd3ss3220->dev,
336
+
"vbus regulator %s failed: %d\n", id ? "disable" : "enable", ret);
337
+
338
+
return IRQ_HANDLED;
339
+
}
340
+
330
341
static int hd3ss3220_probe(struct i2c_client *client)
331
342
{
332
343
struct typec_capability typec_cap = { };
333
-
struct hd3ss3220 *hd3ss3220;
334
344
struct fwnode_handle *connector, *ep;
335
-
int ret;
345
+
struct hd3ss3220 *hd3ss3220;
346
+
struct regulator *vbus;
336
347
unsigned int data;
348
+
int ret;
337
349
338
350
hd3ss3220 = devm_kzalloc(&client->dev, sizeof(struct hd3ss3220),
339
351
GFP_KERNEL);
···
385
357
if (IS_ERR(hd3ss3220->role_sw)) {
386
358
ret = PTR_ERR(hd3ss3220->role_sw);
387
359
goto err_put_fwnode;
360
+
}
361
+
362
+
vbus = devm_of_regulator_get_optional(hd3ss3220->dev,
363
+
to_of_node(connector),
364
+
"vbus");
365
+
if (IS_ERR(vbus) && vbus != ERR_PTR(-ENODEV)) {
366
+
ret = PTR_ERR(vbus);
367
+
dev_err(hd3ss3220->dev, "failed to get vbus: %d", ret);
368
+
goto err_put_fwnode;
369
+
}
370
+
371
+
hd3ss3220->vbus = (vbus == ERR_PTR(-ENODEV) ? NULL : vbus);
372
+
373
+
if (hd3ss3220->vbus) {
374
+
hd3ss3220->id_gpiod = devm_gpiod_get_optional(hd3ss3220->dev,
375
+
"id",
376
+
GPIOD_IN);
377
+
if (IS_ERR(hd3ss3220->id_gpiod)) {
378
+
ret = PTR_ERR(hd3ss3220->id_gpiod);
379
+
goto err_put_fwnode;
380
+
}
381
+
}
382
+
383
+
if (hd3ss3220->id_gpiod) {
384
+
hd3ss3220->id_irq = gpiod_to_irq(hd3ss3220->id_gpiod);
385
+
if (hd3ss3220->id_irq < 0) {
386
+
ret = hd3ss3220->id_irq;
387
+
dev_err(hd3ss3220->dev,
388
+
"failed to get ID gpio: %d\n",
389
+
hd3ss3220->id_irq);
390
+
goto err_put_fwnode;
391
+
}
392
+
393
+
ret = devm_request_threaded_irq(hd3ss3220->dev,
394
+
hd3ss3220->id_irq, NULL,
395
+
hd3ss3220_id_isr,
396
+
IRQF_TRIGGER_RISING |
397
+
IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
398
+
dev_name(hd3ss3220->dev), hd3ss3220);
399
+
if (ret < 0) {
400
+
dev_err(hd3ss3220->dev, "failed to get ID irq: %d\n", ret);
401
+
goto err_put_fwnode;
402
+
}
388
403
}
389
404
390
405
typec_cap.prefer_role = TYPEC_NO_PREFERRED_ROLE;
+80
-47
drivers/usb/typec/mux/ps883x.c
+80
-47
drivers/usb/typec/mux/ps883x.c
···
14
14
#include <linux/mutex.h>
15
15
#include <linux/regmap.h>
16
16
#include <linux/regulator/consumer.h>
17
+
#include <linux/usb/pd.h>
17
18
#include <linux/usb/typec_altmode.h>
18
19
#include <linux/usb/typec_dp.h>
19
20
#include <linux/usb/typec_mux.h>
20
21
#include <linux/usb/typec_retimer.h>
22
+
#include <linux/usb/typec_tbt.h>
21
23
22
24
#define REG_USB_PORT_CONN_STATUS_0 0x00
23
25
24
26
#define CONN_STATUS_0_CONNECTION_PRESENT BIT(0)
25
27
#define CONN_STATUS_0_ORIENTATION_REVERSED BIT(1)
28
+
#define CONN_STATUS_0_ACTIVE_CABLE BIT(2)
26
29
#define CONN_STATUS_0_USB_3_1_CONNECTED BIT(5)
27
30
28
31
#define REG_USB_PORT_CONN_STATUS_1 0x01
···
36
33
#define CONN_STATUS_1_DP_HPD_LEVEL BIT(7)
37
34
38
35
#define REG_USB_PORT_CONN_STATUS_2 0x02
36
+
37
+
#define CONN_STATUS_2_TBT_CONNECTED BIT(0)
38
+
#define CONN_STATUS_2_TBT_UNIDIR_LSRX_ACT_LT BIT(4)
39
+
#define CONN_STATUS_2_USB4_CONNECTED BIT(7)
39
40
40
41
struct ps883x_retimer {
41
42
struct i2c_client *client;
···
61
54
struct mutex lock; /* protect non-concurrent retimer & switch */
62
55
63
56
enum typec_orientation orientation;
64
-
unsigned long mode;
65
-
unsigned int svid;
57
+
u8 cfg0;
58
+
u8 cfg1;
59
+
u8 cfg2;
66
60
};
67
61
68
62
static int ps883x_configure(struct ps883x_retimer *retimer, int cfg0,
···
71
63
{
72
64
struct device *dev = &retimer->client->dev;
73
65
int ret;
66
+
67
+
if (retimer->cfg0 == cfg0 && retimer->cfg1 == cfg1 && retimer->cfg2 == cfg2)
68
+
return 0;
74
69
75
70
ret = regmap_write(retimer->regmap, REG_USB_PORT_CONN_STATUS_0, cfg0);
76
71
if (ret) {
···
93
82
return ret;
94
83
}
95
84
85
+
retimer->cfg0 = cfg0;
86
+
retimer->cfg1 = cfg1;
87
+
retimer->cfg2 = cfg2;
88
+
96
89
return 0;
97
90
}
98
91
99
-
static int ps883x_set(struct ps883x_retimer *retimer)
92
+
static int ps883x_set(struct ps883x_retimer *retimer, struct typec_retimer_state *state)
100
93
{
94
+
struct typec_thunderbolt_data *tb_data;
95
+
const struct enter_usb_data *eudo_data;
101
96
int cfg0 = CONN_STATUS_0_CONNECTION_PRESENT;
102
97
int cfg1 = 0x00;
103
98
int cfg2 = 0x00;
104
99
105
-
if (retimer->orientation == TYPEC_ORIENTATION_NONE ||
106
-
retimer->mode == TYPEC_STATE_SAFE) {
107
-
return ps883x_configure(retimer, cfg0, cfg1, cfg2);
108
-
}
109
-
110
-
if (retimer->mode != TYPEC_STATE_USB && retimer->svid != USB_TYPEC_DP_SID)
111
-
return -EINVAL;
112
-
113
100
if (retimer->orientation == TYPEC_ORIENTATION_REVERSE)
114
101
cfg0 |= CONN_STATUS_0_ORIENTATION_REVERSED;
115
102
116
-
switch (retimer->mode) {
117
-
case TYPEC_STATE_USB:
118
-
cfg0 |= CONN_STATUS_0_USB_3_1_CONNECTED;
119
-
break;
103
+
if (state->alt) {
104
+
switch (state->alt->svid) {
105
+
case USB_TYPEC_DP_SID:
106
+
cfg1 |= CONN_STATUS_1_DP_CONNECTED |
107
+
CONN_STATUS_1_DP_HPD_LEVEL;
120
108
121
-
case TYPEC_DP_STATE_C:
122
-
cfg1 = CONN_STATUS_1_DP_CONNECTED |
123
-
CONN_STATUS_1_DP_SINK_REQUESTED |
124
-
CONN_STATUS_1_DP_PIN_ASSIGNMENT_C_D |
125
-
CONN_STATUS_1_DP_HPD_LEVEL;
126
-
break;
109
+
switch (state->mode) {
110
+
case TYPEC_DP_STATE_C:
111
+
cfg1 |= CONN_STATUS_1_DP_SINK_REQUESTED |
112
+
CONN_STATUS_1_DP_PIN_ASSIGNMENT_C_D;
113
+
fallthrough;
114
+
case TYPEC_DP_STATE_D:
115
+
cfg1 |= CONN_STATUS_0_USB_3_1_CONNECTED;
116
+
break;
117
+
default: /* MODE_E */
118
+
break;
119
+
}
120
+
break;
121
+
case USB_TYPEC_TBT_SID:
122
+
tb_data = state->data;
127
123
128
-
case TYPEC_DP_STATE_D:
129
-
cfg0 |= CONN_STATUS_0_USB_3_1_CONNECTED;
130
-
cfg1 = CONN_STATUS_1_DP_CONNECTED |
131
-
CONN_STATUS_1_DP_SINK_REQUESTED |
132
-
CONN_STATUS_1_DP_PIN_ASSIGNMENT_C_D |
133
-
CONN_STATUS_1_DP_HPD_LEVEL;
134
-
break;
124
+
/* Unconditional */
125
+
cfg2 |= CONN_STATUS_2_TBT_CONNECTED;
135
126
136
-
case TYPEC_DP_STATE_E:
137
-
cfg1 = CONN_STATUS_1_DP_CONNECTED |
138
-
CONN_STATUS_1_DP_HPD_LEVEL;
139
-
break;
127
+
if (tb_data->cable_mode & TBT_CABLE_ACTIVE_PASSIVE)
128
+
cfg0 |= CONN_STATUS_0_ACTIVE_CABLE;
140
129
141
-
default:
142
-
return -EOPNOTSUPP;
130
+
if (tb_data->enter_vdo & TBT_ENTER_MODE_UNI_DIR_LSRX)
131
+
cfg2 |= CONN_STATUS_2_TBT_UNIDIR_LSRX_ACT_LT;
132
+
break;
133
+
default:
134
+
dev_err(&retimer->client->dev, "Got unsupported SID: 0x%x\n",
135
+
state->alt->svid);
136
+
return -EOPNOTSUPP;
137
+
}
138
+
} else {
139
+
switch (state->mode) {
140
+
case TYPEC_STATE_SAFE:
141
+
/* USB2 pins don't even go through this chip */
142
+
case TYPEC_MODE_USB2:
143
+
break;
144
+
case TYPEC_STATE_USB:
145
+
case TYPEC_MODE_USB3:
146
+
cfg0 |= CONN_STATUS_0_USB_3_1_CONNECTED;
147
+
break;
148
+
case TYPEC_MODE_USB4:
149
+
eudo_data = state->data;
150
+
151
+
cfg2 |= CONN_STATUS_2_USB4_CONNECTED;
152
+
153
+
if (FIELD_GET(EUDO_CABLE_TYPE_MASK, eudo_data->eudo) != EUDO_CABLE_TYPE_PASSIVE)
154
+
cfg0 |= CONN_STATUS_0_ACTIVE_CABLE;
155
+
break;
156
+
default:
157
+
dev_err(&retimer->client->dev, "Got unsupported mode: %lu\n",
158
+
state->mode);
159
+
return -EOPNOTSUPP;
160
+
}
143
161
}
144
162
145
163
return ps883x_configure(retimer, cfg0, cfg1, cfg2);
···
189
149
if (retimer->orientation != orientation) {
190
150
retimer->orientation = orientation;
191
151
192
-
ret = ps883x_set(retimer);
152
+
ret = regmap_assign_bits(retimer->regmap, REG_USB_PORT_CONN_STATUS_0,
153
+
CONN_STATUS_0_ORIENTATION_REVERSED,
154
+
orientation == TYPEC_ORIENTATION_REVERSE);
155
+
if (ret)
156
+
dev_err(&retimer->client->dev, "failed to set orientation: %d\n", ret);
193
157
}
194
158
195
159
mutex_unlock(&retimer->lock);
···
209
165
int ret = 0;
210
166
211
167
mutex_lock(&retimer->lock);
212
-
213
-
if (state->mode != retimer->mode) {
214
-
retimer->mode = state->mode;
215
-
216
-
if (state->alt)
217
-
retimer->svid = state->alt->svid;
218
-
else
219
-
retimer->svid = 0;
220
-
221
-
ret = ps883x_set(retimer);
222
-
}
223
-
168
+
ret = ps883x_set(retimer, state);
224
169
mutex_unlock(&retimer->lock);
225
170
226
171
if (ret)
+90
-5
drivers/usb/typec/pd.c
+90
-5
drivers/usb/typec/pd.c
···
360
360
};
361
361
362
362
/* -------------------------------------------------------------------------- */
363
+
/* Standard Power Range (SPR) Adjustable Voltage Supply (AVS) */
364
+
365
+
static ssize_t
366
+
spr_avs_9v_to_15v_max_current_show(struct device *dev,
367
+
struct device_attribute *attr, char *buf)
368
+
{
369
+
return sysfs_emit(buf, "%umA\n",
370
+
pdo_spr_avs_apdo_9v_to_15v_max_current_ma(to_pdo(dev)->pdo));
371
+
}
372
+
373
+
static ssize_t
374
+
spr_avs_15v_to_20v_max_current_show(struct device *dev,
375
+
struct device_attribute *attr, char *buf)
376
+
{
377
+
return sysfs_emit(buf, "%umA\n",
378
+
pdo_spr_avs_apdo_15v_to_20v_max_current_ma(to_pdo(dev)->pdo));
379
+
}
380
+
381
+
static ssize_t
382
+
spr_avs_src_peak_current_show(struct device *dev,
383
+
struct device_attribute *attr, char *buf)
384
+
{
385
+
return sysfs_emit(buf, "%u\n",
386
+
pdo_spr_avs_apdo_src_peak_current(to_pdo(dev)->pdo));
387
+
}
388
+
389
+
static struct device_attribute spr_avs_9v_to_15v_max_current_attr = {
390
+
.attr = {
391
+
.name = "maximum_current_9V_to_15V",
392
+
.mode = 0444,
393
+
},
394
+
.show = spr_avs_9v_to_15v_max_current_show,
395
+
};
396
+
397
+
static struct device_attribute spr_avs_15v_to_20v_max_current_attr = {
398
+
.attr = {
399
+
.name = "maximum_current_15V_to_20V",
400
+
.mode = 0444,
401
+
},
402
+
.show = spr_avs_15v_to_20v_max_current_show,
403
+
};
404
+
405
+
static struct device_attribute spr_avs_src_peak_current_attr = {
406
+
.attr = {
407
+
.name = "peak_current",
408
+
.mode = 0444,
409
+
},
410
+
.show = spr_avs_src_peak_current_show,
411
+
};
412
+
413
+
static struct attribute *source_spr_avs_attrs[] = {
414
+
&spr_avs_9v_to_15v_max_current_attr.attr,
415
+
&spr_avs_15v_to_20v_max_current_attr.attr,
416
+
&spr_avs_src_peak_current_attr.attr,
417
+
NULL
418
+
};
419
+
ATTRIBUTE_GROUPS(source_spr_avs);
420
+
421
+
static const struct device_type source_spr_avs_type = {
422
+
.name = "pdo",
423
+
.release = pdo_release,
424
+
.groups = source_spr_avs_groups,
425
+
};
426
+
427
+
static struct attribute *sink_spr_avs_attrs[] = {
428
+
&spr_avs_9v_to_15v_max_current_attr.attr,
429
+
&spr_avs_15v_to_20v_max_current_attr.attr,
430
+
NULL
431
+
};
432
+
ATTRIBUTE_GROUPS(sink_spr_avs);
433
+
434
+
static const struct device_type sink_spr_avs_type = {
435
+
.name = "pdo",
436
+
.release = pdo_release,
437
+
.groups = sink_spr_avs_groups,
438
+
};
439
+
440
+
/* -------------------------------------------------------------------------- */
363
441
364
442
static const char * const supply_name[] = {
365
443
[PDO_TYPE_FIXED] = "fixed_supply",
···
446
368
};
447
369
448
370
static const char * const apdo_supply_name[] = {
449
-
[APDO_TYPE_PPS] = "programmable_supply",
371
+
[APDO_TYPE_PPS] = "programmable_supply",
372
+
[APDO_TYPE_SPR_AVS] = "spr_adjustable_voltage_supply",
450
373
};
451
374
452
375
static const struct device_type *source_type[] = {
···
457
378
};
458
379
459
380
static const struct device_type *source_apdo_type[] = {
460
-
[APDO_TYPE_PPS] = &source_pps_type,
381
+
[APDO_TYPE_PPS] = &source_pps_type,
382
+
[APDO_TYPE_SPR_AVS] = &source_spr_avs_type,
461
383
};
462
384
463
385
static const struct device_type *sink_type[] = {
···
468
388
};
469
389
470
390
static const struct device_type *sink_apdo_type[] = {
471
-
[APDO_TYPE_PPS] = &sink_pps_type,
391
+
[APDO_TYPE_PPS] = &sink_pps_type,
392
+
[APDO_TYPE_SPR_AVS] = &sink_spr_avs_type,
472
393
};
473
394
474
395
/* REVISIT: Export when EPR_*_Capabilities need to be supported. */
···
488
407
p->object_position = position;
489
408
490
409
if (pdo_type(pdo) == PDO_TYPE_APDO) {
491
-
/* FIXME: Only PPS supported for now! Skipping others. */
492
-
if (pdo_apdo_type(pdo) > APDO_TYPE_PPS) {
410
+
/*
411
+
* FIXME: Only PPS, SPR_AVS supported for now!
412
+
* Skipping others.
413
+
*/
414
+
if (pdo_apdo_type(pdo) != APDO_TYPE_PPS &&
415
+
pdo_apdo_type(pdo) != APDO_TYPE_SPR_AVS) {
493
416
dev_warn(&cap->dev, "Unknown APDO type. PDO 0x%08x\n", pdo);
494
417
kfree(p);
495
418
return 0;
+14
-1
drivers/usb/typec/tcpm/tcpm.c
+14
-1
drivers/usb/typec/tcpm/tcpm.c
···
823
823
case PDO_TYPE_APDO:
824
824
if (pdo_apdo_type(pdo) == APDO_TYPE_PPS)
825
825
scnprintf(msg, sizeof(msg),
826
-
"%u-%u mV, %u mA",
826
+
"PPS %u-%u mV, %u mA",
827
827
pdo_pps_apdo_min_voltage(pdo),
828
828
pdo_pps_apdo_max_voltage(pdo),
829
829
pdo_pps_apdo_max_current(pdo));
830
+
else if (pdo_apdo_type(pdo) == APDO_TYPE_EPR_AVS)
831
+
scnprintf(msg, sizeof(msg),
832
+
"EPR AVS %u-%u mV %u W peak_current: %u",
833
+
pdo_epr_avs_apdo_min_voltage_mv(pdo),
834
+
pdo_epr_avs_apdo_max_voltage_mv(pdo),
835
+
pdo_epr_avs_apdo_pdp_w(pdo),
836
+
pdo_epr_avs_apdo_src_peak_current(pdo));
837
+
else if (pdo_apdo_type(pdo) == APDO_TYPE_SPR_AVS)
838
+
scnprintf(msg, sizeof(msg),
839
+
"SPR AVS 9-15 V: %u mA 15-20 V: %u mA peak_current: %u",
840
+
pdo_spr_avs_apdo_9v_to_15v_max_current_ma(pdo),
841
+
pdo_spr_avs_apdo_15v_to_20v_max_current_ma(pdo),
842
+
pdo_spr_avs_apdo_src_peak_current(pdo));
830
843
else
831
844
strcpy(msg, "undefined APDO");
832
845
break;
+11
-4
drivers/usb/typec/tipd/core.c
+11
-4
drivers/usb/typec/tipd/core.c
···
577
577
int ret;
578
578
579
579
ret = tps6598x_read_data_status(tps);
580
-
if (ret < 0)
580
+
if (!ret)
581
581
return false;
582
582
583
583
if (tps->data_status & TPS_DATA_STATUS_DP_CONNECTION) {
584
584
ret = tps6598x_block_read(tps, TPS_REG_DP_SID_STATUS,
585
585
&cd321x->dp_sid_status, sizeof(cd321x->dp_sid_status));
586
-
if (ret)
586
+
if (ret) {
587
587
dev_err(tps->dev, "Failed to read DP SID Status: %d\n",
588
588
ret);
589
+
return false;
590
+
}
589
591
}
590
592
591
593
if (tps->data_status & TPS_DATA_STATUS_TBT_CONNECTION) {
592
594
ret = tps6598x_block_read(tps, TPS_REG_INTEL_VID_STATUS,
593
595
&cd321x->intel_vid_status, sizeof(cd321x->intel_vid_status));
594
-
if (ret)
596
+
if (ret) {
595
597
dev_err(tps->dev, "Failed to read Intel VID Status: %d\n", ret);
598
+
return false;
599
+
}
596
600
}
597
601
598
602
if (tps->data_status & CD321X_DATA_STATUS_USB4_CONNECTION) {
599
603
ret = tps6598x_block_read(tps, TPS_REG_USB4_STATUS,
600
604
&cd321x->usb4_status, sizeof(cd321x->usb4_status));
601
-
if (ret)
605
+
if (ret) {
602
606
dev_err(tps->dev,
603
607
"Failed to read USB4 Status: %d\n", ret);
608
+
return false;
609
+
}
604
610
}
605
611
606
612
return true;
···
1701
1695
typec_cap.data = ret;
1702
1696
typec_cap.revision = USB_TYPEC_REV_1_3;
1703
1697
typec_cap.pd_revision = 0x300;
1698
+
typec_cap.orientation_aware = true;
1704
1699
typec_cap.driver_data = tps;
1705
1700
typec_cap.ops = &tps6598x_ops;
1706
1701
typec_cap.fwnode = fwnode;
+2
-3
drivers/usb/typec/ucsi/cros_ec_ucsi.c
+2
-3
drivers/usb/typec/ucsi/cros_ec_ucsi.c
···
105
105
return 0;
106
106
}
107
107
108
-
static int cros_ucsi_sync_control(struct ucsi *ucsi, u64 cmd, u32 *cci,
109
-
void *data, size_t size)
108
+
static int cros_ucsi_sync_control(struct ucsi *ucsi, u64 cmd, u32 *cci)
110
109
{
111
110
struct cros_ucsi_data *udata = ucsi_get_drvdata(ucsi);
112
111
int ret;
113
112
114
-
ret = ucsi_sync_control_common(ucsi, cmd, cci, data, size);
113
+
ret = ucsi_sync_control_common(ucsi, cmd, cci);
115
114
switch (ret) {
116
115
case -EBUSY:
117
116
/* EC may return -EBUSY if CCI.busy is set.
+33
-4
drivers/usb/typec/ucsi/debugfs.c
+33
-4
drivers/usb/typec/ucsi/debugfs.c
···
35
35
case UCSI_SET_SINK_PATH:
36
36
case UCSI_SET_NEW_CAM:
37
37
case UCSI_SET_USB:
38
+
case UCSI_SET_POWER_LEVEL:
38
39
case UCSI_READ_POWER_LEVEL:
39
-
ret = ucsi_send_command(ucsi, val, NULL, 0);
40
+
case UCSI_SET_PDOS:
41
+
ucsi->message_in_size = 0;
42
+
ret = ucsi_send_command(ucsi, val);
40
43
break;
41
44
case UCSI_GET_CAPABILITY:
42
45
case UCSI_GET_CONNECTOR_CAPABILITY:
···
54
51
case UCSI_GET_ATTENTION_VDO:
55
52
case UCSI_GET_CAM_CS:
56
53
case UCSI_GET_LPM_PPM_INFO:
57
-
ret = ucsi_send_command(ucsi, val,
58
-
&ucsi->debugfs->response,
59
-
sizeof(ucsi->debugfs->response));
54
+
ucsi->message_in_size = sizeof(ucsi->debugfs->response);
55
+
ret = ucsi_send_command(ucsi, val);
56
+
memcpy(&ucsi->debugfs->response, ucsi->message_in, sizeof(ucsi->debugfs->response));
60
57
break;
61
58
default:
62
59
ret = -EOPNOTSUPP;
···
111
108
}
112
109
DEFINE_SHOW_ATTRIBUTE(ucsi_vbus_volt);
113
110
111
+
static ssize_t ucsi_message_out_write(struct file *file,
112
+
const char __user *data, size_t count, loff_t *ppos)
113
+
{
114
+
struct ucsi *ucsi = file->private_data;
115
+
int ret;
116
+
117
+
char *buf __free(kfree) = memdup_user_nul(data, count);
118
+
if (IS_ERR(buf))
119
+
return PTR_ERR(buf);
120
+
121
+
ucsi->message_out_size = min(count / 2, UCSI_MAX_MESSAGE_OUT_LENGTH);
122
+
ret = hex2bin(ucsi->message_out, buf, ucsi->message_out_size);
123
+
if (ret)
124
+
return ret;
125
+
126
+
return count;
127
+
}
128
+
129
+
static const struct file_operations ucsi_message_out_fops = {
130
+
.open = simple_open,
131
+
.write = ucsi_message_out_write,
132
+
.llseek = generic_file_llseek,
133
+
};
134
+
114
135
void ucsi_debugfs_register(struct ucsi *ucsi)
115
136
{
116
137
ucsi->debugfs = kzalloc(sizeof(*ucsi->debugfs), GFP_KERNEL);
···
147
120
debugfs_create_file("peak_current", 0400, ucsi->debugfs->dentry, ucsi, &ucsi_peak_curr_fops);
148
121
debugfs_create_file("avg_current", 0400, ucsi->debugfs->dentry, ucsi, &ucsi_avg_curr_fops);
149
122
debugfs_create_file("vbus_voltage", 0400, ucsi->debugfs->dentry, ucsi, &ucsi_vbus_volt_fops);
123
+
debugfs_create_file("message_out", 0200, ucsi->debugfs->dentry, ucsi,
124
+
&ucsi_message_out_fops);
150
125
}
151
126
152
127
void ucsi_debugfs_unregister(struct ucsi *ucsi)
+8
-3
drivers/usb/typec/ucsi/displayport.c
+8
-3
drivers/usb/typec/ucsi/displayport.c
···
67
67
}
68
68
69
69
command = UCSI_GET_CURRENT_CAM | UCSI_CONNECTOR_NUMBER(dp->con->num);
70
-
ret = ucsi_send_command(ucsi, command, &cur, sizeof(cur));
70
+
ucsi->message_in_size = sizeof(cur);
71
+
ret = ucsi_send_command(ucsi, command);
71
72
if (ret < 0) {
72
73
if (ucsi->version > 0x0100)
73
74
goto err_unlock;
74
75
cur = 0xff;
76
+
} else {
77
+
memcpy(&cur, ucsi->message_in, ucsi->message_in_size);
75
78
}
76
79
77
80
if (cur != 0xff) {
···
129
126
}
130
127
131
128
command = UCSI_CMD_SET_NEW_CAM(dp->con->num, 0, dp->offset, 0);
132
-
ret = ucsi_send_command(dp->con->ucsi, command, NULL, 0);
129
+
dp->con->ucsi->message_in_size = 0;
130
+
ret = ucsi_send_command(dp->con->ucsi, command);
133
131
if (ret < 0)
134
132
goto out_unlock;
135
133
···
197
193
198
194
command = UCSI_CMD_SET_NEW_CAM(dp->con->num, 1, dp->offset, pins);
199
195
200
-
return ucsi_send_command(dp->con->ucsi, command, NULL, 0);
196
+
dp->con->ucsi->message_in_size = 0;
197
+
return ucsi_send_command(dp->con->ucsi, command);
201
198
}
202
199
203
200
static int ucsi_displayport_vdm(struct typec_altmode *alt,
+26
drivers/usb/typec/ucsi/psy.c
+26
drivers/usb/typec/ucsi/psy.c
···
29
29
POWER_SUPPLY_PROP_CURRENT_MAX,
30
30
POWER_SUPPLY_PROP_CURRENT_NOW,
31
31
POWER_SUPPLY_PROP_SCOPE,
32
+
POWER_SUPPLY_PROP_STATUS,
32
33
};
33
34
34
35
static int ucsi_psy_get_scope(struct ucsi_connector *con,
···
49
48
scope = POWER_SUPPLY_SCOPE_DEVICE;
50
49
}
51
50
val->intval = scope;
51
+
return 0;
52
+
}
53
+
54
+
static int ucsi_psy_get_status(struct ucsi_connector *con,
55
+
union power_supply_propval *val)
56
+
{
57
+
bool is_sink = UCSI_CONSTAT(con, PWR_DIR) == TYPEC_SINK;
58
+
bool sink_path_enabled = true;
59
+
60
+
val->intval = POWER_SUPPLY_STATUS_NOT_CHARGING;
61
+
62
+
if (con->ucsi->version >= UCSI_VERSION_2_0)
63
+
sink_path_enabled =
64
+
UCSI_CONSTAT(con, SINK_PATH_STATUS_V2_0) ==
65
+
UCSI_CONSTAT_SINK_PATH_ENABLED;
66
+
67
+
if (UCSI_CONSTAT(con, CONNECTED)) {
68
+
if (is_sink && sink_path_enabled)
69
+
val->intval = POWER_SUPPLY_STATUS_CHARGING;
70
+
else if (!is_sink)
71
+
val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
72
+
}
73
+
52
74
return 0;
53
75
}
54
76
···
274
250
return ucsi_psy_get_current_now(con, val);
275
251
case POWER_SUPPLY_PROP_SCOPE:
276
252
return ucsi_psy_get_scope(con, val);
253
+
case POWER_SUPPLY_PROP_STATUS:
254
+
return ucsi_psy_get_status(con, val);
277
255
default:
278
256
return -EINVAL;
279
257
}
+119
-37
drivers/usb/typec/ucsi/ucsi.c
+119
-37
drivers/usb/typec/ucsi/ucsi.c
···
55
55
}
56
56
EXPORT_SYMBOL_GPL(ucsi_notify_common);
57
57
58
-
int ucsi_sync_control_common(struct ucsi *ucsi, u64 command, u32 *cci,
59
-
void *data, size_t size)
58
+
int ucsi_sync_control_common(struct ucsi *ucsi, u64 command, u32 *cci)
60
59
{
61
60
bool ack = UCSI_COMMAND(command) == UCSI_ACK_CC_CI;
62
61
int ret;
···
66
67
set_bit(COMMAND_PENDING, &ucsi->flags);
67
68
68
69
reinit_completion(&ucsi->complete);
70
+
71
+
if (ucsi->message_out_size > 0) {
72
+
if (!ucsi->ops->write_message_out) {
73
+
ucsi->message_out_size = 0;
74
+
ret = -EOPNOTSUPP;
75
+
goto out_clear_bit;
76
+
}
77
+
78
+
ret = ucsi->ops->write_message_out(ucsi, ucsi->message_out,
79
+
ucsi->message_out_size);
80
+
ucsi->message_out_size = 0;
81
+
if (ret)
82
+
goto out_clear_bit;
83
+
}
69
84
70
85
ret = ucsi->ops->async_control(ucsi, command);
71
86
if (ret)
···
97
84
if (!ret && cci)
98
85
ret = ucsi->ops->read_cci(ucsi, cci);
99
86
100
-
if (!ret && data &&
87
+
if (!ret && ucsi->message_in_size > 0 &&
101
88
(*cci & UCSI_CCI_COMMAND_COMPLETE))
102
-
ret = ucsi->ops->read_message_in(ucsi, data, size);
89
+
ret = ucsi->ops->read_message_in(ucsi, ucsi->message_in,
90
+
ucsi->message_in_size);
103
91
104
92
return ret;
105
93
}
···
117
103
ctrl |= UCSI_ACK_CONNECTOR_CHANGE;
118
104
}
119
105
120
-
return ucsi->ops->sync_control(ucsi, ctrl, NULL, NULL, 0);
106
+
ucsi->message_in_size = 0;
107
+
return ucsi->ops->sync_control(ucsi, ctrl, NULL);
121
108
}
122
109
123
-
static int ucsi_run_command(struct ucsi *ucsi, u64 command, u32 *cci,
124
-
void *data, size_t size, bool conn_ack)
110
+
static int ucsi_run_command(struct ucsi *ucsi, u64 command, u32 *cci, bool conn_ack)
125
111
{
126
112
int ret, err;
127
113
128
114
*cci = 0;
129
115
130
-
if (size > UCSI_MAX_DATA_LENGTH(ucsi))
116
+
if (ucsi->message_in_size > UCSI_MAX_DATA_LENGTH(ucsi))
131
117
return -EINVAL;
132
118
133
-
ret = ucsi->ops->sync_control(ucsi, command, cci, data, size);
119
+
ret = ucsi->ops->sync_control(ucsi, command, cci);
134
120
135
-
if (*cci & UCSI_CCI_BUSY)
136
-
return ucsi_run_command(ucsi, UCSI_CANCEL, cci, NULL, 0, false) ?: -EBUSY;
121
+
if (*cci & UCSI_CCI_BUSY) {
122
+
ucsi->message_in_size = 0;
123
+
return ucsi_run_command(ucsi, UCSI_CANCEL, cci, false) ?: -EBUSY;
124
+
}
137
125
if (ret)
138
126
return ret;
139
127
···
167
151
int ret;
168
152
169
153
command = UCSI_GET_ERROR_STATUS | UCSI_CONNECTOR_NUMBER(connector_num);
170
-
ret = ucsi_run_command(ucsi, command, &cci, &error, sizeof(error), false);
154
+
ucsi->message_in_size = sizeof(error);
155
+
ret = ucsi_run_command(ucsi, command, &cci, false);
171
156
if (ret < 0)
172
157
return ret;
158
+
159
+
memcpy(&error, ucsi->message_in, sizeof(error));
173
160
174
161
switch (error) {
175
162
case UCSI_ERROR_INCOMPATIBLE_PARTNER:
···
219
200
return -EIO;
220
201
}
221
202
222
-
static int ucsi_send_command_common(struct ucsi *ucsi, u64 cmd,
223
-
void *data, size_t size, bool conn_ack)
203
+
static int ucsi_send_command_common(struct ucsi *ucsi, u64 cmd, bool conn_ack)
224
204
{
225
205
u8 connector_num;
226
206
u32 cci;
···
247
229
248
230
mutex_lock(&ucsi->ppm_lock);
249
231
250
-
ret = ucsi_run_command(ucsi, cmd, &cci, data, size, conn_ack);
232
+
ret = ucsi_run_command(ucsi, cmd, &cci, conn_ack);
251
233
252
234
if (cci & UCSI_CCI_ERROR)
253
235
ret = ucsi_read_error(ucsi, connector_num);
···
256
238
return ret;
257
239
}
258
240
259
-
int ucsi_send_command(struct ucsi *ucsi, u64 command,
260
-
void *data, size_t size)
241
+
int ucsi_send_command(struct ucsi *ucsi, u64 command)
261
242
{
262
-
return ucsi_send_command_common(ucsi, command, data, size, false);
243
+
return ucsi_send_command_common(ucsi, command, false);
263
244
}
264
245
EXPORT_SYMBOL_GPL(ucsi_send_command);
265
246
···
336
319
int i;
337
320
338
321
command = UCSI_GET_CURRENT_CAM | UCSI_CONNECTOR_NUMBER(con->num);
339
-
ret = ucsi_send_command(con->ucsi, command, &cur, sizeof(cur));
322
+
con->ucsi->message_in_size = sizeof(cur);
323
+
ret = ucsi_send_command(con->ucsi, command);
340
324
if (ret < 0) {
341
325
if (con->ucsi->version > 0x0100) {
342
326
dev_err(con->ucsi->dev,
···
345
327
return;
346
328
}
347
329
cur = 0xff;
330
+
} else {
331
+
memcpy(&cur, con->ucsi->message_in, sizeof(cur));
348
332
}
349
333
350
334
if (cur < UCSI_MAX_ALTMODES)
···
530
510
command |= UCSI_GET_ALTMODE_RECIPIENT(recipient);
531
511
command |= UCSI_GET_ALTMODE_CONNECTOR_NUMBER(con->num);
532
512
command |= UCSI_GET_ALTMODE_OFFSET(i);
533
-
len = ucsi_send_command(con->ucsi, command, &alt, sizeof(alt));
513
+
ucsi->message_in_size = sizeof(alt);
514
+
len = ucsi_send_command(con->ucsi, command);
534
515
/*
535
516
* We are collecting all altmodes first and then registering.
536
517
* Some type-C device will return zero length data beyond last
···
539
518
*/
540
519
if (len < 0)
541
520
return len;
521
+
522
+
memcpy(&alt, ucsi->message_in, sizeof(alt));
542
523
543
524
/* We got all altmodes, now break out and register them */
544
525
if (!len || !alt.svid)
···
609
586
command |= UCSI_GET_ALTMODE_RECIPIENT(recipient);
610
587
command |= UCSI_GET_ALTMODE_CONNECTOR_NUMBER(con->num);
611
588
command |= UCSI_GET_ALTMODE_OFFSET(i);
612
-
len = ucsi_send_command(con->ucsi, command, alt, sizeof(alt));
589
+
con->ucsi->message_in_size = sizeof(alt);
590
+
len = ucsi_send_command(con->ucsi, command);
613
591
if (len == -EBUSY)
614
592
continue;
615
593
if (len <= 0)
616
594
return len;
595
+
596
+
memcpy(&alt, con->ucsi->message_in, sizeof(alt));
617
597
618
598
/*
619
599
* This code is requesting one alt mode at a time, but some PPMs
···
685
659
UCSI_MAX_DATA_LENGTH(con->ucsi));
686
660
int ret;
687
661
688
-
ret = ucsi_send_command_common(con->ucsi, command, &con->status, size, conn_ack);
662
+
con->ucsi->message_in_size = size;
663
+
ret = ucsi_send_command_common(con->ucsi, command, conn_ack);
664
+
memcpy(&con->status, con->ucsi->message_in, size);
689
665
690
666
return ret < 0 ? ret : 0;
691
667
}
···
710
682
command |= UCSI_GET_PDOS_PDO_OFFSET(offset);
711
683
command |= UCSI_GET_PDOS_NUM_PDOS(num_pdos - 1);
712
684
command |= is_source(role) ? UCSI_GET_PDOS_SRC_PDOS : 0;
713
-
ret = ucsi_send_command(ucsi, command, pdos + offset,
714
-
num_pdos * sizeof(u32));
685
+
ucsi->message_in_size = num_pdos * sizeof(u32);
686
+
ret = ucsi_send_command(ucsi, command);
687
+
memcpy(pdos + offset, ucsi->message_in, num_pdos * sizeof(u32));
715
688
if (ret < 0 && ret != -ETIMEDOUT)
716
689
dev_err(ucsi->dev, "UCSI_GET_PDOS failed (%d)\n", ret);
717
690
···
799
770
command |= UCSI_GET_PD_MESSAGE_BYTES(len);
800
771
command |= UCSI_GET_PD_MESSAGE_TYPE(type);
801
772
802
-
ret = ucsi_send_command(con->ucsi, command, data + offset, len);
773
+
con->ucsi->message_in_size = len;
774
+
ret = ucsi_send_command(con->ucsi, command);
775
+
memcpy(data + offset, con->ucsi->message_in, len);
803
776
if (ret < 0)
804
777
return ret;
805
778
}
···
966
935
int ret;
967
936
968
937
command = UCSI_GET_CABLE_PROPERTY | UCSI_CONNECTOR_NUMBER(con->num);
969
-
ret = ucsi_send_command(con->ucsi, command, &cable_prop, sizeof(cable_prop));
938
+
con->ucsi->message_in_size = sizeof(cable_prop);
939
+
ret = ucsi_send_command(con->ucsi, command);
940
+
memcpy(&cable_prop, con->ucsi->message_in, sizeof(cable_prop));
970
941
if (ret < 0) {
971
942
dev_err(con->ucsi->dev, "GET_CABLE_PROPERTY failed (%d)\n", ret);
972
943
return ret;
···
1029
996
return 0;
1030
997
1031
998
command = UCSI_GET_CONNECTOR_CAPABILITY | UCSI_CONNECTOR_NUMBER(con->num);
1032
-
ret = ucsi_send_command(con->ucsi, command, &con->cap, sizeof(con->cap));
999
+
con->ucsi->message_in_size = sizeof(con->cap);
1000
+
ret = ucsi_send_command(con->ucsi, command);
1001
+
memcpy(&con->cap, con->ucsi->message_in, sizeof(con->cap));
1033
1002
if (ret < 0) {
1034
1003
dev_err(con->ucsi->dev, "GET_CONNECTOR_CAPABILITY failed (%d)\n", ret);
1035
1004
return ret;
···
1041
1006
typec_partner_set_pd_revision(con->partner, UCSI_SPEC_REVISION_TO_BCD(pd_revision));
1042
1007
1043
1008
return ret;
1009
+
}
1010
+
1011
+
static void ucsi_orientation(struct ucsi_connector *con)
1012
+
{
1013
+
if (con->ucsi->version < UCSI_VERSION_2_0)
1014
+
return;
1015
+
1016
+
if (!UCSI_CONSTAT(con, CONNECTED)) {
1017
+
typec_set_orientation(con->port, TYPEC_ORIENTATION_NONE);
1018
+
return;
1019
+
}
1020
+
1021
+
switch (UCSI_CONSTAT(con, ORIENTATION)) {
1022
+
case UCSI_CONSTAT_ORIENTATION_NORMAL:
1023
+
typec_set_orientation(con->port, TYPEC_ORIENTATION_NORMAL);
1024
+
break;
1025
+
case UCSI_CONSTAT_ORIENTATION_REVERSE:
1026
+
typec_set_orientation(con->port, TYPEC_ORIENTATION_REVERSE);
1027
+
break;
1028
+
default:
1029
+
break;
1030
+
}
1044
1031
}
1045
1032
1046
1033
static void ucsi_pwr_opmode_change(struct ucsi_connector *con)
···
1079
1022
case UCSI_CONSTAT_PWR_OPMODE_TYPEC1_5:
1080
1023
con->rdo = 0;
1081
1024
typec_set_pwr_opmode(con->port, TYPEC_PWR_MODE_1_5A);
1025
+
ucsi_port_psy_changed(con);
1082
1026
break;
1083
1027
case UCSI_CONSTAT_PWR_OPMODE_TYPEC3_0:
1084
1028
con->rdo = 0;
1085
1029
typec_set_pwr_opmode(con->port, TYPEC_PWR_MODE_3_0A);
1030
+
ucsi_port_psy_changed(con);
1086
1031
break;
1087
1032
default:
1088
1033
con->rdo = 0;
1089
1034
typec_set_pwr_opmode(con->port, TYPEC_PWR_MODE_USB);
1035
+
ucsi_port_psy_changed(con);
1090
1036
break;
1091
1037
}
1092
1038
}
···
1318
1258
typec_set_pwr_role(con->port, role);
1319
1259
ucsi_port_psy_changed(con);
1320
1260
ucsi_partner_change(con);
1261
+
ucsi_orientation(con);
1321
1262
1322
1263
if (UCSI_CONSTAT(con, CONNECTED)) {
1323
1264
ucsi_register_partner(con);
···
1351
1290
if (change & UCSI_CONSTAT_CAM_CHANGE)
1352
1291
ucsi_partner_task(con, ucsi_check_altmodes, 1, HZ);
1353
1292
1354
-
if (change & UCSI_CONSTAT_BC_CHANGE)
1293
+
if (change & (UCSI_CONSTAT_BC_CHANGE | UCSI_CONSTAT_SINK_PATH_CHANGE))
1355
1294
ucsi_port_psy_changed(con);
1356
1295
1357
1296
if (con->ucsi->version >= UCSI_VERSION_2_1 &&
···
1415
1354
else if (con->ucsi->version >= UCSI_VERSION_2_0)
1416
1355
command |= hard ? 0 : UCSI_CONNECTOR_RESET_DATA_VER_2_0;
1417
1356
1418
-
return ucsi_send_command(con->ucsi, command, NULL, 0);
1357
+
con->ucsi->message_in_size = 0;
1358
+
return ucsi_send_command(con->ucsi, command);
1419
1359
}
1420
1360
1421
1361
static int ucsi_reset_ppm(struct ucsi *ucsi)
···
1497
1435
{
1498
1436
int ret;
1499
1437
1500
-
ret = ucsi_send_command(con->ucsi, command, NULL, 0);
1438
+
con->ucsi->message_in_size = 0;
1439
+
ret = ucsi_send_command(con->ucsi, command);
1501
1440
if (ret == -ETIMEDOUT) {
1502
1441
u64 c;
1503
1442
···
1506
1443
ucsi_reset_ppm(con->ucsi);
1507
1444
1508
1445
c = UCSI_SET_NOTIFICATION_ENABLE | con->ucsi->ntfy;
1509
-
ucsi_send_command(con->ucsi, c, NULL, 0);
1446
+
con->ucsi->message_in_size = 0;
1447
+
ucsi_send_command(con->ucsi, c);
1510
1448
1511
1449
ucsi_reset_connector(con, true);
1512
1450
}
···
1660
1596
/* Get connector capability */
1661
1597
command = UCSI_GET_CONNECTOR_CAPABILITY;
1662
1598
command |= UCSI_CONNECTOR_NUMBER(con->num);
1663
-
ret = ucsi_send_command(ucsi, command, &con->cap, sizeof(con->cap));
1599
+
ucsi->message_in_size = sizeof(con->cap);
1600
+
ret = ucsi_send_command(ucsi, command);
1664
1601
if (ret < 0)
1665
1602
goto out_unlock;
1603
+
1604
+
memcpy(&con->cap, ucsi->message_in, sizeof(con->cap));
1666
1605
1667
1606
if (UCSI_CONCAP(con, OPMODE_DRP))
1668
1607
cap->data = TYPEC_PORT_DRD;
···
1700
1633
1701
1634
cap->driver_data = con;
1702
1635
cap->ops = &ucsi_ops;
1636
+
1637
+
if (ucsi->version >= UCSI_VERSION_2_0)
1638
+
con->typec_cap.orientation_aware = true;
1703
1639
1704
1640
if (ucsi->ops->update_connector)
1705
1641
ucsi->ops->update_connector(con);
···
1760
1690
typec_set_pwr_role(con->port, UCSI_CONSTAT(con, PWR_DIR));
1761
1691
ucsi_register_partner(con);
1762
1692
ucsi_pwr_opmode_change(con);
1693
+
ucsi_orientation(con);
1763
1694
ucsi_port_psy_changed(con);
1764
1695
if (con->ucsi->cap.features & UCSI_CAP_GET_PD_MESSAGE)
1765
1696
ucsi_get_partner_identity(con);
···
1863
1792
/* Enable basic notifications */
1864
1793
ntfy = UCSI_ENABLE_NTFY_CMD_COMPLETE | UCSI_ENABLE_NTFY_ERROR;
1865
1794
command = UCSI_SET_NOTIFICATION_ENABLE | ntfy;
1866
-
ret = ucsi_send_command(ucsi, command, NULL, 0);
1795
+
ucsi->message_in_size = 0;
1796
+
ret = ucsi_send_command(ucsi, command);
1867
1797
if (ret < 0)
1868
1798
goto err_reset;
1869
1799
1870
1800
/* Get PPM capabilities */
1871
1801
command = UCSI_GET_CAPABILITY;
1872
-
ret = ucsi_send_command(ucsi, command, &ucsi->cap,
1873
-
BITS_TO_BYTES(UCSI_GET_CAPABILITY_SIZE));
1802
+
ucsi->message_in_size = BITS_TO_BYTES(UCSI_GET_CAPABILITY_SIZE);
1803
+
ret = ucsi_send_command(ucsi, command);
1874
1804
if (ret < 0)
1875
1805
goto err_reset;
1806
+
1807
+
memcpy(&ucsi->cap, ucsi->message_in, BITS_TO_BYTES(UCSI_GET_CAPABILITY_SIZE));
1876
1808
1877
1809
if (!ucsi->cap.num_connectors) {
1878
1810
ret = -ENODEV;
1879
1811
goto err_reset;
1812
+
}
1813
+
/* Check if reserved bit set. This is out of spec but happens in buggy FW */
1814
+
if (ucsi->cap.num_connectors & 0x80) {
1815
+
dev_warn(ucsi->dev, "UCSI: Invalid num_connectors %d. Likely buggy FW\n",
1816
+
ucsi->cap.num_connectors);
1817
+
ucsi->cap.num_connectors &= 0x7f; // clear bit and carry on
1880
1818
}
1881
1819
1882
1820
/* Allocate the connectors. Released in ucsi_unregister() */
···
1906
1826
/* Enable all supported notifications */
1907
1827
ntfy = ucsi_get_supported_notifications(ucsi);
1908
1828
command = UCSI_SET_NOTIFICATION_ENABLE | ntfy;
1909
-
ret = ucsi_send_command(ucsi, command, NULL, 0);
1829
+
ucsi->message_in_size = 0;
1830
+
ret = ucsi_send_command(ucsi, command);
1910
1831
if (ret < 0)
1911
1832
goto err_unregister;
1912
1833
···
1958
1877
1959
1878
/* Restore UCSI notification enable mask after system resume */
1960
1879
command = UCSI_SET_NOTIFICATION_ENABLE | ucsi->ntfy;
1961
-
ret = ucsi_send_command(ucsi, command, NULL, 0);
1880
+
ucsi->message_in_size = 0;
1881
+
ret = ucsi_send_command(ucsi, command);
1962
1882
if (ret < 0) {
1963
1883
dev_err(ucsi->dev, "failed to re-enable notifications (%d)\n", ret);
1964
1884
return;
+24
-6
drivers/usb/typec/ucsi/ucsi.h
+24
-6
drivers/usb/typec/ucsi/ucsi.h
···
29
29
#define UCSI_MESSAGE_OUT 32
30
30
#define UCSIv2_MESSAGE_OUT 272
31
31
32
+
/* Define maximum lengths for message buffers */
33
+
#define UCSI_MAX_MESSAGE_IN_LENGTH 256
34
+
#define UCSI_MAX_MESSAGE_OUT_LENGTH 256
35
+
32
36
/* UCSI versions */
33
37
#define UCSI_VERSION_1_0 0x0100
34
38
#define UCSI_VERSION_1_1 0x0110
···
69
65
* @read_cci: Read CCI register
70
66
* @poll_cci: Read CCI register while polling with notifications disabled
71
67
* @read_message_in: Read message data from UCSI
68
+
* @write_message_out: Write message data to UCSI
72
69
* @sync_control: Blocking control operation
73
70
* @async_control: Non-blocking control operation
74
71
* @update_altmodes: Squashes duplicate DP altmodes
···
85
80
int (*read_cci)(struct ucsi *ucsi, u32 *cci);
86
81
int (*poll_cci)(struct ucsi *ucsi, u32 *cci);
87
82
int (*read_message_in)(struct ucsi *ucsi, void *val, size_t val_len);
88
-
int (*sync_control)(struct ucsi *ucsi, u64 command, u32 *cci,
89
-
void *data, size_t size);
83
+
int (*write_message_out)(struct ucsi *ucsi, void *data, size_t data_len);
84
+
int (*sync_control)(struct ucsi *ucsi, u64 command, u32 *cci);
90
85
int (*async_control)(struct ucsi *ucsi, u64 command);
91
86
bool (*update_altmodes)(struct ucsi *ucsi, u8 recipient,
92
87
struct ucsi_altmode *orig,
···
132
127
#define UCSI_GET_CONNECTOR_STATUS 0x12
133
128
#define UCSI_GET_CONNECTOR_STATUS_SIZE 152
134
129
#define UCSI_GET_ERROR_STATUS 0x13
130
+
#define UCSI_SET_POWER_LEVEL 0x14
135
131
#define UCSI_GET_ATTENTION_VDO 0x16
136
132
#define UCSI_GET_PD_MESSAGE 0x15
137
133
#define UCSI_GET_CAM_CS 0x18
138
134
#define UCSI_SET_SINK_PATH 0x1c
135
+
#define UCSI_SET_PDOS 0x1d
139
136
#define UCSI_READ_POWER_LEVEL 0x1e
140
137
#define UCSI_SET_USB 0x21
141
138
#define UCSI_GET_LPM_PPM_INFO 0x22
···
367
360
#define UCSI_CONSTAT_BC_SLOW_CHARGING 2
368
361
#define UCSI_CONSTAT_BC_TRICKLE_CHARGING 3
369
362
#define UCSI_CONSTAT_PD_VERSION_V1_2 UCSI_DECLARE_BITFIELD_V1_2(70, 16)
363
+
#define UCSI_CONSTAT_ORIENTATION UCSI_DECLARE_BITFIELD_V2_0(86, 1)
364
+
#define UCSI_CONSTAT_ORIENTATION_NORMAL 0
365
+
#define UCSI_CONSTAT_ORIENTATION_REVERSE 1
366
+
#define UCSI_CONSTAT_SINK_PATH_STATUS_V2_0 UCSI_DECLARE_BITFIELD_V2_0(87, 1)
367
+
#define UCSI_CONSTAT_SINK_PATH_DISABLED 0
368
+
#define UCSI_CONSTAT_SINK_PATH_ENABLED 1
370
369
#define UCSI_CONSTAT_PWR_READING_READY_V2_1 UCSI_DECLARE_BITFIELD_V2_1(89, 1)
371
370
#define UCSI_CONSTAT_CURRENT_SCALE_V2_1 UCSI_DECLARE_BITFIELD_V2_1(90, 3)
372
371
#define UCSI_CONSTAT_PEAK_CURRENT_V2_1 UCSI_DECLARE_BITFIELD_V2_1(93, 16)
···
392
379
#define UCSI_CONSTAT_BC_CHANGE BIT(9)
393
380
#define UCSI_CONSTAT_PARTNER_CHANGE BIT(11)
394
381
#define UCSI_CONSTAT_POWER_DIR_CHANGE BIT(12)
382
+
#define UCSI_CONSTAT_SINK_PATH_CHANGE BIT(13)
395
383
#define UCSI_CONSTAT_CONNECT_CHANGE BIT(14)
396
384
#define UCSI_CONSTAT_ERROR BIT(15)
397
385
···
499
485
unsigned long quirks;
500
486
#define UCSI_NO_PARTNER_PDOS BIT(0) /* Don't read partner's PDOs */
501
487
#define UCSI_DELAY_DEVICE_PDOS BIT(1) /* Reading PDOs fails until the parter is in PD mode */
488
+
489
+
/* Fixed-size buffers for incoming and outgoing messages */
490
+
u8 message_in[UCSI_MAX_MESSAGE_IN_LENGTH];
491
+
size_t message_in_size;
492
+
u8 message_out[UCSI_MAX_MESSAGE_OUT_LENGTH];
493
+
size_t message_out_size;
502
494
};
503
495
504
496
#define UCSI_MAX_DATA_LENGTH(u) (((u)->version < UCSI_VERSION_2_0) ? 0x10 : 0xff)
···
567
547
struct usb_pd_identity cable_identity;
568
548
};
569
549
570
-
int ucsi_send_command(struct ucsi *ucsi, u64 command,
571
-
void *retval, size_t size);
550
+
int ucsi_send_command(struct ucsi *ucsi, u64 command);
572
551
573
552
void ucsi_altmode_update_active(struct ucsi_connector *con);
574
553
int ucsi_resume(struct ucsi *ucsi);
575
554
576
555
void ucsi_notify_common(struct ucsi *ucsi, u32 cci);
577
-
int ucsi_sync_control_common(struct ucsi *ucsi, u64 command, u32 *cci,
578
-
void *data, size_t size);
556
+
int ucsi_sync_control_common(struct ucsi *ucsi, u64 command, u32 *cci);
579
557
580
558
#if IS_ENABLED(CONFIG_POWER_SUPPLY)
581
559
int ucsi_register_port_psy(struct ucsi_connector *con);
+20
-5
drivers/usb/typec/ucsi/ucsi_acpi.c
+20
-5
drivers/usb/typec/ucsi/ucsi_acpi.c
···
86
86
return 0;
87
87
}
88
88
89
+
static int ucsi_acpi_write_message_out(struct ucsi *ucsi, void *data, size_t data_len)
90
+
{
91
+
struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi);
92
+
93
+
if (!data || !data_len)
94
+
return -EINVAL;
95
+
96
+
if (ucsi->version <= UCSI_VERSION_1_2)
97
+
memcpy(ua->base + UCSI_MESSAGE_OUT, data, data_len);
98
+
else
99
+
memcpy(ua->base + UCSIv2_MESSAGE_OUT, data, data_len);
100
+
101
+
return 0;
102
+
}
103
+
89
104
static int ucsi_acpi_async_control(struct ucsi *ucsi, u64 command)
90
105
{
91
106
struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi);
···
116
101
.read_cci = ucsi_acpi_read_cci,
117
102
.poll_cci = ucsi_acpi_poll_cci,
118
103
.read_message_in = ucsi_acpi_read_message_in,
104
+
.write_message_out = ucsi_acpi_write_message_out,
119
105
.sync_control = ucsi_sync_control_common,
120
106
.async_control = ucsi_acpi_async_control
121
107
};
122
108
123
-
static int ucsi_gram_sync_control(struct ucsi *ucsi, u64 command, u32 *cci,
124
-
void *val, size_t len)
109
+
static int ucsi_gram_sync_control(struct ucsi *ucsi, u64 command, u32 *cci)
125
110
{
126
111
u16 bogus_change = UCSI_CONSTAT_POWER_LEVEL_CHANGE |
127
112
UCSI_CONSTAT_PDOS_CHANGE;
128
113
struct ucsi_acpi *ua = ucsi_get_drvdata(ucsi);
129
114
int ret;
130
115
131
-
ret = ucsi_sync_control_common(ucsi, command, cci, val, len);
116
+
ret = ucsi_sync_control_common(ucsi, command, cci);
132
117
if (ret < 0)
133
118
return ret;
134
119
···
140
125
if (UCSI_COMMAND(ua->cmd) == UCSI_GET_CONNECTOR_STATUS &&
141
126
ua->check_bogus_event) {
142
127
/* Clear the bogus change */
143
-
if (*(u16 *)val == bogus_change)
144
-
*(u16 *)val = 0;
128
+
if (*(u16 *)ucsi->message_in == bogus_change)
129
+
*(u16 *)ucsi->message_in = 0;
145
130
146
131
ua->check_bogus_event = false;
147
132
}
+5
-6
drivers/usb/typec/ucsi/ucsi_ccg.c
+5
-6
drivers/usb/typec/ucsi/ucsi_ccg.c
···
606
606
return ccg_write(uc, reg, (u8 *)&command, sizeof(command));
607
607
}
608
608
609
-
static int ucsi_ccg_sync_control(struct ucsi *ucsi, u64 command, u32 *cci,
610
-
void *data, size_t size)
609
+
static int ucsi_ccg_sync_control(struct ucsi *ucsi, u64 command, u32 *cci)
611
610
{
612
611
struct ucsi_ccg *uc = ucsi_get_drvdata(ucsi);
613
612
struct ucsi_connector *con;
···
628
629
ucsi_ccg_update_set_new_cam_cmd(uc, con, &command);
629
630
}
630
631
631
-
ret = ucsi_sync_control_common(ucsi, command, cci, data, size);
632
+
ret = ucsi_sync_control_common(ucsi, command, cci);
632
633
633
634
switch (UCSI_COMMAND(command)) {
634
635
case UCSI_GET_CURRENT_CAM:
635
636
if (uc->has_multiple_dp)
636
-
ucsi_ccg_update_get_current_cam_cmd(uc, (u8 *)data);
637
+
ucsi_ccg_update_get_current_cam_cmd(uc, (u8 *)ucsi->message_in);
637
638
break;
638
639
case UCSI_GET_ALTERNATE_MODES:
639
640
if (UCSI_ALTMODE_RECIPIENT(command) == UCSI_RECIPIENT_SOP) {
640
-
struct ucsi_altmode *alt = data;
641
+
struct ucsi_altmode *alt = (struct ucsi_altmode *)ucsi->message_in;
641
642
642
643
if (alt[0].svid == USB_TYPEC_NVIDIA_VLINK_SID)
643
644
ucsi_ccg_nvidia_altmode(uc, alt, command);
···
645
646
break;
646
647
case UCSI_GET_CAPABILITY:
647
648
if (uc->fw_build == CCG_FW_BUILD_NVIDIA_TEGRA) {
648
-
struct ucsi_capability *cap = data;
649
+
struct ucsi_capability *cap = (struct ucsi_capability *)ucsi->message_in;
649
650
650
651
cap->features &= ~UCSI_CAP_ALT_MODE_DETAILS;
651
652
}
+74
-14
drivers/usb/typec/ucsi/ucsi_glink.c
+74
-14
drivers/usb/typec/ucsi/ucsi_glink.c
···
16
16
17
17
#define PMIC_GLINK_MAX_PORTS 3
18
18
19
-
#define UCSI_BUF_SIZE 48
19
+
#define UCSI_BUF_V1_SIZE (UCSI_MESSAGE_OUT + (UCSI_MESSAGE_OUT - UCSI_MESSAGE_IN))
20
+
#define UCSI_BUF_V2_SIZE (UCSIv2_MESSAGE_OUT + (UCSIv2_MESSAGE_OUT - UCSI_MESSAGE_IN))
20
21
21
22
#define MSG_TYPE_REQ_RESP 1
22
-
#define UCSI_BUF_SIZE 48
23
23
24
24
#define UC_NOTIFY_RECEIVER_UCSI 0x0
25
25
#define UC_UCSI_READ_BUF_REQ 0x11
···
30
30
struct pmic_glink_hdr hdr;
31
31
};
32
32
33
-
struct ucsi_read_buf_resp_msg {
33
+
struct __packed ucsi_read_buf_resp_msg {
34
34
struct pmic_glink_hdr hdr;
35
-
u8 buf[UCSI_BUF_SIZE];
35
+
union {
36
+
u8 v2_buf[UCSI_BUF_V2_SIZE];
37
+
u8 v1_buf[UCSI_BUF_V1_SIZE];
38
+
} buf;
36
39
u32 ret_code;
37
40
};
38
41
39
-
struct ucsi_write_buf_req_msg {
42
+
struct __packed ucsi_write_buf_req_msg {
40
43
struct pmic_glink_hdr hdr;
41
-
u8 buf[UCSI_BUF_SIZE];
44
+
union {
45
+
u8 v2_buf[UCSI_BUF_V2_SIZE];
46
+
u8 v1_buf[UCSI_BUF_V1_SIZE];
47
+
} buf;
42
48
u32 reserved;
43
49
};
44
50
45
-
struct ucsi_write_buf_resp_msg {
51
+
struct __packed ucsi_write_buf_resp_msg {
46
52
struct pmic_glink_hdr hdr;
47
53
u32 ret_code;
48
54
};
49
55
50
-
struct ucsi_notify_ind_msg {
56
+
struct __packed ucsi_notify_ind_msg {
51
57
struct pmic_glink_hdr hdr;
52
58
u32 notification;
53
59
u32 receiver;
···
78
72
bool ucsi_registered;
79
73
bool pd_running;
80
74
81
-
u8 read_buf[UCSI_BUF_SIZE];
75
+
u8 read_buf[UCSI_BUF_V2_SIZE];
82
76
};
83
77
84
78
static int pmic_glink_ucsi_read(struct ucsi *__ucsi, unsigned int offset,
···
138
132
const void *val, size_t val_len)
139
133
{
140
134
struct ucsi_write_buf_req_msg req = {};
135
+
size_t req_len, buf_len;
141
136
unsigned long left;
142
137
int ret;
138
+
u8 *buf;
143
139
144
140
req.hdr.owner = PMIC_GLINK_OWNER_USBC;
145
141
req.hdr.type = MSG_TYPE_REQ_RESP;
146
142
req.hdr.opcode = UC_UCSI_WRITE_BUF_REQ;
147
-
memcpy(&req.buf[offset], val, val_len);
143
+
144
+
if (ucsi->ucsi->version >= UCSI_VERSION_2_0) {
145
+
buf_len = UCSI_BUF_V2_SIZE;
146
+
buf = req.buf.v2_buf;
147
+
} else if (ucsi->ucsi->version) {
148
+
buf_len = UCSI_BUF_V1_SIZE;
149
+
buf = req.buf.v1_buf;
150
+
} else {
151
+
dev_err(ucsi->dev, "UCSI version unknown\n");
152
+
return -EINVAL;
153
+
}
154
+
req_len = sizeof(struct pmic_glink_hdr) + buf_len + sizeof(u32);
155
+
156
+
if (offset + val_len > buf_len)
157
+
return -EINVAL;
158
+
159
+
memcpy(&buf[offset], val, val_len);
148
160
149
161
reinit_completion(&ucsi->write_ack);
150
162
151
-
ret = pmic_glink_send(ucsi->client, &req, sizeof(req));
163
+
ret = pmic_glink_send(ucsi->client, &req, req_len);
152
164
if (ret < 0) {
153
165
dev_err(ucsi->dev, "failed to send UCSI write request: %d\n", ret);
154
166
return ret;
···
240
216
241
217
static void pmic_glink_ucsi_read_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len)
242
218
{
243
-
const struct ucsi_read_buf_resp_msg *resp = data;
219
+
u32 ret_code, resp_len, buf_len = 0;
220
+
u8 *buf;
244
221
245
-
if (resp->ret_code)
222
+
if (ucsi->ucsi->version) {
223
+
if (ucsi->ucsi->version >= UCSI_VERSION_2_0) {
224
+
buf = ((struct ucsi_read_buf_resp_msg *)data)->buf.v2_buf;
225
+
buf_len = UCSI_BUF_V2_SIZE;
226
+
} else {
227
+
buf = ((struct ucsi_read_buf_resp_msg *)data)->buf.v1_buf;
228
+
buf_len = UCSI_BUF_V1_SIZE;
229
+
}
230
+
} else if (!ucsi->ucsi_registered) {
231
+
/*
232
+
* If UCSI version is not known yet because device is not registered, choose buffer
233
+
* size which best fits incoming data
234
+
*/
235
+
if (len > sizeof(struct pmic_glink_hdr) + UCSI_BUF_V2_SIZE) {
236
+
buf = ((struct ucsi_read_buf_resp_msg *)data)->buf.v2_buf;
237
+
buf_len = UCSI_BUF_V2_SIZE;
238
+
} else {
239
+
buf = ((struct ucsi_read_buf_resp_msg *)data)->buf.v1_buf;
240
+
buf_len = UCSI_BUF_V1_SIZE;
241
+
}
242
+
} else {
243
+
dev_err(ucsi->dev, "Device has been registered but UCSI version is still unknown\n");
244
+
return;
245
+
}
246
+
247
+
resp_len = sizeof(struct pmic_glink_hdr) + buf_len + sizeof(u32);
248
+
249
+
if (len > resp_len)
246
250
return;
247
251
248
-
memcpy(ucsi->read_buf, resp->buf, UCSI_BUF_SIZE);
252
+
/* Ensure that buffer_len leaves space for ret_code to be read back from memory */
253
+
if (buf_len > len - sizeof(struct pmic_glink_hdr) - sizeof(u32))
254
+
buf_len = len - sizeof(struct pmic_glink_hdr) - sizeof(u32);
255
+
256
+
memcpy(&ret_code, buf + buf_len, sizeof(u32));
257
+
if (ret_code)
258
+
return;
259
+
260
+
memcpy(ucsi->read_buf, buf, buf_len);
249
261
complete(&ucsi->read_ack);
250
262
}
251
263
+2
drivers/usb/typec/ucsi/ucsi_huawei_gaokun.c
+2
drivers/usb/typec/ucsi/ucsi_huawei_gaokun.c
···
196
196
const struct ucsi_operations gaokun_ucsi_ops = {
197
197
.read_version = gaokun_ucsi_read_version,
198
198
.read_cci = gaokun_ucsi_read_cci,
199
+
.poll_cci = gaokun_ucsi_read_cci,
199
200
.read_message_in = gaokun_ucsi_read_message_in,
200
201
.sync_control = ucsi_sync_control_common,
201
202
.async_control = gaokun_ucsi_async_control,
···
503
502
{
504
503
struct gaokun_ucsi *uec = auxiliary_get_drvdata(adev);
505
504
505
+
disable_delayed_work_sync(&uec->work);
506
506
gaokun_ec_unregister_notify(uec->ec, &uec->nb);
507
507
ucsi_unregister(uec->ucsi);
508
508
ucsi_destroy(uec->ucsi);
+7
-8
drivers/usb/typec/ucsi/ucsi_yoga_c630.c
+7
-8
drivers/usb/typec/ucsi/ucsi_yoga_c630.c
···
88
88
89
89
static int yoga_c630_ucsi_sync_control(struct ucsi *ucsi,
90
90
u64 command,
91
-
u32 *cci,
92
-
void *data, size_t size)
91
+
u32 *cci)
93
92
{
94
93
int ret;
95
94
···
106
107
};
107
108
108
109
dev_dbg(ucsi->dev, "faking DP altmode for con1\n");
109
-
memset(data, 0, size);
110
-
memcpy(data, &alt, min(sizeof(alt), size));
110
+
memset(ucsi->message_in, 0, ucsi->message_in_size);
111
+
memcpy(ucsi->message_in, &alt, min(sizeof(alt), ucsi->message_in_size));
111
112
*cci = UCSI_CCI_COMMAND_COMPLETE | UCSI_SET_CCI_LENGTH(sizeof(alt));
112
113
return 0;
113
114
}
···
120
121
if (UCSI_COMMAND(command) == UCSI_GET_ALTERNATE_MODES &&
121
122
UCSI_GET_ALTMODE_GET_CONNECTOR_NUMBER(command) == 2) {
122
123
dev_dbg(ucsi->dev, "ignoring altmodes for con2\n");
123
-
memset(data, 0, size);
124
+
memset(ucsi->message_in, 0, ucsi->message_in_size);
124
125
*cci = UCSI_CCI_COMMAND_COMPLETE;
125
126
return 0;
126
127
}
127
128
128
-
ret = ucsi_sync_control_common(ucsi, command, cci, data, size);
129
+
ret = ucsi_sync_control_common(ucsi, command, cci);
129
130
if (ret < 0)
130
131
return ret;
131
132
132
133
/* UCSI_GET_CURRENT_CAM is off-by-one on all ports */
133
-
if (UCSI_COMMAND(command) == UCSI_GET_CURRENT_CAM && data)
134
-
((u8 *)data)[0]--;
134
+
if (UCSI_COMMAND(command) == UCSI_GET_CURRENT_CAM && ucsi->message_in_size > 0)
135
+
ucsi->message_in[0]--;
135
136
136
137
return ret;
137
138
}
+3
-6
drivers/usb/usbip/stub_tx.c
+3
-6
drivers/usb/usbip/stub_tx.c
···
4
4
*/
5
5
6
6
#include <linux/kthread.h>
7
+
#include <linux/minmax.h>
7
8
#include <linux/socket.h>
8
9
#include <linux/scatterlist.h>
9
10
···
240
239
urb->actual_length > 0) {
241
240
if (urb->num_sgs) {
242
241
unsigned int copy = urb->actual_length;
243
-
int size;
242
+
unsigned int size;
244
243
245
244
for_each_sg(urb->sg, sg, urb->num_sgs, i) {
246
245
if (copy == 0)
247
246
break;
248
247
249
-
if (copy < sg->length)
250
-
size = copy;
251
-
else
252
-
size = sg->length;
253
-
248
+
size = min(copy, sg->length);
254
249
iov[iovnum].iov_base = sg_virt(sg);
255
250
iov[iovnum].iov_len = size;
256
251
+49
-47
drivers/usb/usbip/vhci_hcd.c
+49
-47
drivers/usb/usbip/vhci_hcd.c
···
346
346
if (wIndex < 1 || wIndex > VHCI_HC_PORTS) {
347
347
invalid_rhport = true;
348
348
if (wIndex > VHCI_HC_PORTS)
349
-
pr_err("invalid port number %d\n", wIndex);
350
-
} else
349
+
dev_err(hcd_dev(hcd), "invalid port number %d\n", wIndex);
350
+
} else {
351
351
rhport = wIndex - 1;
352
+
}
352
353
353
354
vhci_hcd = hcd_to_vhci_hcd(hcd);
354
355
vhci = vhci_hcd->vhci;
···
369
368
break;
370
369
case ClearPortFeature:
371
370
if (invalid_rhport) {
372
-
pr_err("invalid port number %d\n", wIndex);
371
+
dev_err(hcd_dev(hcd), "invalid port number %d\n", wIndex);
373
372
goto error;
374
373
}
375
374
switch (wValue) {
376
375
case USB_PORT_FEAT_SUSPEND:
377
376
if (hcd->speed >= HCD_USB3) {
378
-
pr_err(" ClearPortFeature: USB_PORT_FEAT_SUSPEND req not "
379
-
"supported for USB 3.0 roothub\n");
377
+
dev_err(hcd_dev(hcd),
378
+
"ClearPortFeature: USB_PORT_FEAT_SUSPEND req not supported for USB 3.0 roothub\n");
380
379
goto error;
381
380
}
382
381
usbip_dbg_vhci_rh(
···
409
408
if (hcd->speed >= HCD_USB3 &&
410
409
(wLength < USB_DT_SS_HUB_SIZE ||
411
410
wValue != (USB_DT_SS_HUB << 8))) {
412
-
pr_err("Wrong hub descriptor type for USB 3.0 roothub.\n");
411
+
dev_err(hcd_dev(hcd),
412
+
"Wrong hub descriptor type for USB 3.0 roothub.\n");
413
413
goto error;
414
414
}
415
415
if (hcd->speed >= HCD_USB3)
···
435
433
case GetPortStatus:
436
434
usbip_dbg_vhci_rh(" GetPortStatus port %x\n", wIndex);
437
435
if (invalid_rhport) {
438
-
pr_err("invalid port number %d\n", wIndex);
436
+
dev_err(hcd_dev(hcd), "invalid port number %d\n", wIndex);
439
437
retval = -EPIPE;
440
438
goto error;
441
439
}
···
485
483
USB_PORT_STAT_LOW_SPEED;
486
484
break;
487
485
default:
488
-
pr_err("vhci_device speed not set\n");
486
+
dev_err(hcd_dev(hcd), "vhci_device speed not set\n");
489
487
break;
490
488
}
491
489
}
···
507
505
usbip_dbg_vhci_rh(
508
506
" SetPortFeature: USB_PORT_FEAT_LINK_STATE\n");
509
507
if (hcd->speed < HCD_USB3) {
510
-
pr_err("USB_PORT_FEAT_LINK_STATE req not "
511
-
"supported for USB 2.0 roothub\n");
508
+
dev_err(hcd_dev(hcd),
509
+
"USB_PORT_FEAT_LINK_STATE req not supported for USB 2.0 roothub\n");
512
510
goto error;
513
511
}
514
512
/*
···
525
523
" SetPortFeature: USB_PORT_FEAT_U2_TIMEOUT\n");
526
524
/* TODO: add suspend/resume support! */
527
525
if (hcd->speed < HCD_USB3) {
528
-
pr_err("USB_PORT_FEAT_U1/2_TIMEOUT req not "
529
-
"supported for USB 2.0 roothub\n");
526
+
dev_err(hcd_dev(hcd),
527
+
"USB_PORT_FEAT_U1/2_TIMEOUT req not supported for USB 2.0 roothub\n");
530
528
goto error;
531
529
}
532
530
break;
···
535
533
" SetPortFeature: USB_PORT_FEAT_SUSPEND\n");
536
534
/* Applicable only for USB2.0 hub */
537
535
if (hcd->speed >= HCD_USB3) {
538
-
pr_err("USB_PORT_FEAT_SUSPEND req not "
539
-
"supported for USB 3.0 roothub\n");
536
+
dev_err(hcd_dev(hcd),
537
+
"USB_PORT_FEAT_SUSPEND req not supported for USB 3.0 roothub\n");
540
538
goto error;
541
539
}
542
540
543
541
if (invalid_rhport) {
544
-
pr_err("invalid port number %d\n", wIndex);
542
+
dev_err(hcd_dev(hcd), "invalid port number %d\n", wIndex);
545
543
goto error;
546
544
}
547
545
···
551
549
usbip_dbg_vhci_rh(
552
550
" SetPortFeature: USB_PORT_FEAT_POWER\n");
553
551
if (invalid_rhport) {
554
-
pr_err("invalid port number %d\n", wIndex);
552
+
dev_err(hcd_dev(hcd), "invalid port number %d\n", wIndex);
555
553
goto error;
556
554
}
557
555
if (hcd->speed >= HCD_USB3)
···
563
561
usbip_dbg_vhci_rh(
564
562
" SetPortFeature: USB_PORT_FEAT_BH_PORT_RESET\n");
565
563
if (invalid_rhport) {
566
-
pr_err("invalid port number %d\n", wIndex);
564
+
dev_err(hcd_dev(hcd), "invalid port number %d\n", wIndex);
567
565
goto error;
568
566
}
569
567
/* Applicable only for USB3.0 hub */
570
568
if (hcd->speed < HCD_USB3) {
571
-
pr_err("USB_PORT_FEAT_BH_PORT_RESET req not "
572
-
"supported for USB 2.0 roothub\n");
569
+
dev_err(hcd_dev(hcd),
570
+
"USB_PORT_FEAT_BH_PORT_RESET req not supported for USB 2.0 roothub\n");
573
571
goto error;
574
572
}
575
573
fallthrough;
···
577
575
usbip_dbg_vhci_rh(
578
576
" SetPortFeature: USB_PORT_FEAT_RESET\n");
579
577
if (invalid_rhport) {
580
-
pr_err("invalid port number %d\n", wIndex);
578
+
dev_err(hcd_dev(hcd), "invalid port number %d\n", wIndex);
581
579
goto error;
582
580
}
583
581
/* if it's already enabled, disable */
···
600
598
usbip_dbg_vhci_rh(" SetPortFeature: default %d\n",
601
599
wValue);
602
600
if (invalid_rhport) {
603
-
pr_err("invalid port number %d\n", wIndex);
601
+
dev_err(hcd_dev(hcd), "invalid port number %d\n", wIndex);
604
602
goto error;
605
603
}
606
604
if (wValue >= 32)
···
620
618
case GetPortErrorCount:
621
619
usbip_dbg_vhci_rh(" GetPortErrorCount\n");
622
620
if (hcd->speed < HCD_USB3) {
623
-
pr_err("GetPortErrorCount req not "
624
-
"supported for USB 2.0 roothub\n");
621
+
dev_err(hcd_dev(hcd),
622
+
"GetPortErrorCount req not supported for USB 2.0 roothub\n");
625
623
goto error;
626
624
}
627
625
/* We'll always return 0 since this is a dummy hub */
···
630
628
case SetHubDepth:
631
629
usbip_dbg_vhci_rh(" SetHubDepth\n");
632
630
if (hcd->speed < HCD_USB3) {
633
-
pr_err("SetHubDepth req not supported for "
634
-
"USB 2.0 roothub\n");
631
+
dev_err(hcd_dev(hcd),
632
+
"SetHubDepth req not supported for USB 2.0 roothub\n");
635
633
goto error;
636
634
}
637
635
break;
638
636
default:
639
-
pr_err("default hub control req: %04x v%04x i%04x l%d\n",
637
+
dev_err(hcd_dev(hcd),
638
+
"default hub control req: %04x v%04x i%04x l%d\n",
640
639
typeReq, wValue, wIndex, wLength);
641
640
error:
642
641
/* "protocol stall" on error */
···
645
642
}
646
643
647
644
if (usbip_dbg_flag_vhci_rh) {
648
-
pr_debug("port %d\n", rhport);
645
+
dev_dbg(hcd_dev(hcd), "%s port %d\n", __func__, rhport);
649
646
/* Only dump valid port status */
650
647
if (!invalid_rhport) {
651
648
dump_port_status_diff(prev_port_status[rhport],
···
705
702
unsigned long flags;
706
703
707
704
if (portnum > VHCI_HC_PORTS) {
708
-
pr_err("invalid port number %d\n", portnum);
705
+
dev_err(hcd_dev(hcd), "invalid port number %d\n", portnum);
709
706
return -ENODEV;
710
707
}
711
708
vdev = &vhci_hcd->vdev[portnum-1];
···
834
831
no_need_xmit:
835
832
usb_hcd_unlink_urb_from_ep(hcd, urb);
836
833
no_need_unlink:
837
-
spin_unlock_irqrestore(&vhci->lock, flags);
838
834
if (!ret) {
839
835
/* usb_hcd_giveback_urb() should be called with
840
836
* irqs disabled
841
837
*/
842
-
local_irq_disable();
838
+
spin_unlock(&vhci->lock);
843
839
usb_hcd_giveback_urb(hcd, urb, urb->status);
844
-
local_irq_enable();
840
+
spin_lock(&vhci->lock);
845
841
}
842
+
spin_unlock_irqrestore(&vhci->lock, flags);
846
843
return ret;
847
844
}
848
845
···
961
958
962
959
unlink->seqnum = atomic_inc_return(&vhci_hcd->seqnum);
963
960
if (unlink->seqnum == 0xffff)
964
-
pr_info("seqnum max\n");
961
+
dev_info(hcd_dev(hcd), "seqnum max\n");
965
962
966
963
unlink->unlink_seqnum = priv->seqnum;
967
964
···
1039
1036
static void vhci_shutdown_connection(struct usbip_device *ud)
1040
1037
{
1041
1038
struct vhci_device *vdev = container_of(ud, struct vhci_device, ud);
1039
+
struct usb_hcd *hcd = vhci_hcd_to_hcd(vdev_to_vhci_hcd(vdev));
1042
1040
1043
1041
/* need this? see stub_dev.c */
1044
1042
if (ud->tcp_socket) {
1045
-
pr_debug("shutdown tcp_socket %d\n", ud->sockfd);
1043
+
dev_dbg(hcd_dev(hcd), "shutdown tcp_socket %d\n", ud->sockfd);
1046
1044
kernel_sock_shutdown(ud->tcp_socket, SHUT_RDWR);
1047
1045
}
1048
1046
···
1056
1052
kthread_stop_put(vdev->ud.tcp_tx);
1057
1053
vdev->ud.tcp_tx = NULL;
1058
1054
}
1059
-
pr_info("stop threads\n");
1055
+
dev_info(hcd_dev(hcd), "stop threads\n");
1060
1056
1061
1057
/* active connection is closed */
1062
1058
if (vdev->ud.tcp_socket) {
···
1064
1060
vdev->ud.tcp_socket = NULL;
1065
1061
vdev->ud.sockfd = -1;
1066
1062
}
1067
-
pr_info("release socket\n");
1063
+
dev_info(hcd_dev(hcd), "release socket\n");
1068
1064
1069
1065
vhci_device_unlink_cleanup(vdev);
1070
1066
···
1090
1086
*/
1091
1087
rh_port_disconnect(vdev);
1092
1088
1093
-
pr_info("disconnect device\n");
1089
+
dev_info(hcd_dev(hcd), "disconnect device\n");
1094
1090
}
1095
1091
1096
1092
static void vhci_device_reset(struct usbip_device *ud)
···
1226
1222
1227
1223
id = hcd_name_to_id(hcd_name(hcd));
1228
1224
if (id < 0) {
1229
-
pr_err("invalid vhci name %s\n", hcd_name(hcd));
1225
+
dev_err(hcd_dev(hcd), "invalid vhci name %s\n", hcd_name(hcd));
1230
1226
return -EINVAL;
1231
1227
}
1232
1228
···
1243
1239
vhci_finish_attr_group();
1244
1240
return err;
1245
1241
}
1246
-
pr_info("created sysfs %s\n", hcd_name(hcd));
1242
+
dev_info(hcd_dev(hcd), "created sysfs %s\n", hcd_name(hcd));
1247
1243
}
1248
1244
1249
1245
return 0;
···
1376
1372
* Our private data is also allocated automatically.
1377
1373
*/
1378
1374
hcd_hs = usb_create_hcd(&vhci_hc_driver, &pdev->dev, dev_name(&pdev->dev));
1379
-
if (!hcd_hs) {
1380
-
pr_err("create primary hcd failed\n");
1381
-
return -ENOMEM;
1382
-
}
1375
+
if (!hcd_hs)
1376
+
return dev_err_probe(&pdev->dev, -ENOMEM, "create primary hcd failed\n");
1377
+
1383
1378
hcd_hs->has_tt = 1;
1384
1379
1385
1380
/*
···
1386
1383
* Call the driver's reset() and start() routines.
1387
1384
*/
1388
1385
ret = usb_add_hcd(hcd_hs, 0, 0);
1389
-
if (ret != 0) {
1390
-
pr_err("usb_add_hcd hs failed %d\n", ret);
1386
+
if (ret) {
1387
+
dev_err_probe(&pdev->dev, ret, "usb_add_hcd hs failed\n");
1391
1388
goto put_usb2_hcd;
1392
1389
}
1393
1390
1394
1391
hcd_ss = usb_create_shared_hcd(&vhci_hc_driver, &pdev->dev,
1395
1392
dev_name(&pdev->dev), hcd_hs);
1396
1393
if (!hcd_ss) {
1397
-
ret = -ENOMEM;
1398
-
pr_err("create shared hcd failed\n");
1394
+
ret = dev_err_probe(&pdev->dev, -ENOMEM, "create shared hcd failed\n");
1399
1395
goto remove_usb2_hcd;
1400
1396
}
1401
1397
1402
1398
ret = usb_add_hcd(hcd_ss, 0, 0);
1403
1399
if (ret) {
1404
-
pr_err("usb_add_hcd ss failed %d\n", ret);
1400
+
dev_err_probe(&pdev->dev, ret, "usb_add_hcd ss failed\n");
1405
1401
goto put_usb3_hcd;
1406
1402
}
1407
1403
-22
include/linux/platform_data/usb-davinci.h
-22
include/linux/platform_data/usb-davinci.h
···
1
-
/*
2
-
* USB related definitions
3
-
*
4
-
* Copyright (C) 2009 MontaVista Software, Inc. <source@mvista.com>
5
-
*
6
-
* This file is licensed under the terms of the GNU General Public License
7
-
* version 2. This program is licensed "as is" without any warranty of any
8
-
* kind, whether express or implied.
9
-
*/
10
-
11
-
#ifndef __ASM_ARCH_USB_H
12
-
#define __ASM_ARCH_USB_H
13
-
14
-
/* Passed as the platform data to the OHCI driver */
15
-
struct da8xx_ohci_root_hub {
16
-
/* Time from power on to power good (in 2 ms units) */
17
-
u8 potpgt;
18
-
};
19
-
20
-
void davinci_setup_usb(unsigned mA, unsigned potpgt_ms);
21
-
22
-
#endif /* ifndef __ASM_ARCH_USB_H */
+68
-1
include/linux/usb/pd.h
+68
-1
include/linux/usb/pd.h
···
6
6
#ifndef __LINUX_USB_PD_H
7
7
#define __LINUX_USB_PD_H
8
8
9
+
#include <linux/bitfield.h>
9
10
#include <linux/kernel.h>
10
11
#include <linux/types.h>
11
12
#include <linux/usb/typec.h>
···
272
271
273
272
enum pd_apdo_type {
274
273
APDO_TYPE_PPS = 0,
274
+
APDO_TYPE_EPR_AVS = 1,
275
+
APDO_TYPE_SPR_AVS = 2,
275
276
};
276
277
277
-
#define PDO_APDO_TYPE_SHIFT 28 /* Only valid value currently is 0x0 - PPS */
278
+
#define PDO_APDO_TYPE_SHIFT 28
278
279
#define PDO_APDO_TYPE_MASK 0x3
279
280
280
281
#define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT)
···
299
296
(PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \
300
297
PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \
301
298
PDO_PPS_APDO_MAX_CURR(max_ma))
299
+
300
+
/*
301
+
* Applicable only to EPR AVS APDO source cap as per
302
+
* Table 6.15 EPR Adjustable Voltage Supply APDO – Source
303
+
*/
304
+
#define PDO_EPR_AVS_APDO_PEAK_CURRENT GENMASK(27, 26)
305
+
306
+
/*
307
+
* Applicable to both EPR AVS APDO source and sink cap as per
308
+
* Table 6.15 EPR Adjustable Voltage Supply APDO – Source
309
+
* Table 6.22 EPR Adjustable Voltage Supply APDO – Sink
310
+
*/
311
+
#define PDO_EPR_AVS_APDO_MAX_VOLT GENMASK(25, 17) /* 100mV unit */
312
+
#define PDO_EPR_AVS_APDO_MIN_VOLT GENMASK(15, 8) /* 100mV unit */
313
+
#define PDO_EPR_AVS_APDO_PDP GENMASK(7, 0) /* 1W unit */
314
+
315
+
/*
316
+
* Applicable only SPR AVS APDO source cap as per
317
+
* Table 6.14 SPR Adjustable Voltage Supply APDO – Source
318
+
*/
319
+
#define PDO_SPR_AVS_APDO_PEAK_CURRENT GENMASK(27, 26)
320
+
321
+
/*
322
+
* Applicable to both SPR AVS APDO source and sink cap as per
323
+
* Table 6.14 SPR Adjustable Voltage Supply APDO – Source
324
+
* Table 6.21 SPR Adjustable Voltage Supply APDO – Sink
325
+
*/
326
+
#define PDO_SPR_AVS_APDO_9V_TO_15V_MAX_CURR GENMASK(19, 10) /* 10mA unit */
327
+
#define PDO_SPR_AVS_APDO_15V_TO_20V_MAX_CURR GENMASK(9, 0) /* 10mA unit */
302
328
303
329
static inline enum pd_pdo_type pdo_type(u32 pdo)
304
330
{
···
380
348
{
381
349
return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) &
382
350
PDO_PPS_APDO_CURR_MASK) * 50;
351
+
}
352
+
353
+
static inline unsigned int pdo_epr_avs_apdo_src_peak_current(u32 pdo)
354
+
{
355
+
return FIELD_GET(PDO_EPR_AVS_APDO_PEAK_CURRENT, pdo);
356
+
}
357
+
358
+
static inline unsigned int pdo_epr_avs_apdo_min_voltage_mv(u32 pdo)
359
+
{
360
+
return FIELD_GET(PDO_EPR_AVS_APDO_MIN_VOLT, pdo) * 100;
361
+
}
362
+
363
+
static inline unsigned int pdo_epr_avs_apdo_max_voltage_mv(u32 pdo)
364
+
{
365
+
return FIELD_GET(PDO_EPR_AVS_APDO_MIN_VOLT, pdo) * 100;
366
+
}
367
+
368
+
static inline unsigned int pdo_epr_avs_apdo_pdp_w(u32 pdo)
369
+
{
370
+
return FIELD_GET(PDO_EPR_AVS_APDO_PDP, pdo);
371
+
}
372
+
373
+
static inline unsigned int pdo_spr_avs_apdo_src_peak_current(u32 pdo)
374
+
{
375
+
return FIELD_GET(PDO_SPR_AVS_APDO_PEAK_CURRENT, pdo);
376
+
}
377
+
378
+
static inline unsigned int pdo_spr_avs_apdo_9v_to_15v_max_current_ma(u32 pdo)
379
+
{
380
+
return FIELD_GET(PDO_SPR_AVS_APDO_9V_TO_15V_MAX_CURR, pdo) * 10;
381
+
}
382
+
383
+
static inline unsigned int pdo_spr_avs_apdo_15v_to_20v_max_current_ma(u32 pdo)
384
+
{
385
+
return FIELD_GET(PDO_SPR_AVS_APDO_15V_TO_20V_MAX_CURR, pdo) * 10;
383
386
}
384
387
385
388
/* RDO: Request Data Object */
+1
include/linux/usb/typec.h
+1
include/linux/usb/typec.h
···
337
337
void typec_unregister_plug(struct typec_plug *plug);
338
338
339
339
void typec_set_data_role(struct typec_port *port, enum typec_data_role role);
340
+
enum typec_data_role typec_get_data_role(struct typec_port *port);
340
341
void typec_set_pwr_role(struct typec_port *port, enum typec_role role);
341
342
void typec_set_vconn_role(struct typec_port *port, enum typec_role role);
342
343
void typec_set_pwr_opmode(struct typec_port *port, enum typec_pwr_opmode mode);
+13
include/linux/usb/typec_altmode.h
+13
include/linux/usb/typec_altmode.h
···
173
173
}
174
174
175
175
/**
176
+
* typec_altmode_get_data_role - Get port data role
177
+
* @altmode: Handle to the alternate mode
178
+
*
179
+
* Alt Mode drivers should only issue Enter Mode through the port if they are
180
+
* the DFP.
181
+
*/
182
+
static inline enum typec_data_role
183
+
typec_altmode_get_data_role(struct typec_altmode *altmode)
184
+
{
185
+
return typec_get_data_role(typec_altmode2port(altmode));
186
+
}
187
+
188
+
/**
176
189
* struct typec_altmode_driver - USB Type-C alternate mode device driver
177
190
* @id_table: Null terminated array of SVIDs
178
191
* @probe: Callback for device binding
+1
include/linux/usb/typec_tbt.h
+1
include/linux/usb/typec_tbt.h
+8
-4
include/uapi/linux/usb/cdc.h
+8
-4
include/uapi/linux/usb/cdc.h
···
104
104
__u8 bDescriptorSubType;
105
105
106
106
__u8 bMasterInterface0;
107
-
__u8 bSlaveInterface0;
108
-
/* ... and there could be other slave interfaces */
107
+
union {
108
+
__u8 bSlaveInterface0;
109
+
__DECLARE_FLEX_ARRAY(__u8, bSlaveInterfaces);
110
+
};
109
111
} __attribute__ ((packed));
110
112
111
113
/* "Country Selection Functional Descriptor" from CDC spec 5.2.3.9 */
···
117
115
__u8 bDescriptorSubType;
118
116
119
117
__u8 iCountryCodeRelDate;
120
-
__le16 wCountyCode0;
121
-
/* ... and there can be a lot of country codes */
118
+
union {
119
+
__le16 wCountryCode0;
120
+
__DECLARE_FLEX_ARRAY(__le16, wCountryCodes);
121
+
};
122
122
} __attribute__ ((packed));
123
123
124
124
/* "Network Channel Terminal Functional Descriptor" from CDC spec 5.2.3.11 */
+1
rust/bindings/bindings_helper.h
+1
rust/bindings/bindings_helper.h
+1
rust/helpers/helpers.c
+1
rust/helpers/helpers.c
+2
rust/kernel/lib.rs
+2
rust/kernel/lib.rs