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i2c: rtl9300: introduce clk struct for upcoming rtl9607 support

In RTL9607C i2c controller, there is 10 bit CLK_DIV field for
setting the clock of i2c interface which depends on the rate
of i2c clk (which seems be fixed to 62.5MHz according to Realtek SDK).

Introduce the clk struct and the respective F_CLK_DIV and clk_div
which are going to be used in the upcoming patch for rtl9607c i2c
controller support addition.

devm_clk_get_optional_enabled() function was used for cleaner code
as it automatically returns NULL if the clk is not present, which is
going to be the case for RTL9300 and RTL9310 i2c controllers.

Signed-off-by: Rustam Adilov <adilov@disroot.org>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
Link: https://lore.kernel.org/r/20260401180648.337834-7-adilov@disroot.org

authored by

Rustam Adilov and committed by
Andi Shyti f60d2792 1211ce1e

+8
+8
drivers/i2c/busses/i2c-rtl9300.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0-only 2 2 3 3 #include <linux/bits.h> 4 + #include <linux/clk.h> 4 5 #include <linux/i2c.h> 5 6 #include <linux/i2c-mux.h> 6 7 #include <linux/mod_devicetable.h> ··· 29 28 struct rtl9300_i2c *i2c; 30 29 enum rtl9300_bus_freq bus_freq; 31 30 u8 sda_num; 31 + u32 clk_div; 32 32 }; 33 33 34 34 enum rtl9300_i2c_reg_scope { ··· 56 54 F_SDA_OUT_SEL, 57 55 F_SDA_SEL, 58 56 F_BUSY, 57 + F_CLK_DIV, 59 58 60 59 /* keep last */ 61 60 F_NUM_FIELDS ··· 88 85 u8 scl_num; 89 86 u8 sda_num; 90 87 struct mutex lock; 88 + struct clk *clk; 91 89 }; 92 90 93 91 DEFINE_GUARD(rtl9300_i2c, struct rtl9300_i2c *, mutex_lock(&_T->lock), mutex_unlock(&_T->lock)) ··· 435 431 fields, F_NUM_FIELDS); 436 432 if (ret) 437 433 return ret; 434 + 435 + i2c->clk = devm_clk_get_optional_enabled(dev, NULL); 436 + if (IS_ERR(i2c->clk)) 437 + return dev_err_probe(dev, PTR_ERR(i2c->clk), "Failed to enable i2c clock\n"); 438 438 439 439 i = 0; 440 440 for_each_child_of_node_scoped(dev->of_node, child) {