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dt-bindings: phy: rockchip: add RK3588 PCIe v3 phy

When the RK3568 PCIe v3 PHY supported has been upstreamed, RK3588
support was included, but the DT binding does not reflect this.
This adds the missing bits.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230717173512.65169-2-sebastian.reichel@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Sebastian Reichel and committed by
Vinod Koul f66782cf a05b6d51

+28 -5
+28 -5
Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml
··· 13 13 compatible: 14 14 enum: 15 15 - rockchip,rk3568-pcie3-phy 16 + - rockchip,rk3588-pcie3-phy 16 17 17 18 reg: 18 19 maxItems: 1 19 20 20 21 clocks: 21 - minItems: 3 22 + minItems: 1 22 23 maxItems: 3 23 24 24 25 clock-names: 25 - items: 26 - - const: refclk_m 27 - - const: refclk_n 28 - - const: pclk 26 + minItems: 1 27 + maxItems: 3 29 28 30 29 data-lanes: 31 30 description: which lanes (by position) should be mapped to which ··· 59 60 - reg 60 61 - rockchip,phy-grf 61 62 - "#phy-cells" 63 + 64 + allOf: 65 + - if: 66 + properties: 67 + compatible: 68 + enum: 69 + - rockchip,rk3588-pcie3-phy 70 + then: 71 + properties: 72 + clocks: 73 + maxItems: 1 74 + clock-names: 75 + items: 76 + - const: pclk 77 + else: 78 + properties: 79 + clocks: 80 + minItems: 3 81 + 82 + clock-names: 83 + items: 84 + - const: refclk_m 85 + - const: refclk_n 86 + - const: pclk 62 87 63 88 additionalProperties: false 64 89