Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-linus/i2c/2636-rc8' of git://git.fluff.org/bjdooks/linux
* 'for-linus/i2c/2636-rc8' of git://git.fluff.org/bjdooks/linux:
i2c-imx: do not allow interruptions when waiting for I2C to complete
i2c-davinci: Fix TX setup for more SoCs
+18
-18
+15
-9
drivers/i2c/busses/i2c-davinci.c
+15
-9
drivers/i2c/busses/i2c-davinci.c
···
331
331
INIT_COMPLETION(dev->cmd_complete);
332
332
dev->cmd_err = 0;
333
333
334
-
/* Take I2C out of reset, configure it as master and set the
335
-
* start bit */
336
-
flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST | DAVINCI_I2C_MDR_STT;
334
+
/* Take I2C out of reset and configure it as master */
335
+
flag = DAVINCI_I2C_MDR_IRS | DAVINCI_I2C_MDR_MST;
337
336
338
337
/* if the slave address is ten bit address, enable XA bit */
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if (msg->flags & I2C_M_TEN)
340
339
flag |= DAVINCI_I2C_MDR_XA;
341
340
if (!(msg->flags & I2C_M_RD))
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341
flag |= DAVINCI_I2C_MDR_TRX;
343
-
if (stop)
344
-
flag |= DAVINCI_I2C_MDR_STP;
345
-
if (msg->len == 0) {
342
+
if (msg->len == 0)
346
343
flag |= DAVINCI_I2C_MDR_RM;
347
-
flag &= ~DAVINCI_I2C_MDR_STP;
348
-
}
349
344
350
345
/* Enable receive or transmit interrupts */
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w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG);
···
353
358
dev->terminate = 0;
354
359
355
360
/*
361
+
* Write mode register first as needed for correct behaviour
362
+
* on OMAP-L138, but don't set STT yet to avoid a race with XRDY
363
+
* occuring before we have loaded DXR
364
+
*/
365
+
davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
366
+
367
+
/*
356
368
* First byte should be set here, not after interrupt,
357
369
* because transmit-data-ready interrupt can come before
358
370
* NACK-interrupt during sending of previous message and
359
371
* ICDXR may have wrong data
372
+
* It also saves us one interrupt, slightly faster
360
373
*/
361
374
if ((!(msg->flags & I2C_M_RD)) && dev->buf_len) {
362
375
davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG, *dev->buf++);
363
376
dev->buf_len--;
364
377
}
365
378
366
-
/* write the data into mode register; start transmitting */
379
+
/* Set STT to begin transmit now DXR is loaded */
380
+
flag |= DAVINCI_I2C_MDR_STT;
381
+
if (stop && msg->len != 0)
382
+
flag |= DAVINCI_I2C_MDR_STP;
367
383
davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag);
368
384
369
385
r = wait_for_completion_interruptible_timeout(&dev->cmd_complete,
+3
-9
drivers/i2c/busses/i2c-imx.c
+3
-9
drivers/i2c/busses/i2c-imx.c
···
159
159
160
160
static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx)
161
161
{
162
-
int result;
162
+
wait_event_timeout(i2c_imx->queue, i2c_imx->i2csr & I2SR_IIF, HZ / 10);
163
163
164
-
result = wait_event_interruptible_timeout(i2c_imx->queue,
165
-
i2c_imx->i2csr & I2SR_IIF, HZ / 10);
166
-
167
-
if (unlikely(result < 0)) {
168
-
dev_dbg(&i2c_imx->adapter.dev, "<%s> result < 0\n", __func__);
169
-
return result;
170
-
} else if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
164
+
if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
171
165
dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__);
172
166
return -ETIMEDOUT;
173
167
}
···
289
295
i2c_imx->i2csr = temp;
290
296
temp &= ~I2SR_IIF;
291
297
writeb(temp, i2c_imx->base + IMX_I2C_I2SR);
292
-
wake_up_interruptible(&i2c_imx->queue);
298
+
wake_up(&i2c_imx->queue);
293
299
return IRQ_HANDLED;
294
300
}
295
301