Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'regulator-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"There's a bunch of new drivers here, plus a lot of hardening for the
supply resolution code which allow us to support systems where we have
two PMICs each of which has regulators supplied by the other. This did
work a long time ago but got broken as part of improved integration
with the device model, it's fairly rare so nobody noticed.
- Improvements for supply handling from André Draszik to allow
systems with two PMICs with supply/consumer relationships in both
directions to instantiate.
- New drivers for Maxim MAX776750, Realtek RT8902, Samsung S2MPG11,
Texas Instuments TPS65185.
This have also pulls in some MFD updates which are build dependencies
for the Samsung S2MPG11 support"
* tag 'regulator-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (42 commits)
regulator: s2mps11: more descriptive gpio consumer name
regulator: s2mps11: add S2MPG11 regulator
regulator: s2mps11: refactor S2MPG10 regulator macros for S2MPG11 reuse
regulator: s2mps11: refactor S2MPG10 ::set_voltage_time() for S2MPG11 reuse
regulator: s2mps11: add S2MPG10 regulator
regulator: s2mps11: refactor handling of external rail control
regulator: s2mps11: update node parsing (allow -supply properties)
regulator: s2mps11: place constants on right side of comparison tests
regulator: s2mps11: use dev_err_probe() where appropriate
regulator: s2mps11: drop two needless variable initialisations
regulator: add REGULATOR_LINEAR_VRANGE macro
regulator: dt-bindings: add s2mpg11-pmic regulators
regulator: dt-bindings: add s2mpg10-pmic regulators
dt-bindings: firmware: google,gs101-acpm-ipc: convert regulators to lowercase
mfd: sec: Add support for S2MPG11 PMIC via ACPM
mfd: sec: s2mpg10: Reorder regulators for better probe performance
dt-bindings: mfd: Add samsung,s2mpg11-pmic
dt-bindings: mfd: samsung,s2mpg10-pmic: Link to its regulators
dt-bindings: mfd: samsung,s2mps11: Split s2mpg10-pmic into separate file
mfd: sec: Drop now unused struct sec_pmic_dev::irq_data
...
+4974
-343
+2
-2
Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
+2
-2
Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml
···
75
75
interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>;
76
76
77
77
regulators {
78
-
LDO1 {
78
+
ldo1m {
79
79
regulator-name = "vdd_ldo1";
80
80
regulator-min-microvolt = <700000>;
81
81
regulator-max-microvolt = <1300000>;
···
84
84
85
85
// ...
86
86
87
-
BUCK1 {
87
+
buck8m {
88
88
regulator-name = "vdd_mif";
89
89
regulator-min-microvolt = <450000>;
90
90
regulator-max-microvolt = <1300000>;
+120
Documentation/devicetree/bindings/mfd/samsung,s2mpg10-pmic.yaml
+120
Documentation/devicetree/bindings/mfd/samsung,s2mpg10-pmic.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/mfd/samsung,s2mpg10-pmic.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Samsung S2MPG10 Power Management IC
8
+
9
+
maintainers:
10
+
- André Draszik <andre.draszik@linaro.org>
11
+
12
+
description: |
13
+
This is part of the device tree bindings for the S2MPG10 Power Management IC
14
+
(PMIC).
15
+
16
+
The Samsung S2MPG10 is a Power Management IC for mobile applications with buck
17
+
converters, various LDOs, power meters, RTC, clock outputs, and additional
18
+
GPIO interfaces and is typically complemented by S2MPG10 PMIC in a main/sub
19
+
configuration as the main PMIC.
20
+
21
+
properties:
22
+
compatible:
23
+
const: samsung,s2mpg10-pmic
24
+
25
+
clocks:
26
+
$ref: /schemas/clock/samsung,s2mps11.yaml
27
+
description:
28
+
Child node describing clock provider.
29
+
30
+
interrupts:
31
+
maxItems: 1
32
+
33
+
regulators:
34
+
type: object
35
+
$ref: /schemas/regulator/samsung,s2mpg10-regulator.yaml
36
+
description:
37
+
List of child nodes that specify the regulators.
38
+
39
+
system-power-controller: true
40
+
41
+
wakeup-source: true
42
+
43
+
patternProperties:
44
+
"^vinb([1-9]|10)m-supply$":
45
+
description:
46
+
Phandle to the power supply for each buck rail of this PMIC. There is a
47
+
1:1 mapping of supply to rail, e.g. vinb1m-supply supplies buck1m.
48
+
49
+
"^vinl([1-9]|1[0-5])m-supply$":
50
+
description: |
51
+
Phandle to the power supply for one or multiple LDO rails of this PMIC.
52
+
The mapping of supply to rail(s) is as follows:
53
+
vinl1m - ldo13m
54
+
vinl2m - ldo15m
55
+
vinl3m - ldo1m, ldo5m, ldo7m
56
+
vinl4m - ldo3m, ldo8m
57
+
vinl5m - ldo16m
58
+
vinl6m - ldo17m
59
+
vinl7m - ldo6m, ldo11m, ldo24m, ldo28m
60
+
vinl8m - ldo12m
61
+
vinl9m - ldo2m, ldo4m
62
+
vinl10m - ldo9m, ldo14m, ldo18m, 19m, ldo20m, ldo25m
63
+
vinl11m - ldo23m, ldo31m
64
+
vinl12m - ldo29m
65
+
vinl13m - ldo30m
66
+
vinl14m - ldo21m
67
+
vinl15m - ldo10m, ldo22m, ldo26m, ldo27m
68
+
69
+
required:
70
+
- compatible
71
+
- interrupts
72
+
- regulators
73
+
74
+
additionalProperties: false
75
+
76
+
examples:
77
+
- |
78
+
#include <dt-bindings/gpio/gpio.h>
79
+
#include <dt-bindings/interrupt-controller/irq.h>
80
+
#include <dt-bindings/regulator/samsung,s2mpg10-regulator.h>
81
+
82
+
pmic {
83
+
compatible = "samsung,s2mpg10-pmic";
84
+
interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>;
85
+
pinctrl-names = "default";
86
+
pinctrl-0 = <&pmic_int>;
87
+
system-power-controller;
88
+
wakeup-source;
89
+
90
+
vinl3m-supply = <&buck8m>;
91
+
92
+
clocks {
93
+
compatible = "samsung,s2mpg10-clk";
94
+
#clock-cells = <1>;
95
+
clock-output-names = "rtc32k_ap", "peri32k1", "peri32k2";
96
+
};
97
+
98
+
regulators {
99
+
buck8m {
100
+
regulator-name = "vdd_mif";
101
+
regulator-min-microvolt = <450000>;
102
+
regulator-max-microvolt = <1300000>;
103
+
regulator-ramp-delay = <6250>;
104
+
};
105
+
106
+
ldo1m {
107
+
regulator-name = "vdd_ldo1";
108
+
regulator-min-microvolt = <700000>;
109
+
regulator-max-microvolt = <1300000>;
110
+
};
111
+
112
+
ldo20m {
113
+
regulator-name = "vdd_dmics";
114
+
regulator-min-microvolt = <700000>;
115
+
regulator-max-microvolt = <1300000>;
116
+
regulator-always-on;
117
+
samsung,ext-control = <S2MPG10_EXTCTRL_LDO20M_EN2>;
118
+
};
119
+
};
120
+
};
+88
Documentation/devicetree/bindings/mfd/samsung,s2mpg11-pmic.yaml
+88
Documentation/devicetree/bindings/mfd/samsung,s2mpg11-pmic.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/mfd/samsung,s2mpg11-pmic.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Samsung S2MPG11 Power Management IC
8
+
9
+
maintainers:
10
+
- André Draszik <andre.draszik@linaro.org>
11
+
12
+
description: |
13
+
This is part of the device tree bindings for the S2MPG11 Power Management IC
14
+
(PMIC).
15
+
16
+
The Samsung S2MPG11 is a Power Management IC for mobile applications with buck
17
+
converters, various LDOs, power meters, NTC thermistor inputs, and additional
18
+
GPIO interfaces and typically complements an S2MPG10 PMIC in a main/sub
19
+
configuration as the sub-PMIC.
20
+
21
+
properties:
22
+
compatible:
23
+
const: samsung,s2mpg11-pmic
24
+
25
+
interrupts:
26
+
maxItems: 1
27
+
28
+
regulators:
29
+
type: object
30
+
$ref: /schemas/regulator/samsung,s2mpg11-regulator.yaml
31
+
description:
32
+
List of child nodes that specify the regulators.
33
+
34
+
wakeup-source: true
35
+
36
+
patternProperties:
37
+
"^vinb(([1-9]|10)s|[abd])-supply$":
38
+
description:
39
+
Phandle to the power supply for each buck rail of this PMIC. There is a
40
+
1:1 mapping of numbered supply to rail, e.g. vinb1s-supply supplies
41
+
buck1s. The remaining mapping is as follows
42
+
vinba - bucka
43
+
vinbb - buck boost
44
+
vinbd - buckd
45
+
46
+
"^vinl[1-6]s-supply$":
47
+
description: |
48
+
Phandle to the power supply for one or multiple LDO rails of this PMIC.
49
+
The mapping of supply to rail(s) is as follows
50
+
vinl1s - ldo1s, ldo2s
51
+
vinl2s - ldo8s, ldo9s
52
+
vinl3s - ldo3s, ldo5s, ldo7s, ldo15s
53
+
vinl4s - ldo10s, ldo11s, ldo12s, ldo14s
54
+
vinl5s - ldo4s, ldo6s
55
+
vinl6s - ldo13s
56
+
57
+
required:
58
+
- compatible
59
+
- interrupts
60
+
- regulators
61
+
62
+
additionalProperties: false
63
+
64
+
examples:
65
+
- |
66
+
#include <dt-bindings/gpio/gpio.h>
67
+
#include <dt-bindings/interrupt-controller/irq.h>
68
+
#include <dt-bindings/regulator/samsung,s2mpg10-regulator.h>
69
+
70
+
pmic {
71
+
compatible = "samsung,s2mpg11-pmic";
72
+
interrupts-extended = <&gpa0 7 IRQ_TYPE_LEVEL_LOW>;
73
+
pinctrl-names = "default";
74
+
pinctrl-0 = <&pmic_int>;
75
+
wakeup-source;
76
+
77
+
vinl1s-supply = <&buck8m>;
78
+
vinl2s-supply = <&buck6s>;
79
+
80
+
regulators {
81
+
buckd {
82
+
regulator-name = "vcc_ufs";
83
+
regulator-ramp-delay = <6250>;
84
+
enable-gpios = <&gpp0 1 GPIO_ACTIVE_HIGH>;
85
+
samsung,ext-control = <S2MPG11_EXTCTRL_UFS_EN>;
86
+
};
87
+
};
88
+
};
+1
-28
Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml
+1
-28
Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml
···
20
20
properties:
21
21
compatible:
22
22
enum:
23
-
- samsung,s2mpg10-pmic
24
23
- samsung,s2mps11-pmic
25
24
- samsung,s2mps13-pmic
26
25
- samsung,s2mps14-pmic
···
58
59
reset (setting buck voltages to default values).
59
60
type: boolean
60
61
61
-
system-power-controller: true
62
-
63
62
wakeup-source: true
64
63
65
64
required:
66
65
- compatible
66
+
- reg
67
67
- regulators
68
68
69
69
additionalProperties: false
70
70
71
71
allOf:
72
-
- if:
73
-
properties:
74
-
compatible:
75
-
contains:
76
-
const: samsung,s2mpg10-pmic
77
-
then:
78
-
properties:
79
-
reg: false
80
-
samsung,s2mps11-acokb-ground: false
81
-
samsung,s2mps11-wrstbi-ground: false
82
-
83
-
# oneOf is required, because dtschema's fixups.py doesn't handle this
84
-
# nesting here. Its special treatment to allow either interrupt property
85
-
# when only one is specified in the binding works at the top level only.
86
-
oneOf:
87
-
- required: [interrupts]
88
-
- required: [interrupts-extended]
89
-
90
-
else:
91
-
properties:
92
-
system-power-controller: false
93
-
94
-
required:
95
-
- reg
96
-
97
72
- if:
98
73
properties:
99
74
compatible:
+184
Documentation/devicetree/bindings/regulator/adi,max77675.yaml
+184
Documentation/devicetree/bindings/regulator/adi,max77675.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/regulator/adi,max77675.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Maxim MAX77675 PMIC Regulator
8
+
9
+
maintainers:
10
+
- Joan Na <joan.na@analog.com>
11
+
12
+
description:
13
+
The MAX77675 is a Power Management IC providing four switching buck
14
+
regulators (SBB0–SBB3) accessible via I2C. It supports configuration
15
+
of output voltages and enable controls for each regulator.
16
+
17
+
allOf:
18
+
- $ref: /schemas/input/input.yaml
19
+
- $ref: /schemas/pinctrl/pincfg-node.yaml
20
+
21
+
properties:
22
+
compatible:
23
+
const: adi,max77675
24
+
25
+
reg:
26
+
maxItems: 1
27
+
28
+
reset-time-sec:
29
+
description: Manual reset time in seconds
30
+
enum: [4, 8, 12, 16]
31
+
default: 4
32
+
33
+
bias-disable:
34
+
type: boolean
35
+
description: Disable internal pull-up for EN pin
36
+
37
+
input-debounce:
38
+
description: Debounce time for the enable pin, in microseconds
39
+
items:
40
+
- enum: [100, 30000]
41
+
default: 100
42
+
43
+
adi,en-mode:
44
+
description: |
45
+
Enable mode configuration.
46
+
The debounce time set by 'input-debounce' applies to
47
+
both push-button and slide-switch modes.
48
+
"push-button" - A long press triggers power-on or power-down
49
+
"slide-switch" - Low : powers on, High : powers down
50
+
"logic" - Low : powers on, High : powers down (no debounce time)
51
+
$ref: /schemas/types.yaml#/definitions/string
52
+
enum: [push-button, slide-switch, logic]
53
+
default: slide-switch
54
+
55
+
adi,voltage-change-latency-us:
56
+
description:
57
+
Specifies the delay (in microseconds) between an output voltage change
58
+
request and the start of the SBB voltage ramp.
59
+
enum: [10, 100]
60
+
default: 100
61
+
62
+
adi,drv-sbb-strength:
63
+
description: |
64
+
SIMO Buck-Boost Drive Strength Trim.
65
+
Controls the drive strength of the SIMO regulator's power MOSFETs.
66
+
This setting affects switching speed, impacting power efficiency and EMI.
67
+
"max" – Maximum drive strength (~0.6 ns transition time)
68
+
"high" – High drive strength (~1.2 ns transition time)
69
+
"low" – Low drive strength (~1.8 ns transition time)
70
+
"min" – Minimum drive strength (~8 ns transition time)
71
+
$ref: /schemas/types.yaml#/definitions/string
72
+
enum: [max, high, low, min]
73
+
default: max
74
+
75
+
adi,dvs-slew-rate-mv-per-us:
76
+
description:
77
+
Dynamic rising slew rate for output voltage transitions, in mV/μs.
78
+
This setting is only used when 'adi,fixed-slew-rate' is not present.
79
+
enum: [5, 10]
80
+
default: 5
81
+
82
+
adi,bias-low-power-request:
83
+
type: boolean
84
+
description: Request low-power bias mode
85
+
86
+
adi,simo-ldo-always-on:
87
+
type: boolean
88
+
description: Set internal LDO to always supply 1.8V
89
+
90
+
regulators:
91
+
type: object
92
+
description: Regulator child nodes
93
+
patternProperties:
94
+
"^sbb[0-3]$":
95
+
type: object
96
+
$ref: regulator.yaml#
97
+
properties:
98
+
adi,fps-slot:
99
+
description: |
100
+
FPS (Flexible Power Sequencer) slot selection.
101
+
The Flexible Power Sequencer allows resources to power up under
102
+
hardware or software control. Additionally, each resource can
103
+
power up independently or among a group of other regulators with
104
+
adjustable power-up and power-down slots.
105
+
"slot0" - Assign to FPS Slot 0
106
+
"slot1" - Assign to FPS Slot 1
107
+
"slot2" - Assign to FPS Slot 2
108
+
"slot3" - Assign to FPS Slot 3
109
+
"default" - Use the default FPS slot value stored in register
110
+
$ref: /schemas/types.yaml#/definitions/string
111
+
enum: [slot0, slot1, slot2, slot3, default]
112
+
default: default
113
+
114
+
adi,fixed-slew-rate:
115
+
type: boolean
116
+
description:
117
+
When this property is present, the device uses a constant 2 mV/μs
118
+
slew rate and ignores any dynamic slew rate configuration.
119
+
When absent, the device uses the dynamic slew rate specified
120
+
by 'adi,dvs-slew-rate-mv-per-us'
121
+
122
+
unevaluatedProperties: false
123
+
124
+
required:
125
+
- compatible
126
+
- reg
127
+
- regulators
128
+
129
+
additionalProperties: false
130
+
131
+
examples:
132
+
- |
133
+
i2c {
134
+
#address-cells = <1>;
135
+
#size-cells = <0>;
136
+
137
+
max77675: pmic@44 {
138
+
compatible = "adi,max77675";
139
+
reg = <0x44>;
140
+
141
+
reset-time-sec = <4>;
142
+
input-debounce = <100>;
143
+
144
+
adi,en-mode = "slide-switch";
145
+
adi,voltage-change-latency-us = <100>;
146
+
adi,drv-sbb-strength = "max";
147
+
adi,dvs-slew-rate-mv-per-us = <5>;
148
+
149
+
regulators {
150
+
sbb0: sbb0 {
151
+
regulator-name = "sbb0";
152
+
regulator-min-microvolt = <500000>;
153
+
regulator-max-microvolt = <5500000>;
154
+
adi,fps-slot = "default";
155
+
adi,fixed-slew-rate;
156
+
};
157
+
158
+
sbb1: sbb1 {
159
+
regulator-name = "sbb1";
160
+
regulator-min-microvolt = <500000>;
161
+
regulator-max-microvolt = <5500000>;
162
+
adi,fps-slot = "default";
163
+
adi,fixed-slew-rate;
164
+
};
165
+
166
+
sbb2: sbb2 {
167
+
regulator-name = "sbb2";
168
+
regulator-min-microvolt = <500000>;
169
+
regulator-max-microvolt = <5500000>;
170
+
adi,fps-slot = "default";
171
+
adi,fixed-slew-rate;
172
+
};
173
+
174
+
sbb3: sbb3 {
175
+
regulator-name = "sbb3";
176
+
regulator-min-microvolt = <500000>;
177
+
regulator-max-microvolt = <5500000>;
178
+
adi,fps-slot = "default";
179
+
adi,fixed-slew-rate;
180
+
};
181
+
};
182
+
};
183
+
};
184
+
+2
-2
Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml
+2
-2
Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml
···
40
40
41
41
unevaluatedProperties: false
42
42
43
-
"^ldo-v(dig18|emc33|ibr|mc|mch|mipi|rtc|sim1|sim2|sram|usb10)$":
43
+
"^ldo-v(dig18|emc33|ibr|io28|mc|mch|mipi|rtc|sim1|sim2|sram|usb10)$":
44
44
type: object
45
45
$ref: regulator.yaml#
46
46
47
47
properties:
48
48
regulator-name:
49
-
pattern: "^v(dig18|emc33|ibr|mc|mch|mipi|rtc|sim1|sim2|sram|usb)$"
49
+
pattern: "^v(dig18|emc33|ibr|io28|mc|mch|mipi|rtc|sim1|sim2|sram|usb)$"
50
50
51
51
unevaluatedProperties: false
52
52
+5
Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml
+5
Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml
+1
Documentation/devicetree/bindings/regulator/regulator.yaml
+1
Documentation/devicetree/bindings/regulator/regulator.yaml
···
274
274
suspend. This property is now deprecated, instead setting voltage
275
275
for suspend mode via the API which regulator driver provides is
276
276
recommended.
277
+
deprecated: true
277
278
278
279
regulator-changeable-in-suspend:
279
280
description: whether the default voltage and the regulator on/off
+5
Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml
+5
Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml
···
15
15
supply of 2.5V to 5.5V. It can provide up to 3.5A continuous current
16
16
capability at over 80% high efficiency.
17
17
18
+
The RT8092 is similar type buck converter. Compared to RT5739, it can offer
19
+
up to 4A output current and more output voltage range to meet the application
20
+
on most mobile products.
21
+
18
22
allOf:
19
23
- $ref: regulator.yaml#
20
24
···
27
23
enum:
28
24
- richtek,rt5733
29
25
- richtek,rt5739
26
+
- richtek,rt8092
30
27
31
28
reg:
32
29
maxItems: 1
+158
Documentation/devicetree/bindings/regulator/samsung,s2mpg10-regulator.yaml
+158
Documentation/devicetree/bindings/regulator/samsung,s2mpg10-regulator.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/regulator/samsung,s2mpg10-regulator.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Samsung S2MPG10 Power Management IC regulators
8
+
9
+
maintainers:
10
+
- André Draszik <andre.draszik@linaro.org>
11
+
12
+
description: |
13
+
This is part of the device tree bindings for the S2MG10 Power Management IC
14
+
(PMIC).
15
+
16
+
The S2MPG10 PMIC provides 10 buck and 31 LDO regulators.
17
+
18
+
See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
19
+
additional information and example.
20
+
21
+
properties:
22
+
# 1 LDO with possible (but limited) external control
23
+
ldo20m:
24
+
type: object
25
+
$ref: regulator.yaml#
26
+
unevaluatedProperties: false
27
+
description:
28
+
Properties for a single LDO regulator.
29
+
30
+
allOf:
31
+
- $ref: "#/$defs/s2mpg10-ext-control"
32
+
33
+
properties:
34
+
regulator-ramp-delay: false
35
+
36
+
samsung,ext-control:
37
+
minimum: 11
38
+
39
+
patternProperties:
40
+
# 10 bucks
41
+
"^buck([1-9]|10)m$":
42
+
type: object
43
+
$ref: regulator.yaml#
44
+
unevaluatedProperties: false
45
+
description:
46
+
Properties for a single buck regulator.
47
+
48
+
allOf:
49
+
- $ref: "#/$defs/s2mpg10-ext-control"
50
+
51
+
properties:
52
+
regulator-ramp-delay:
53
+
enum: [6250, 12500, 25000]
54
+
default: 6250
55
+
56
+
samsung,ext-control:
57
+
maximum: 10
58
+
59
+
# 12 standard LDOs
60
+
"^ldo(2[1-9]?|3[0-1])m$":
61
+
type: object
62
+
$ref: regulator.yaml#
63
+
unevaluatedProperties: false
64
+
description:
65
+
Properties for single LDO regulator.
66
+
67
+
properties:
68
+
regulator-ramp-delay: false
69
+
70
+
# 12 LDOs with possible external control
71
+
"^ldo([3-689]|1[046-9])m$":
72
+
type: object
73
+
$ref: regulator.yaml#
74
+
unevaluatedProperties: false
75
+
description:
76
+
Properties for a single LDO regulator.
77
+
78
+
allOf:
79
+
- $ref: "#/$defs/s2mpg10-ext-control"
80
+
81
+
properties:
82
+
regulator-ramp-delay: false
83
+
84
+
samsung,ext-control:
85
+
maximum: 10
86
+
87
+
# 6 LDOs with ramp support, 5 out of those with possible external control
88
+
"^ldo(1[1235]?|7)m$":
89
+
type: object
90
+
$ref: regulator.yaml#
91
+
unevaluatedProperties: false
92
+
description:
93
+
Properties for a single LDO regulator.
94
+
95
+
allOf:
96
+
- $ref: "#/$defs/s2mpg10-ext-control"
97
+
98
+
properties:
99
+
regulator-ramp-delay:
100
+
enum: [6250, 12500]
101
+
default: 6250
102
+
103
+
samsung,ext-control:
104
+
maximum: 10
105
+
106
+
$defs:
107
+
s2mpg10-ext-control:
108
+
properties:
109
+
samsung,ext-control:
110
+
description: |
111
+
These rails can be controlled via one of several possible external
112
+
(hardware) signals. If so, this property configures the signal the PMIC
113
+
should monitor. For S2MPG10 rails where external control is possible other
114
+
than ldo20m, the following values generally corresponding to the
115
+
respective on-chip pin are valid:
116
+
- 0 # S2MPG10_EXTCTRL_PWREN - PWREN pin
117
+
- 1 # S2MPG10_EXTCTRL_PWREN_MIF - PWREN_MIF pin
118
+
- 2 # S2MPG10_EXTCTRL_AP_ACTIVE_N - ~AP_ACTIVE_N pin
119
+
- 3 # S2MPG10_EXTCTRL_CPUCL1_EN - CPUCL1_EN pin
120
+
- 4 # S2MPG10_EXTCTRL_CPUCL1_EN2 - CPUCL1_EN & PWREN pins
121
+
- 5 # S2MPG10_EXTCTRL_CPUCL2_EN - CPUCL2_EN pin
122
+
- 6 # S2MPG10_EXTCTRL_CPUCL2_EN2 - CPUCL2_E2 & PWREN pins
123
+
- 7 # S2MPG10_EXTCTRL_TPU_EN - TPU_EN pin
124
+
- 8 # S2MPG10_EXTCTRL_TPU_EN2 - TPU_EN & ~AP_ACTIVE_N pins
125
+
- 9 # S2MPG10_EXTCTRL_TCXO_ON - TCXO_ON pin
126
+
- 10 # S2MPG10_EXTCTRL_TCXO_ON2 - TCXO_ON & ~AP_ACTIVE_N pins
127
+
128
+
For S2MPG10 ldo20m, the following values are valid
129
+
- 11 # S2MPG10_EXTCTRL_LDO20M_EN2 - VLDO20M_EN & LDO20M_SFR
130
+
- 12 # S2MPG10_EXTCTRL_LDO20M_EN - VLDO20M_EN pin
131
+
132
+
$ref: /schemas/types.yaml#/definitions/uint32
133
+
minimum: 0
134
+
maximum: 12
135
+
136
+
enable-gpios:
137
+
description:
138
+
For rails where external control is done via a GPIO, this optional
139
+
property describes the GPIO line used.
140
+
141
+
dependentRequired:
142
+
enable-gpios: [ "samsung,ext-control" ]
143
+
144
+
allOf:
145
+
# Bucks 8, 9, and LDO 1 can not be controlled externally - above definition
146
+
# allows it and we deny it here. This approach reduces repetition.
147
+
- if:
148
+
anyOf:
149
+
- required: [buck8m]
150
+
- required: [buck9m]
151
+
- required: [ldo1m]
152
+
then:
153
+
patternProperties:
154
+
"^(buck[8-9]|ldo1)m$":
155
+
properties:
156
+
samsung,ext-control: false
157
+
158
+
additionalProperties: false
+136
Documentation/devicetree/bindings/regulator/samsung,s2mpg11-regulator.yaml
+136
Documentation/devicetree/bindings/regulator/samsung,s2mpg11-regulator.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/regulator/samsung,s2mpg11-regulator.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Samsung S2MPG11 Power Management IC regulators
8
+
9
+
maintainers:
10
+
- André Draszik <andre.draszik@linaro.org>
11
+
12
+
description: |
13
+
This is part of the device tree bindings for the S2MG11 Power Management IC
14
+
(PMIC).
15
+
16
+
The S2MPG11 PMIC provides 12 buck, 1 buck-boost, and 15 LDO regulators.
17
+
18
+
See also Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml for
19
+
additional information and example.
20
+
21
+
properties:
22
+
buckboost:
23
+
type: object
24
+
$ref: regulator.yaml#
25
+
unevaluatedProperties: false
26
+
description:
27
+
Properties for the buck-boost regulator.
28
+
29
+
properties:
30
+
regulator-ramp-delay: false
31
+
32
+
patternProperties:
33
+
# 12 bucks
34
+
"^buck(([1-9]|10)s|[ad])$":
35
+
type: object
36
+
$ref: regulator.yaml#
37
+
unevaluatedProperties: false
38
+
description:
39
+
Properties for a single buck regulator.
40
+
41
+
allOf:
42
+
- $ref: "#/$defs/s2mpg11-ext-control"
43
+
44
+
properties:
45
+
regulator-ramp-delay:
46
+
enum: [6250, 12500, 25000]
47
+
default: 6250
48
+
49
+
# 11 standard LDOs
50
+
"^ldo([3-79]|1[01245])s$":
51
+
type: object
52
+
$ref: regulator.yaml#
53
+
unevaluatedProperties: false
54
+
description:
55
+
Properties for a single LDO regulator.
56
+
57
+
properties:
58
+
regulator-ramp-delay: false
59
+
60
+
# 2 LDOs with possible external control
61
+
"^ldo(8|13)s$":
62
+
type: object
63
+
$ref: regulator.yaml#
64
+
unevaluatedProperties: false
65
+
description:
66
+
Properties for single LDO regulator.
67
+
68
+
allOf:
69
+
- $ref: "#/$defs/s2mpg11-ext-control"
70
+
71
+
properties:
72
+
regulator-ramp-delay: false
73
+
74
+
# 2 LDOs with ramp support and possible external control
75
+
"^ldo[12]s$":
76
+
type: object
77
+
$ref: regulator.yaml#
78
+
unevaluatedProperties: false
79
+
description:
80
+
Properties for a single LDO regulator.
81
+
82
+
allOf:
83
+
- $ref: "#/$defs/s2mpg11-ext-control"
84
+
85
+
properties:
86
+
regulator-ramp-delay:
87
+
enum: [6250, 12500]
88
+
default: 6250
89
+
90
+
$defs:
91
+
s2mpg11-ext-control:
92
+
properties:
93
+
samsung,ext-control:
94
+
description: |
95
+
These rails can be controlled via one of several possible external
96
+
(hardware) signals. If so, this property configures the signal the PMIC
97
+
should monitor. The following values generally corresponding to the
98
+
respective on-chip pin are valid:
99
+
- 0 # S2MPG11_EXTCTRL_PWREN - PWREN pin
100
+
- 1 # S2MPG11_EXTCTRL_PWREN_MIF - PWREN_MIF pin
101
+
- 2 # S2MPG11_EXTCTRL_AP_ACTIVE_N - ~AP_ACTIVE_N pin
102
+
- 3 # S2MPG11_EXTCTRL_G3D_EN - G3D_EN pin
103
+
- 4 # S2MPG11_EXTCTRL_G3D_EN2 - G3D_EN & ~AP_ACTIVE_N pins
104
+
- 5 # S2MPG11_EXTCTRL_AOC_VDD - AOC_VDD pin
105
+
- 6 # S2MPG11_EXTCTRL_AOC_RET - AOC_RET pin
106
+
- 7 # S2MPG11_EXTCTRL_UFS_EN - UFS_EN pin
107
+
- 8 # S2MPG11_EXTCTRL_LDO13S_EN - VLDO13S_EN pin
108
+
109
+
$ref: /schemas/types.yaml#/definitions/uint32
110
+
minimum: 0
111
+
maximum: 8
112
+
113
+
enable-gpios:
114
+
description:
115
+
For rails where external control is done via a GPIO, this optional
116
+
property describes the GPIO line used.
117
+
118
+
dependentRequired:
119
+
enable-gpios: [ "samsung,ext-control" ]
120
+
121
+
allOf:
122
+
# Bucks 4, 6, 7 and 10 can not be controlled externally - above definition
123
+
# allows it and we deny it here. This approach reduces repetition.
124
+
- if:
125
+
anyOf:
126
+
- required: [buck4s]
127
+
- required: [buck6s]
128
+
- required: [buck7s]
129
+
- required: [buck10s]
130
+
then:
131
+
patternProperties:
132
+
"^buck([467]|10)s$":
133
+
properties:
134
+
samsung,ext-control: false
135
+
136
+
additionalProperties: false
+96
Documentation/devicetree/bindings/regulator/ti,tps65185.yaml
+96
Documentation/devicetree/bindings/regulator/ti,tps65185.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/regulator/ti,tps65185.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: TI TPS65185 Power Management Integrated Circuit
8
+
9
+
maintainers:
10
+
- Andreas Kemnade <andreas@kemnade.info>
11
+
12
+
description:
13
+
TPS65185 is a Power Management IC to provide Power for EPDs with one 3.3V
14
+
switch, 2 symmetric LDOs behind 2 DC/DC converters, and one unsymmetric
15
+
regulator for a compensation voltage.
16
+
17
+
properties:
18
+
compatible:
19
+
const: ti,tps65185
20
+
21
+
reg:
22
+
maxItems: 1
23
+
24
+
enable-gpios:
25
+
description:
26
+
PWRUP pin
27
+
maxItems: 1
28
+
29
+
pwr-good-gpios:
30
+
maxItems: 1
31
+
32
+
vcom-ctrl-gpios:
33
+
maxItems: 1
34
+
35
+
wakeup-gpios:
36
+
maxItems: 1
37
+
38
+
vin-supply: true
39
+
40
+
interrupts:
41
+
maxItems: 1
42
+
43
+
regulators:
44
+
type: object
45
+
additionalProperties: false
46
+
patternProperties:
47
+
"^(vcom|vposneg|v3p3)$":
48
+
unevaluatedProperties: false
49
+
type: object
50
+
$ref: /schemas/regulator/regulator.yaml
51
+
52
+
required:
53
+
- compatible
54
+
- reg
55
+
- pwr-good-gpios
56
+
- vin-supply
57
+
58
+
additionalProperties: false
59
+
60
+
examples:
61
+
- |
62
+
#include <dt-bindings/gpio/gpio.h>
63
+
#include <dt-bindings/interrupt-controller/irq.h>
64
+
i2c {
65
+
#address-cells = <1>;
66
+
#size-cells = <0>;
67
+
68
+
pmic@18 {
69
+
compatible = "ti,tps65185";
70
+
reg = <0x18>;
71
+
pinctrl-names = "default";
72
+
pinctrl-0 = <&pinctrl_tps65185_gpio>;
73
+
pwr-good-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
74
+
vcom-ctrl-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
75
+
enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
76
+
wakeup-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
77
+
vin-supply = <&epdc_pmic_supply>;
78
+
interrupts-extended = <&gpio2 0 IRQ_TYPE_LEVEL_LOW>;
79
+
80
+
regulators {
81
+
vcom {
82
+
regulator-name = "vcom";
83
+
};
84
+
85
+
vposneg {
86
+
regulator-name = "vposneg";
87
+
regulator-min-microvolt = <15000000>;
88
+
regulator-max-microvolt = <15000000>;
89
+
};
90
+
91
+
v3p3 {
92
+
regulator-name = "v3p3";
93
+
};
94
+
};
95
+
};
96
+
};
+1
MAINTAINERS
+1
MAINTAINERS
+167
-4
drivers/mfd/sec-acpm.c
+167
-4
drivers/mfd/sec-acpm.c
···
13
13
#include <linux/mfd/samsung/core.h>
14
14
#include <linux/mfd/samsung/rtc.h>
15
15
#include <linux/mfd/samsung/s2mpg10.h>
16
+
#include <linux/mfd/samsung/s2mpg11.h>
16
17
#include <linux/mod_devicetable.h>
17
18
#include <linux/module.h>
18
19
#include <linux/of.h>
···
217
216
.cache_type = REGCACHE_FLAT,
218
217
};
219
218
219
+
static const struct regmap_range s2mpg11_common_registers[] = {
220
+
regmap_reg_range(0x00, 0x02), /* CHIP_ID_S, INT, INT_MASK */
221
+
regmap_reg_range(0x0a, 0x0c), /* Speedy control */
222
+
regmap_reg_range(0x1a, 0x27), /* Debug */
223
+
};
224
+
225
+
static const struct regmap_range s2mpg11_common_ro_registers[] = {
226
+
regmap_reg_range(0x00, 0x01), /* CHIP_ID_S, INT */
227
+
regmap_reg_range(0x25, 0x27), /* Debug */
228
+
};
229
+
230
+
static const struct regmap_range s2mpg11_common_nonvolatile_registers[] = {
231
+
regmap_reg_range(0x00, 0x00), /* CHIP_ID_S */
232
+
regmap_reg_range(0x02, 0x02), /* INT_MASK */
233
+
regmap_reg_range(0x0a, 0x0c), /* Speedy control */
234
+
};
235
+
236
+
static const struct regmap_range s2mpg11_common_precious_registers[] = {
237
+
regmap_reg_range(0x01, 0x01), /* INT */
238
+
};
239
+
240
+
static const struct regmap_access_table s2mpg11_common_wr_table = {
241
+
.yes_ranges = s2mpg11_common_registers,
242
+
.n_yes_ranges = ARRAY_SIZE(s2mpg11_common_registers),
243
+
.no_ranges = s2mpg11_common_ro_registers,
244
+
.n_no_ranges = ARRAY_SIZE(s2mpg11_common_ro_registers),
245
+
};
246
+
247
+
static const struct regmap_access_table s2mpg11_common_rd_table = {
248
+
.yes_ranges = s2mpg11_common_registers,
249
+
.n_yes_ranges = ARRAY_SIZE(s2mpg11_common_registers),
250
+
};
251
+
252
+
static const struct regmap_access_table s2mpg11_common_volatile_table = {
253
+
.no_ranges = s2mpg11_common_nonvolatile_registers,
254
+
.n_no_ranges = ARRAY_SIZE(s2mpg11_common_nonvolatile_registers),
255
+
};
256
+
257
+
static const struct regmap_access_table s2mpg11_common_precious_table = {
258
+
.yes_ranges = s2mpg11_common_precious_registers,
259
+
.n_yes_ranges = ARRAY_SIZE(s2mpg11_common_precious_registers),
260
+
};
261
+
262
+
static const struct regmap_config s2mpg11_regmap_config_common = {
263
+
.name = "common",
264
+
.reg_bits = ACPM_ADDR_BITS,
265
+
.val_bits = 8,
266
+
.max_register = S2MPG11_COMMON_SPD_DEBUG4,
267
+
.wr_table = &s2mpg11_common_wr_table,
268
+
.rd_table = &s2mpg11_common_rd_table,
269
+
.volatile_table = &s2mpg11_common_volatile_table,
270
+
.precious_table = &s2mpg11_common_precious_table,
271
+
.num_reg_defaults_raw = S2MPG11_COMMON_SPD_DEBUG4 + 1,
272
+
.cache_type = REGCACHE_FLAT,
273
+
};
274
+
275
+
static const struct regmap_range s2mpg11_pmic_registers[] = {
276
+
regmap_reg_range(0x00, 0x5a), /* All PMIC registers */
277
+
regmap_reg_range(0x5c, 0xb7), /* All PMIC registers */
278
+
};
279
+
280
+
static const struct regmap_range s2mpg11_pmic_ro_registers[] = {
281
+
regmap_reg_range(0x00, 0x05), /* INTx */
282
+
regmap_reg_range(0x0c, 0x0d), /* STATUS OFFSRC */
283
+
regmap_reg_range(0x98, 0x98), /* GPIO input */
284
+
};
285
+
286
+
static const struct regmap_range s2mpg11_pmic_nonvolatile_registers[] = {
287
+
regmap_reg_range(0x06, 0x0b), /* INTxM */
288
+
};
289
+
290
+
static const struct regmap_range s2mpg11_pmic_precious_registers[] = {
291
+
regmap_reg_range(0x00, 0x05), /* INTx */
292
+
};
293
+
294
+
static const struct regmap_access_table s2mpg11_pmic_wr_table = {
295
+
.yes_ranges = s2mpg11_pmic_registers,
296
+
.n_yes_ranges = ARRAY_SIZE(s2mpg11_pmic_registers),
297
+
.no_ranges = s2mpg11_pmic_ro_registers,
298
+
.n_no_ranges = ARRAY_SIZE(s2mpg11_pmic_ro_registers),
299
+
};
300
+
301
+
static const struct regmap_access_table s2mpg11_pmic_rd_table = {
302
+
.yes_ranges = s2mpg11_pmic_registers,
303
+
.n_yes_ranges = ARRAY_SIZE(s2mpg11_pmic_registers),
304
+
};
305
+
306
+
static const struct regmap_access_table s2mpg11_pmic_volatile_table = {
307
+
.no_ranges = s2mpg11_pmic_nonvolatile_registers,
308
+
.n_no_ranges = ARRAY_SIZE(s2mpg11_pmic_nonvolatile_registers),
309
+
};
310
+
311
+
static const struct regmap_access_table s2mpg11_pmic_precious_table = {
312
+
.yes_ranges = s2mpg11_pmic_precious_registers,
313
+
.n_yes_ranges = ARRAY_SIZE(s2mpg11_pmic_precious_registers),
314
+
};
315
+
316
+
static const struct regmap_config s2mpg11_regmap_config_pmic = {
317
+
.name = "pmic",
318
+
.reg_bits = ACPM_ADDR_BITS,
319
+
.val_bits = 8,
320
+
.max_register = S2MPG11_PMIC_LDO_SENSE2,
321
+
.wr_table = &s2mpg11_pmic_wr_table,
322
+
.rd_table = &s2mpg11_pmic_rd_table,
323
+
.volatile_table = &s2mpg11_pmic_volatile_table,
324
+
.precious_table = &s2mpg11_pmic_precious_table,
325
+
.num_reg_defaults_raw = S2MPG11_PMIC_LDO_SENSE2 + 1,
326
+
.cache_type = REGCACHE_FLAT,
327
+
};
328
+
329
+
static const struct regmap_range s2mpg11_meter_registers[] = {
330
+
regmap_reg_range(0x00, 0x3e), /* Meter config */
331
+
regmap_reg_range(0x40, 0x8a), /* Meter data */
332
+
regmap_reg_range(0x8d, 0x9c), /* Meter data */
333
+
};
334
+
335
+
static const struct regmap_range s2mpg11_meter_ro_registers[] = {
336
+
regmap_reg_range(0x40, 0x9c), /* Meter data */
337
+
};
338
+
339
+
static const struct regmap_access_table s2mpg11_meter_wr_table = {
340
+
.yes_ranges = s2mpg11_meter_registers,
341
+
.n_yes_ranges = ARRAY_SIZE(s2mpg11_meter_registers),
342
+
.no_ranges = s2mpg11_meter_ro_registers,
343
+
.n_no_ranges = ARRAY_SIZE(s2mpg11_meter_ro_registers),
344
+
};
345
+
346
+
static const struct regmap_access_table s2mpg11_meter_rd_table = {
347
+
.yes_ranges = s2mpg11_meter_registers,
348
+
.n_yes_ranges = ARRAY_SIZE(s2mpg11_meter_registers),
349
+
};
350
+
351
+
static const struct regmap_access_table s2mpg11_meter_volatile_table = {
352
+
.yes_ranges = s2mpg11_meter_ro_registers,
353
+
.n_yes_ranges = ARRAY_SIZE(s2mpg11_meter_ro_registers),
354
+
};
355
+
356
+
static const struct regmap_config s2mpg11_regmap_config_meter = {
357
+
.name = "meter",
358
+
.reg_bits = ACPM_ADDR_BITS,
359
+
.val_bits = 8,
360
+
.max_register = S2MPG11_METER_LPF_DATA_NTC7_2,
361
+
.wr_table = &s2mpg11_meter_wr_table,
362
+
.rd_table = &s2mpg11_meter_rd_table,
363
+
.volatile_table = &s2mpg11_meter_volatile_table,
364
+
.num_reg_defaults_raw = S2MPG11_METER_LPF_DATA_NTC7_2 + 1,
365
+
.cache_type = REGCACHE_FLAT,
366
+
};
367
+
220
368
struct sec_pmic_acpm_shared_bus_context {
221
369
const struct acpm_handle *acpm;
222
370
unsigned int acpm_chan_id;
···
514
364
if (IS_ERR(regmap_pmic))
515
365
return PTR_ERR(regmap_pmic);
516
366
517
-
regmap = sec_pmic_acpm_regmap_init(dev, shared_ctx, SEC_PMIC_ACPM_ACCESSTYPE_RTC,
518
-
pdata->regmap_cfg_rtc, true);
519
-
if (IS_ERR(regmap))
520
-
return PTR_ERR(regmap);
367
+
if (pdata->regmap_cfg_rtc) {
368
+
regmap = sec_pmic_acpm_regmap_init(dev, shared_ctx, SEC_PMIC_ACPM_ACCESSTYPE_RTC,
369
+
pdata->regmap_cfg_rtc, true);
370
+
if (IS_ERR(regmap))
371
+
return PTR_ERR(regmap);
372
+
}
521
373
522
374
regmap = sec_pmic_acpm_regmap_init(dev, shared_ctx, SEC_PMIC_ACPM_ACCESSTYPE_METER,
523
375
pdata->regmap_cfg_meter, true);
···
551
399
.regmap_cfg_meter = &s2mpg10_regmap_config_meter,
552
400
};
553
401
402
+
static const struct sec_pmic_acpm_platform_data s2mpg11_data = {
403
+
.device_type = S2MPG11,
404
+
.acpm_chan_id = 2,
405
+
.speedy_channel = 1,
406
+
.regmap_cfg_common = &s2mpg11_regmap_config_common,
407
+
.regmap_cfg_pmic = &s2mpg11_regmap_config_pmic,
408
+
.regmap_cfg_meter = &s2mpg11_regmap_config_meter,
409
+
};
410
+
554
411
static const struct of_device_id sec_pmic_acpm_of_match[] = {
555
412
{ .compatible = "samsung,s2mpg10-pmic", .data = &s2mpg10_data, },
413
+
{ .compatible = "samsung,s2mpg11-pmic", .data = &s2mpg11_data, },
556
414
{ },
557
415
};
558
416
MODULE_DEVICE_TABLE(of, sec_pmic_acpm_of_match);
···
570
408
static struct platform_driver sec_pmic_acpm_driver = {
571
409
.driver = {
572
410
.name = "sec-pmic-acpm",
411
+
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
573
412
.pm = pm_sleep_ptr(&sec_pmic_pm_ops),
574
413
.of_match_table = sec_pmic_acpm_of_match,
575
414
},
+49
-13
drivers/mfd/sec-common.c
+49
-13
drivers/mfd/sec-common.c
···
23
23
#include <linux/regmap.h>
24
24
#include "sec-core.h"
25
25
26
+
static const struct resource s5m8767_rtc_resources[] = {
27
+
DEFINE_RES_IRQ_NAMED(S5M8767_IRQ_RTCA1, "alarm"),
28
+
};
29
+
26
30
static const struct mfd_cell s5m8767_devs[] = {
27
31
MFD_CELL_NAME("s5m8767-pmic"),
28
-
MFD_CELL_NAME("s5m-rtc"),
32
+
MFD_CELL_RES("s5m-rtc", s5m8767_rtc_resources),
29
33
MFD_CELL_OF("s5m8767-clk", NULL, NULL, 0, 0, "samsung,s5m8767-clk"),
30
34
};
31
35
···
37
33
MFD_CELL_NAME("s2dos05-regulator"),
38
34
};
39
35
36
+
static const struct resource s2mpg10_rtc_resources[] = {
37
+
DEFINE_RES_IRQ_NAMED(S2MPG10_IRQ_RTCA0, "alarm"),
38
+
};
39
+
40
40
static const struct mfd_cell s2mpg10_devs[] = {
41
41
MFD_CELL_NAME("s2mpg10-meter"),
42
42
MFD_CELL_NAME("s2mpg10-regulator"),
43
-
MFD_CELL_NAME("s2mpg10-rtc"),
43
+
MFD_CELL_RES("s2mpg10-rtc", s2mpg10_rtc_resources),
44
44
MFD_CELL_OF("s2mpg10-clk", NULL, NULL, 0, 0, "samsung,s2mpg10-clk"),
45
45
MFD_CELL_OF("s2mpg10-gpio", NULL, NULL, 0, 0, "samsung,s2mpg10-gpio"),
46
46
};
47
47
48
+
static const struct mfd_cell s2mpg11_devs[] = {
49
+
MFD_CELL_NAME("s2mpg11-meter"),
50
+
MFD_CELL_NAME("s2mpg11-regulator"),
51
+
MFD_CELL_OF("s2mpg11-gpio", NULL, NULL, 0, 0, "samsung,s2mpg11-gpio"),
52
+
};
53
+
54
+
static const struct resource s2mps11_rtc_resources[] = {
55
+
DEFINE_RES_IRQ_NAMED(S2MPS11_IRQ_RTCA0, "alarm"),
56
+
};
57
+
48
58
static const struct mfd_cell s2mps11_devs[] = {
49
59
MFD_CELL_NAME("s2mps11-regulator"),
50
-
MFD_CELL_NAME("s2mps14-rtc"),
60
+
MFD_CELL_RES("s2mps14-rtc", s2mps11_rtc_resources),
51
61
MFD_CELL_OF("s2mps11-clk", NULL, NULL, 0, 0, "samsung,s2mps11-clk"),
62
+
};
63
+
64
+
static const struct resource s2mps14_rtc_resources[] = {
65
+
DEFINE_RES_IRQ_NAMED(S2MPS14_IRQ_RTCA0, "alarm"),
52
66
};
53
67
54
68
static const struct mfd_cell s2mps13_devs[] = {
55
69
MFD_CELL_NAME("s2mps13-regulator"),
56
-
MFD_CELL_NAME("s2mps13-rtc"),
70
+
MFD_CELL_RES("s2mps13-rtc", s2mps14_rtc_resources),
57
71
MFD_CELL_OF("s2mps13-clk", NULL, NULL, 0, 0, "samsung,s2mps13-clk"),
58
72
};
59
73
60
74
static const struct mfd_cell s2mps14_devs[] = {
61
75
MFD_CELL_NAME("s2mps14-regulator"),
62
-
MFD_CELL_NAME("s2mps14-rtc"),
76
+
MFD_CELL_RES("s2mps14-rtc", s2mps14_rtc_resources),
63
77
MFD_CELL_OF("s2mps14-clk", NULL, NULL, 0, 0, "samsung,s2mps14-clk"),
64
78
};
65
79
66
80
static const struct mfd_cell s2mps15_devs[] = {
67
81
MFD_CELL_NAME("s2mps15-regulator"),
68
-
MFD_CELL_NAME("s2mps15-rtc"),
82
+
MFD_CELL_RES("s2mps15-rtc", s2mps14_rtc_resources),
69
83
MFD_CELL_OF("s2mps13-clk", NULL, NULL, 0, 0, "samsung,s2mps13-clk"),
70
84
};
71
85
72
86
static const struct mfd_cell s2mpa01_devs[] = {
73
87
MFD_CELL_NAME("s2mpa01-pmic"),
74
-
MFD_CELL_NAME("s2mps14-rtc"),
88
+
MFD_CELL_RES("s2mps14-rtc", s2mps14_rtc_resources),
75
89
};
76
90
77
91
static const struct mfd_cell s2mpu02_devs[] = {
78
92
MFD_CELL_NAME("s2mpu02-regulator"),
79
93
};
80
94
95
+
static const struct resource s2mpu05_rtc_resources[] = {
96
+
DEFINE_RES_IRQ_NAMED(S2MPU05_IRQ_RTCA0, "alarm"),
97
+
};
98
+
81
99
static const struct mfd_cell s2mpu05_devs[] = {
82
100
MFD_CELL_NAME("s2mpu05-regulator"),
83
-
MFD_CELL_NAME("s2mps15-rtc"),
101
+
MFD_CELL_RES("s2mps15-rtc", s2mpu05_rtc_resources),
84
102
};
85
103
86
104
static void sec_pmic_dump_rev(struct sec_pmic_dev *sec_pmic)
···
110
84
unsigned int val;
111
85
112
86
/* For s2mpg1x, the revision is in a different regmap */
113
-
if (sec_pmic->device_type == S2MPG10)
87
+
switch (sec_pmic->device_type) {
88
+
case S2MPG10:
89
+
case S2MPG11:
114
90
return;
91
+
default:
92
+
break;
93
+
}
115
94
116
95
/* For each device type, the REG_ID is always the first register */
117
96
if (!regmap_read(sec_pmic->regmap_pmic, S2MPS11_REG_ID, &val))
···
174
143
int sec_pmic_probe(struct device *dev, int device_type, unsigned int irq,
175
144
struct regmap *regmap, struct i2c_client *client)
176
145
{
146
+
struct regmap_irq_chip_data *irq_data;
177
147
struct sec_platform_data *pdata;
178
148
const struct mfd_cell *sec_devs;
179
149
struct sec_pmic_dev *sec_pmic;
···
199
167
200
168
sec_pmic->pdata = pdata;
201
169
202
-
ret = sec_irq_init(sec_pmic);
203
-
if (ret)
204
-
return ret;
170
+
irq_data = sec_irq_init(sec_pmic);
171
+
if (IS_ERR(irq_data))
172
+
return PTR_ERR(irq_data);
205
173
206
174
pm_runtime_set_active(sec_pmic->dev);
207
175
···
221
189
case S2MPG10:
222
190
sec_devs = s2mpg10_devs;
223
191
num_sec_devs = ARRAY_SIZE(s2mpg10_devs);
192
+
break;
193
+
case S2MPG11:
194
+
sec_devs = s2mpg11_devs;
195
+
num_sec_devs = ARRAY_SIZE(s2mpg11_devs);
224
196
break;
225
197
case S2MPS11X:
226
198
sec_devs = s2mps11_devs;
···
256
220
sec_pmic->device_type);
257
221
}
258
222
ret = devm_mfd_add_devices(sec_pmic->dev, -1, sec_devs, num_sec_devs,
259
-
NULL, 0, NULL);
223
+
NULL, 0, regmap_irq_get_domain(irq_data));
260
224
if (ret)
261
225
return ret;
262
226
+1
-1
drivers/mfd/sec-core.h
+1
-1
drivers/mfd/sec-core.h
+114
-36
drivers/mfd/sec-irq.c
+114
-36
drivers/mfd/sec-irq.c
···
11
11
#include <linux/mfd/samsung/core.h>
12
12
#include <linux/mfd/samsung/irq.h>
13
13
#include <linux/mfd/samsung/s2mpg10.h>
14
+
#include <linux/mfd/samsung/s2mpg11.h>
14
15
#include <linux/mfd/samsung/s2mps11.h>
15
16
#include <linux/mfd/samsung/s2mps14.h>
16
17
#include <linux/mfd/samsung/s2mpu02.h>
···
78
77
REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH5, 5, S2MPG10_IRQ_PWR_WARN_CH5_MASK),
79
78
REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH6, 5, S2MPG10_IRQ_PWR_WARN_CH6_MASK),
80
79
REGMAP_IRQ_REG(S2MPG10_IRQ_PWR_WARN_CH7, 5, S2MPG10_IRQ_PWR_WARN_CH7_MASK),
80
+
};
81
+
82
+
static const struct regmap_irq s2mpg11_irqs[] = {
83
+
REGMAP_IRQ_REG(S2MPG11_COMMON_IRQ_PMIC, 0, S2MPG11_COMMON_INT_SRC_PMIC),
84
+
/* No documentation or other reference for remaining bits */
85
+
REGMAP_IRQ_REG(S2MPG11_COMMON_IRQ_UNUSED, 0, GENMASK(7, 1)),
86
+
};
87
+
88
+
static const struct regmap_irq s2mpg11_pmic_irqs[] = {
89
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PWRONF, 0, S2MPG11_IRQ_PWRONF_MASK),
90
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PWRONR, 0, S2MPG11_IRQ_PWRONR_MASK),
91
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PIF_TIMEOUT_MIF, 0, S2MPG11_IRQ_PIF_TIMEOUT_MIF_MASK),
92
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PIF_TIMEOUTS, 0, S2MPG11_IRQ_PIF_TIMEOUTS_MASK),
93
+
REGMAP_IRQ_REG(S2MPG11_IRQ_WTSR, 0, S2MPG11_IRQ_WTSR_MASK),
94
+
REGMAP_IRQ_REG(S2MPG11_IRQ_SPD_ABNORMAL_STOP, 0, S2MPG11_IRQ_SPD_ABNORMAL_STOP_MASK),
95
+
REGMAP_IRQ_REG(S2MPG11_IRQ_SPD_PARITY_ERR, 0, S2MPG11_IRQ_SPD_PARITY_ERR_MASK),
96
+
97
+
REGMAP_IRQ_REG(S2MPG11_IRQ_140C, 1, S2MPG11_IRQ_INT140C_MASK),
98
+
REGMAP_IRQ_REG(S2MPG11_IRQ_120C, 1, S2MPG11_IRQ_INT120C_MASK),
99
+
REGMAP_IRQ_REG(S2MPG11_IRQ_TSD, 1, S2MPG11_IRQ_TSD_MASK),
100
+
REGMAP_IRQ_REG(S2MPG11_IRQ_WRST, 1, S2MPG11_IRQ_WRST_MASK),
101
+
REGMAP_IRQ_REG(S2MPG11_IRQ_NTC_CYCLE_DONE, 1, S2MPG11_IRQ_NTC_CYCLE_DONE_MASK),
102
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PMETER_OVERF, 1, S2MPG11_IRQ_PMETER_OVERF_MASK),
103
+
104
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_B1S, 2, S2MPG11_IRQ_OCP_B1S_MASK),
105
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_B2S, 2, S2MPG11_IRQ_OCP_B2S_MASK),
106
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_B3S, 2, S2MPG11_IRQ_OCP_B3S_MASK),
107
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_B4S, 2, S2MPG11_IRQ_OCP_B4S_MASK),
108
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_B5S, 2, S2MPG11_IRQ_OCP_B5S_MASK),
109
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_B6S, 2, S2MPG11_IRQ_OCP_B6S_MASK),
110
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_B7S, 2, S2MPG11_IRQ_OCP_B7S_MASK),
111
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_B8S, 2, S2MPG11_IRQ_OCP_B8S_MASK),
112
+
113
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_B9S, 3, S2MPG11_IRQ_OCP_B9S_MASK),
114
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_B10S, 3, S2MPG11_IRQ_OCP_B10S_MASK),
115
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_BDS, 3, S2MPG11_IRQ_OCP_BDS_MASK),
116
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_BAS, 3, S2MPG11_IRQ_OCP_BAS_MASK),
117
+
REGMAP_IRQ_REG(S2MPG11_IRQ_OCP_BBS, 3, S2MPG11_IRQ_OCP_BBS_MASK),
118
+
REGMAP_IRQ_REG(S2MPG11_IRQ_WLWP_ACC, 3, S2MPG11_IRQ_WLWP_ACC_MASK),
119
+
REGMAP_IRQ_REG(S2MPG11_IRQ_SPD_SRP_PKT_RST, 3, S2MPG11_IRQ_SPD_SRP_PKT_RST_MASK),
120
+
121
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PWR_WARN_CH0, 4, S2MPG11_IRQ_PWR_WARN_CH0_MASK),
122
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PWR_WARN_CH1, 4, S2MPG11_IRQ_PWR_WARN_CH1_MASK),
123
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PWR_WARN_CH2, 4, S2MPG11_IRQ_PWR_WARN_CH2_MASK),
124
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PWR_WARN_CH3, 4, S2MPG11_IRQ_PWR_WARN_CH3_MASK),
125
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PWR_WARN_CH4, 4, S2MPG11_IRQ_PWR_WARN_CH4_MASK),
126
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PWR_WARN_CH5, 4, S2MPG11_IRQ_PWR_WARN_CH5_MASK),
127
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PWR_WARN_CH6, 4, S2MPG11_IRQ_PWR_WARN_CH6_MASK),
128
+
REGMAP_IRQ_REG(S2MPG11_IRQ_PWR_WARN_CH7, 4, S2MPG11_IRQ_PWR_WARN_CH7_MASK),
129
+
130
+
REGMAP_IRQ_REG(S2MPG11_IRQ_NTC_WARN_CH0, 5, S2MPG11_IRQ_NTC_WARN_CH0_MASK),
131
+
REGMAP_IRQ_REG(S2MPG11_IRQ_NTC_WARN_CH1, 5, S2MPG11_IRQ_NTC_WARN_CH1_MASK),
132
+
REGMAP_IRQ_REG(S2MPG11_IRQ_NTC_WARN_CH2, 5, S2MPG11_IRQ_NTC_WARN_CH2_MASK),
133
+
REGMAP_IRQ_REG(S2MPG11_IRQ_NTC_WARN_CH3, 5, S2MPG11_IRQ_NTC_WARN_CH3_MASK),
134
+
REGMAP_IRQ_REG(S2MPG11_IRQ_NTC_WARN_CH4, 5, S2MPG11_IRQ_NTC_WARN_CH4_MASK),
135
+
REGMAP_IRQ_REG(S2MPG11_IRQ_NTC_WARN_CH5, 5, S2MPG11_IRQ_NTC_WARN_CH5_MASK),
136
+
REGMAP_IRQ_REG(S2MPG11_IRQ_NTC_WARN_CH6, 5, S2MPG11_IRQ_NTC_WARN_CH6_MASK),
137
+
REGMAP_IRQ_REG(S2MPG11_IRQ_NTC_WARN_CH7, 5, S2MPG11_IRQ_NTC_WARN_CH7_MASK),
81
138
};
82
139
83
140
static const struct regmap_irq s2mps11_irqs[] = {
···
245
186
REGMAP_IRQ_REG(S5M8767_IRQ_WTSR, 2, S5M8767_IRQ_WTSR_MASK),
246
187
};
247
188
248
-
/* All S2MPG10 interrupt sources are read-only and don't require clearing */
189
+
/* All S2MPG1x interrupt sources are read-only and don't require clearing */
249
190
static const struct regmap_irq_chip s2mpg10_irq_chip = {
250
191
.name = "s2mpg10",
251
192
.status_base = S2MPG10_COMMON_INT,
···
262
203
.num_regs = 6,
263
204
.irqs = s2mpg10_pmic_irqs,
264
205
.num_irqs = ARRAY_SIZE(s2mpg10_pmic_irqs),
206
+
};
207
+
208
+
static const struct regmap_irq_chip s2mpg11_irq_chip = {
209
+
.name = "s2mpg11",
210
+
.status_base = S2MPG11_COMMON_INT,
211
+
.mask_base = S2MPG11_COMMON_INT_MASK,
212
+
.num_regs = 1,
213
+
.irqs = s2mpg11_irqs,
214
+
.num_irqs = ARRAY_SIZE(s2mpg11_irqs),
215
+
};
216
+
217
+
static const struct regmap_irq_chip s2mpg11_irq_chip_pmic = {
218
+
.name = "s2mpg11-pmic",
219
+
.domain_suffix = "pmic",
220
+
.status_base = S2MPG11_PMIC_INT1,
221
+
.mask_base = S2MPG11_PMIC_INT1M,
222
+
.num_regs = 6,
223
+
.irqs = s2mpg11_pmic_irqs,
224
+
.num_irqs = ARRAY_SIZE(s2mpg11_pmic_irqs),
265
225
};
266
226
267
227
static const struct regmap_irq_chip s2mps11_irq_chip = {
···
346
268
.ack_base = S5M8767_REG_INT1,
347
269
};
348
270
349
-
static int s2mpg1x_add_chained_irq_chip(struct device *dev, struct regmap *regmap, int pirq,
350
-
struct regmap_irq_chip_data *parent,
351
-
const struct regmap_irq_chip *chip,
352
-
struct regmap_irq_chip_data **data)
271
+
static struct regmap_irq_chip_data *
272
+
s2mpg1x_add_chained_pmic(struct sec_pmic_dev *sec_pmic, int pirq,
273
+
struct regmap_irq_chip_data *parent, const struct regmap_irq_chip *chip)
353
274
{
275
+
struct device *dev = sec_pmic->dev;
276
+
struct regmap_irq_chip_data *data;
354
277
int irq, ret;
355
278
356
279
irq = regmap_irq_get_virq(parent, pirq);
357
280
if (irq < 0)
358
-
return dev_err_probe(dev, irq, "Failed to get parent vIRQ(%d) for chip %s\n", pirq,
359
-
chip->name);
281
+
return dev_err_ptr_probe(dev, irq, "Failed to get parent vIRQ(%d) for chip %s\n",
282
+
pirq, chip->name);
360
283
361
-
ret = devm_regmap_add_irq_chip(dev, regmap, irq, IRQF_ONESHOT | IRQF_SHARED, 0, chip, data);
284
+
ret = devm_regmap_add_irq_chip(dev, sec_pmic->regmap_pmic, irq,
285
+
IRQF_ONESHOT | IRQF_SHARED, 0, chip, &data);
362
286
if (ret)
363
-
return dev_err_probe(dev, ret, "Failed to add %s IRQ chip\n", chip->name);
287
+
return dev_err_ptr_probe(dev, ret, "Failed to add %s IRQ chip\n", chip->name);
364
288
365
-
return 0;
289
+
return data;
366
290
}
367
291
368
-
static int sec_irq_init_s2mpg1x(struct sec_pmic_dev *sec_pmic)
292
+
static struct regmap_irq_chip_data *sec_irq_init_s2mpg1x(struct sec_pmic_dev *sec_pmic)
369
293
{
370
294
const struct regmap_irq_chip *irq_chip, *chained_irq_chip;
371
295
struct regmap_irq_chip_data *irq_data;
···
381
301
chained_irq_chip = &s2mpg10_irq_chip_pmic;
382
302
chained_pirq = S2MPG10_COMMON_IRQ_PMIC;
383
303
break;
304
+
case S2MPG11:
305
+
irq_chip = &s2mpg11_irq_chip;
306
+
chained_irq_chip = &s2mpg11_irq_chip_pmic;
307
+
chained_pirq = S2MPG11_COMMON_IRQ_PMIC;
308
+
break;
384
309
default:
385
-
return dev_err_probe(sec_pmic->dev, -EINVAL, "Unsupported device type %d\n",
386
-
sec_pmic->device_type);
310
+
return dev_err_ptr_probe(sec_pmic->dev, -EINVAL, "Unsupported device type %d\n",
311
+
sec_pmic->device_type);
387
312
}
388
313
389
314
regmap_common = dev_get_regmap(sec_pmic->dev, "common");
390
315
if (!regmap_common)
391
-
return dev_err_probe(sec_pmic->dev, -EINVAL, "No 'common' regmap %d\n",
392
-
sec_pmic->device_type);
316
+
return dev_err_ptr_probe(sec_pmic->dev, -EINVAL, "No 'common' regmap %d\n",
317
+
sec_pmic->device_type);
393
318
394
319
ret = devm_regmap_add_irq_chip(sec_pmic->dev, regmap_common, sec_pmic->irq, IRQF_ONESHOT, 0,
395
320
irq_chip, &irq_data);
396
321
if (ret)
397
-
return dev_err_probe(sec_pmic->dev, ret, "Failed to add %s IRQ chip\n",
398
-
irq_chip->name);
322
+
return dev_err_ptr_probe(sec_pmic->dev, ret, "Failed to add %s IRQ chip\n",
323
+
irq_chip->name);
399
324
400
-
return s2mpg1x_add_chained_irq_chip(sec_pmic->dev, sec_pmic->regmap_pmic, chained_pirq,
401
-
irq_data, chained_irq_chip, &sec_pmic->irq_data);
325
+
return s2mpg1x_add_chained_pmic(sec_pmic, chained_pirq, irq_data, chained_irq_chip);
402
326
}
403
327
404
-
int sec_irq_init(struct sec_pmic_dev *sec_pmic)
328
+
struct regmap_irq_chip_data *sec_irq_init(struct sec_pmic_dev *sec_pmic)
405
329
{
330
+
struct regmap_irq_chip_data *sec_irq_chip_data;
406
331
const struct regmap_irq_chip *sec_irq_chip;
407
332
int ret;
408
333
···
416
331
sec_irq_chip = &s5m8767_irq_chip;
417
332
break;
418
333
case S2DOS05:
419
-
return 0;
334
+
return NULL;
420
335
case S2MPA01:
421
336
sec_irq_chip = &s2mps14_irq_chip;
422
337
break;
423
338
case S2MPG10:
339
+
case S2MPG11:
424
340
return sec_irq_init_s2mpg1x(sec_pmic);
425
341
case S2MPS11X:
426
342
sec_irq_chip = &s2mps11_irq_chip;
···
442
356
sec_irq_chip = &s2mpu05_irq_chip;
443
357
break;
444
358
default:
445
-
return dev_err_probe(sec_pmic->dev, -EINVAL,
446
-
"Unsupported device type %d\n",
447
-
sec_pmic->device_type);
359
+
return dev_err_ptr_probe(sec_pmic->dev, -EINVAL, "Unsupported device type %d\n",
360
+
sec_pmic->device_type);
448
361
}
449
362
450
363
if (!sec_pmic->irq) {
451
364
dev_warn(sec_pmic->dev,
452
365
"No interrupt specified, no interrupts\n");
453
-
return 0;
366
+
return NULL;
454
367
}
455
368
456
369
ret = devm_regmap_add_irq_chip(sec_pmic->dev, sec_pmic->regmap_pmic,
457
370
sec_pmic->irq, IRQF_ONESHOT,
458
-
0, sec_irq_chip, &sec_pmic->irq_data);
371
+
0, sec_irq_chip, &sec_irq_chip_data);
459
372
if (ret)
460
-
return dev_err_probe(sec_pmic->dev, ret,
461
-
"Failed to add %s IRQ chip\n",
462
-
sec_irq_chip->name);
373
+
return dev_err_ptr_probe(sec_pmic->dev, ret, "Failed to add %s IRQ chip\n",
374
+
sec_irq_chip->name);
463
375
464
-
/*
465
-
* The rtc-s5m driver requests S2MPS14_IRQ_RTCA0 also for S2MPS11
466
-
* so the interrupt number must be consistent.
467
-
*/
468
-
BUILD_BUG_ON(((enum s2mps14_irq)S2MPS11_IRQ_RTCA0) != S2MPS14_IRQ_RTCA0);
469
-
470
-
return 0;
376
+
return sec_irq_chip_data;
471
377
}
+29
drivers/regulator/Kconfig
+29
drivers/regulator/Kconfig
···
659
659
Semiconductor. This device has a SIMO with three independent
660
660
power rails and an LDO.
661
661
662
+
config REGULATOR_MAX77675
663
+
tristate "Maxim MAX77675 regulator driver"
664
+
depends on I2C && OF
665
+
select REGMAP_I2C
666
+
help
667
+
This driver controls the Maxim MAX77675 power regulator via I2C.
668
+
It supports four programmable buck-boost outputs.
669
+
Say Y here to enable the regulator driver
670
+
662
671
config REGULATOR_MAX77857
663
672
tristate "ADI MAX77857/MAX77831 regulator support"
664
673
depends on I2C
···
1403
1394
It can support up to 14A output current and adjustable output voltage
1404
1395
from 0.4375V to 1.3875V, per step 12.5mV.
1405
1396
1397
+
config REGULATOR_RT8092
1398
+
tristate "Richtek RT8092 voltage regulator"
1399
+
depends on I2C
1400
+
select REGMAP_I2C
1401
+
help
1402
+
The RT8092 is a peak-current mode PWM step-down DC/DC converter with
1403
+
I2C control interface. It is capable of delivering 4A continuing
1404
+
current over a wide input range from 2.5V to 5.5V.
1405
+
1406
1406
config REGULATOR_RTQ2134
1407
1407
tristate "Richtek RTQ2134 SubPMIC Regulator"
1408
1408
depends on I2C
···
1707
1689
help
1708
1690
This driver supports TPS65132 single inductor - dual output
1709
1691
power supply specifically designed for display panels.
1692
+
1693
+
config REGULATOR_TPS65185
1694
+
tristate "TI TPS65185 EPD regulator"
1695
+
depends on I2C
1696
+
select REGMAP_I2C
1697
+
help
1698
+
This driver supports the TPS65185 voltage regulator chip
1699
+
which is used to provide power to Electronic Paper Displays
1700
+
so it is found in E-Book readers.
1701
+
If HWWON is enabled, it also provides temperature measurement.
1702
+
1710
1703
1711
1704
config REGULATOR_TPS65217
1712
1705
tristate "TI TPS65217 Power regulators"
+3
drivers/regulator/Makefile
+3
drivers/regulator/Makefile
···
79
79
obj-$(CONFIG_REGULATOR_MAX77541) += max77541-regulator.o
80
80
obj-$(CONFIG_REGULATOR_MAX77620) += max77620-regulator.o
81
81
obj-$(CONFIG_REGULATOR_MAX77650) += max77650-regulator.o
82
+
obj-$(CONFIG_REGULATOR_MAX77675) += max77675-regulator.o
82
83
obj-$(CONFIG_REGULATOR_MAX8649) += max8649.o
83
84
obj-$(CONFIG_REGULATOR_MAX8660) += max8660.o
84
85
obj-$(CONFIG_REGULATOR_MAX8893) += max8893.o
···
162
161
obj-$(CONFIG_REGULATOR_RT6160) += rt6160-regulator.o
163
162
obj-$(CONFIG_REGULATOR_RT6190) += rt6190-regulator.o
164
163
obj-$(CONFIG_REGULATOR_RT6245) += rt6245-regulator.o
164
+
obj-$(CONFIG_REGULATOR_RT8092) += rt8092.o
165
165
obj-$(CONFIG_REGULATOR_RTMV20) += rtmv20-regulator.o
166
166
obj-$(CONFIG_REGULATOR_RTQ2134) += rtq2134-regulator.o
167
167
obj-$(CONFIG_REGULATOR_RTQ6752) += rtq6752-regulator.o
···
194
192
obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o
195
193
obj-$(CONFIG_REGULATOR_TPS65086) += tps65086-regulator.o
196
194
obj-$(CONFIG_REGULATOR_TPS65090) += tps65090-regulator.o
195
+
obj-$(CONFIG_REGULATOR_TPS65185) += tps65185.o
197
196
obj-$(CONFIG_REGULATOR_TPS65217) += tps65217-regulator.o
198
197
obj-$(CONFIG_REGULATOR_TPS65218) += tps65218-regulator.o
199
198
obj-$(CONFIG_REGULATOR_TPS65219) += tps65219-regulator.o
+256
-103
drivers/regulator/core.c
+256
-103
drivers/regulator/core.c
···
44
44
static LIST_HEAD(regulator_coupler_list);
45
45
static bool has_full_constraints;
46
46
47
+
static const struct bus_type regulator_bus;
48
+
47
49
static struct dentry *debugfs_root;
48
50
49
51
/*
···
98
96
unsigned long event;
99
97
};
100
98
99
+
static int _regulator_enable(struct regulator *regulator);
101
100
static int _regulator_is_enabled(struct regulator_dev *rdev);
102
101
static int _regulator_disable(struct regulator *regulator);
103
102
static int _regulator_get_error_flags(struct regulator_dev *rdev, unsigned int *flags);
···
1186
1183
count += scnprintf(buf + count, len - count, "standby ");
1187
1184
1188
1185
if (constraints->pw_budget_mW)
1189
-
count += scnprintf(buf + count, len - count, "%d mW budget",
1186
+
count += scnprintf(buf + count, len - count, "%d mW budget ",
1190
1187
constraints->pw_budget_mW);
1191
1188
1192
1189
if (!count)
···
1433
1430
/**
1434
1431
* set_machine_constraints - sets regulator constraints
1435
1432
* @rdev: regulator source
1433
+
* @is_locked: whether or not this is called with locks held already
1436
1434
*
1437
1435
* Allows platform initialisation code to define and constrain
1438
1436
* regulator circuits e.g. valid voltage/current ranges, etc. NOTE:
···
1443
1439
*
1444
1440
* Return: 0 on success or a negative error number on failure.
1445
1441
*/
1446
-
static int set_machine_constraints(struct regulator_dev *rdev)
1442
+
static int set_machine_constraints(struct regulator_dev *rdev,
1443
+
bool is_locked)
1447
1444
{
1448
1445
int ret = 0;
1449
1446
const struct regulator_ops *ops = rdev->desc->ops;
1447
+
1448
+
/*
1449
+
* If there is no mechanism for controlling the regulator then
1450
+
* flag it as always_on so we don't end up duplicating checks
1451
+
* for this so much. Note that we could control the state of
1452
+
* a supply to control the output on a regulator that has no
1453
+
* direct control.
1454
+
*/
1455
+
if (!rdev->ena_pin && !ops->enable) {
1456
+
if (rdev->supply_name && !rdev->supply)
1457
+
return -EPROBE_DEFER;
1458
+
1459
+
if (rdev->supply)
1460
+
rdev->constraints->always_on =
1461
+
rdev->supply->rdev->constraints->always_on;
1462
+
else
1463
+
rdev->constraints->always_on = true;
1464
+
}
1465
+
1466
+
/*
1467
+
* If we want to enable this regulator, make sure that we know the
1468
+
* supplying regulator.
1469
+
*/
1470
+
if (rdev->constraints->always_on || rdev->constraints->boot_on) {
1471
+
if (rdev->supply_name && !rdev->supply)
1472
+
return -EPROBE_DEFER;
1473
+
}
1450
1474
1451
1475
ret = machine_constraints_voltage(rdev, rdev->constraints);
1452
1476
if (ret != 0)
···
1641
1609
}
1642
1610
}
1643
1611
1644
-
/*
1645
-
* If there is no mechanism for controlling the regulator then
1646
-
* flag it as always_on so we don't end up duplicating checks
1647
-
* for this so much. Note that we could control the state of
1648
-
* a supply to control the output on a regulator that has no
1649
-
* direct control.
1650
-
*/
1651
-
if (!rdev->ena_pin && !ops->enable) {
1652
-
if (rdev->supply_name && !rdev->supply)
1653
-
return -EPROBE_DEFER;
1654
-
1655
-
if (rdev->supply)
1656
-
rdev->constraints->always_on =
1657
-
rdev->supply->rdev->constraints->always_on;
1658
-
else
1659
-
rdev->constraints->always_on = true;
1660
-
}
1661
-
1662
1612
/* If the constraints say the regulator should be on at this point
1663
1613
* and we have control then make sure it is enabled.
1664
1614
*/
1665
1615
if (rdev->constraints->always_on || rdev->constraints->boot_on) {
1666
1616
bool supply_enabled = false;
1667
1617
1668
-
/* If we want to enable this regulator, make sure that we know
1669
-
* the supplying regulator.
1670
-
*/
1671
-
if (rdev->supply_name && !rdev->supply)
1672
-
return -EPROBE_DEFER;
1673
-
1674
-
/* If supplying regulator has already been enabled,
1618
+
/* We have ensured a potential supply has been resolved above.
1619
+
*
1620
+
* If supplying regulator has already been enabled,
1675
1621
* it's not intended to have use_count increment
1676
1622
* when rdev is only boot-on.
1677
1623
*/
1678
1624
if (rdev->supply &&
1679
1625
(rdev->constraints->always_on ||
1680
1626
!regulator_is_enabled(rdev->supply))) {
1681
-
ret = regulator_enable(rdev->supply);
1627
+
ret = (is_locked
1628
+
? _regulator_enable(rdev->supply)
1629
+
: regulator_enable(rdev->supply));
1682
1630
if (ret < 0) {
1683
1631
_regulator_put(rdev->supply);
1684
1632
rdev->supply = NULL;
···
1784
1772
}
1785
1773
1786
1774
return 0;
1775
+
}
1776
+
1777
+
static void unregister_regulator_event_forwarding(struct regulator_dev *rdev)
1778
+
{
1779
+
if (!rdev->supply_fwd_nb.notifier_call)
1780
+
return;
1781
+
1782
+
regulator_unregister_notifier(rdev->supply, &rdev->supply_fwd_nb);
1783
+
rdev->supply_fwd_nb.notifier_call = NULL;
1787
1784
}
1788
1785
1789
1786
/**
···
2183
2162
struct regulator_dev *r;
2184
2163
struct device *dev = rdev->dev.parent;
2185
2164
struct ww_acquire_ctx ww_ctx;
2165
+
struct regulator *supply;
2166
+
bool do_final_setup;
2186
2167
int ret = 0;
2187
2168
2188
2169
/* No supply to resolve? */
···
2192
2169
return 0;
2193
2170
2194
2171
/* Supply already resolved? (fast-path without locking contention) */
2195
-
if (rdev->supply)
2172
+
if (rdev->supply && !rdev->constraints_pending)
2196
2173
return 0;
2197
2174
2198
2175
/* first do a dt based lookup on the node described in the virtual
···
2273
2250
2274
2251
/* Supply just resolved by a concurrent task? */
2275
2252
if (rdev->supply) {
2253
+
/* Constraints might still be pending due to concurrency. */
2254
+
bool done = !rdev->constraints_pending;
2255
+
2256
+
supply = rdev->supply;
2257
+
2276
2258
regulator_unlock_two(rdev, r, &ww_ctx);
2277
2259
put_device(&r->dev);
2278
-
goto out;
2279
-
}
2280
2260
2281
-
ret = set_supply(rdev, r);
2282
-
if (ret < 0) {
2283
-
regulator_unlock_two(rdev, r, &ww_ctx);
2284
-
put_device(&r->dev);
2285
-
goto out;
2286
-
}
2261
+
/*
2262
+
* Supply resolved by concurrent task, and constraints set as
2263
+
* well (or not required): fast path.
2264
+
*/
2265
+
if (done)
2266
+
goto out;
2287
2267
2288
-
/*
2289
-
* Automatically register for event forwarding from the new supply.
2290
-
* This creates the downstream propagation link for events like
2291
-
* under-voltage.
2292
-
*/
2293
-
ret = register_regulator_event_forwarding(rdev);
2294
-
if (ret < 0)
2295
-
rdev_warn(rdev, "Failed to register event forwarding: %pe\n",
2296
-
ERR_PTR(ret));
2297
-
2298
-
regulator_unlock_two(rdev, r, &ww_ctx);
2299
-
2300
-
/* rdev->supply was created in set_supply() */
2301
-
link_and_create_debugfs(rdev->supply, r, &rdev->dev);
2302
-
2303
-
/*
2304
-
* In set_machine_constraints() we may have turned this regulator on
2305
-
* but we couldn't propagate to the supply if it hadn't been resolved
2306
-
* yet. Do it now.
2307
-
*/
2308
-
if (rdev->use_count) {
2309
-
ret = regulator_enable(rdev->supply);
2268
+
do_final_setup = false;
2269
+
} else {
2270
+
ret = set_supply(rdev, r);
2310
2271
if (ret < 0) {
2311
-
_regulator_put(rdev->supply);
2312
-
rdev->supply = NULL;
2272
+
regulator_unlock_two(rdev, r, &ww_ctx);
2273
+
put_device(&r->dev);
2313
2274
goto out;
2314
2275
}
2276
+
2277
+
supply = rdev->supply;
2278
+
2279
+
/*
2280
+
* Automatically register for event forwarding from the new
2281
+
* supply. This creates the downstream propagation link for
2282
+
* events like under-voltage.
2283
+
*/
2284
+
ret = register_regulator_event_forwarding(rdev);
2285
+
if (ret < 0) {
2286
+
rdev_warn(rdev,
2287
+
"Failed to register event forwarding: %pe\n",
2288
+
ERR_PTR(ret));
2289
+
2290
+
goto unset_supply;
2291
+
}
2292
+
2293
+
regulator_unlock_two(rdev, r, &ww_ctx);
2294
+
2295
+
do_final_setup = true;
2315
2296
}
2316
2297
2298
+
/*
2299
+
* Now that we have the supply, we can retry setting the machine
2300
+
* constraints, if necessary.
2301
+
*/
2302
+
regulator_lock_dependent(rdev, &ww_ctx);
2303
+
if (rdev->constraints_pending) {
2304
+
if (!rdev->supply) {
2305
+
/*
2306
+
* Supply could have been released by another task that
2307
+
* failed to set the constraints or event forwarding.
2308
+
*/
2309
+
regulator_unlock_dependent(rdev, &ww_ctx);
2310
+
ret = -EPROBE_DEFER;
2311
+
goto out;
2312
+
}
2313
+
2314
+
ret = set_machine_constraints(rdev, true);
2315
+
if (ret < 0) {
2316
+
regulator_unlock_dependent(rdev, &ww_ctx);
2317
+
2318
+
rdev_warn(rdev,
2319
+
"Failed to set machine constraints: %pe\n",
2320
+
ERR_PTR(ret));
2321
+
2322
+
regulator_lock_two(rdev, r, &ww_ctx);
2323
+
2324
+
if (supply != rdev->supply) {
2325
+
/*
2326
+
* Supply could have been released by another
2327
+
* task that got here before us. If it did, it
2328
+
* will have released 'supply' (i.e. the
2329
+
* previous rdev->supply) and we shouldn't do
2330
+
* that again via unset_supply.
2331
+
*/
2332
+
regulator_unlock_two(rdev, r, &ww_ctx);
2333
+
goto out;
2334
+
}
2335
+
2336
+
unregister_regulator_event_forwarding(rdev);
2337
+
rdev->constraints_pending = true;
2338
+
goto unset_supply;
2339
+
}
2340
+
rdev->constraints_pending = false;
2341
+
}
2342
+
regulator_unlock_dependent(rdev, &ww_ctx);
2343
+
2344
+
if (!do_final_setup)
2345
+
goto out;
2346
+
2347
+
/* rdev->supply was created in set_supply() */
2348
+
link_and_create_debugfs(rdev->supply, rdev->supply->rdev, &rdev->dev);
2349
+
2317
2350
out:
2351
+
return ret;
2352
+
2353
+
unset_supply:
2354
+
lockdep_assert_held_once(&rdev->mutex.base);
2355
+
lockdep_assert_held_once(&r->mutex.base);
2356
+
rdev->supply = NULL;
2357
+
regulator_unlock_two(rdev, supply->rdev, &ww_ctx);
2358
+
2359
+
regulator_put(supply);
2360
+
2318
2361
return ret;
2319
2362
}
2320
2363
···
5781
5692
&rdev->bypass_count);
5782
5693
}
5783
5694
5784
-
static int regulator_register_resolve_supply(struct device *dev, void *data)
5785
-
{
5786
-
struct regulator_dev *rdev = dev_to_rdev(dev);
5787
-
5788
-
if (regulator_resolve_supply(rdev))
5789
-
rdev_dbg(rdev, "unable to resolve supply\n");
5790
-
5791
-
return 0;
5792
-
}
5793
-
5794
5695
int regulator_coupler_register(struct regulator_coupler *coupler)
5795
5696
{
5796
5697
mutex_lock(®ulator_list_mutex);
···
5999
5920
struct regulator_config *config = NULL;
6000
5921
static atomic_t regulator_no = ATOMIC_INIT(-1);
6001
5922
struct regulator_dev *rdev;
5923
+
bool tried_supply_resolve = false;
6002
5924
bool dangling_cfg_gpiod = false;
6003
5925
bool dangling_of_gpiod = false;
6004
5926
int ret, i;
6005
-
bool resolved_early = false;
6006
5927
6007
5928
if (cfg == NULL)
6008
5929
return ERR_PTR(-EINVAL);
···
6140
6061
goto wash;
6141
6062
}
6142
6063
6143
-
if ((rdev->supply_name && !rdev->supply) &&
6144
-
(rdev->constraints->always_on ||
6145
-
rdev->constraints->boot_on)) {
6146
-
ret = regulator_resolve_supply(rdev);
6147
-
if (ret)
6148
-
rdev_dbg(rdev, "unable to resolve supply early: %pe\n",
6149
-
ERR_PTR(ret));
6150
-
6151
-
resolved_early = true;
6152
-
}
6153
-
6154
6064
if (config->ena_gpiod) {
6155
6065
ret = regulator_ena_gpio_request(rdev, config);
6156
6066
if (ret != 0) {
···
6152
6084
dangling_of_gpiod = false;
6153
6085
}
6154
6086
6155
-
ret = set_machine_constraints(rdev);
6156
-
if (ret == -EPROBE_DEFER && !resolved_early) {
6157
-
/* Regulator might be in bypass mode and so needs its supply
6158
-
* to set the constraints
6087
+
ret = set_machine_constraints(rdev, false);
6088
+
if (ret == -EPROBE_DEFER) {
6089
+
/* Regulator might be in bypass mode or an always-on or boot-on
6090
+
* regulator and so needs its supply to set the constraints or
6091
+
* for enable.
6159
6092
*/
6160
6093
/* FIXME: this currently triggers a chicken-and-egg problem
6161
6094
* when creating -SUPPLY symlink in sysfs to a regulator
···
6166
6097
rdev->supply_name);
6167
6098
ret = regulator_resolve_supply(rdev);
6168
6099
if (!ret)
6169
-
ret = set_machine_constraints(rdev);
6100
+
ret = set_machine_constraints(rdev, false);
6170
6101
else
6171
6102
rdev_dbg(rdev, "unable to resolve supply early: %pe\n",
6172
6103
ERR_PTR(ret));
6104
+
tried_supply_resolve = true;
6173
6105
}
6174
-
if (ret < 0)
6175
-
goto wash;
6106
+
if (ret < 0) {
6107
+
if (ret != -EPROBE_DEFER)
6108
+
goto wash;
6109
+
rdev->constraints_pending = true;
6110
+
}
6176
6111
6177
6112
ret = regulator_init_coupling(rdev);
6178
6113
if (ret < 0)
···
6205
6132
if (ret != 0)
6206
6133
goto unset_supplies;
6207
6134
6135
+
if (!tried_supply_resolve) {
6136
+
/*
6137
+
* As an optimisation, try to resolve our supply (if any) now to
6138
+
* avoid adding the bus device. Errors are not fatal at this
6139
+
* stage, we'll simply try again later.
6140
+
*/
6141
+
ret = regulator_resolve_supply(rdev);
6142
+
if (ret)
6143
+
rdev_dbg(rdev,
6144
+
"unable to resolve supply (ignoring): %pe\n",
6145
+
ERR_PTR(ret));
6146
+
}
6147
+
6148
+
/*
6149
+
* If we have a supply but couldn't resolve it yet, register a device
6150
+
* with our bus, so that the bus probe gets called whenever any new
6151
+
* driver binds, allowing us to retry matching supplies and which then
6152
+
* triggers (re)probe of consumers if successful.
6153
+
*/
6154
+
if (rdev->supply_name && !rdev->supply) {
6155
+
device_initialize(&rdev->bdev);
6156
+
rdev->bdev.bus = ®ulator_bus;
6157
+
rdev->bdev.parent = &rdev->dev;
6158
+
device_set_pm_not_required(&rdev->dev);
6159
+
dev_set_name(&rdev->bdev, "%s.bdev", dev_name(&rdev->dev));
6160
+
6161
+
ret = device_add(&rdev->bdev);
6162
+
if (ret)
6163
+
goto del_cdev_and_bdev;
6164
+
}
6165
+
6208
6166
rdev_init_debugfs(rdev);
6209
6167
6210
6168
/* try to resolve regulators coupling since a new one was registered */
···
6243
6139
regulator_resolve_coupling(rdev);
6244
6140
mutex_unlock(®ulator_list_mutex);
6245
6141
6246
-
/* try to resolve regulators supply since a new one was registered */
6247
-
class_for_each_device(®ulator_class, NULL, NULL,
6248
-
regulator_register_resolve_supply);
6249
6142
kfree(config);
6250
6143
return rdev;
6251
6144
6145
+
del_cdev_and_bdev:
6146
+
if (rdev->bdev.bus == ®ulator_bus)
6147
+
put_device(&rdev->bdev);
6148
+
device_del(&rdev->dev);
6252
6149
unset_supplies:
6253
6150
mutex_lock(®ulator_list_mutex);
6254
6151
unset_regulator_supplies(rdev);
···
6302
6197
unset_regulator_supplies(rdev);
6303
6198
list_del(&rdev->list);
6304
6199
regulator_ena_gpio_free(rdev);
6200
+
if (rdev->bdev.bus == ®ulator_bus)
6201
+
/* only if the device was added in the first place */
6202
+
device_unregister(&rdev->bdev);
6305
6203
device_unregister(&rdev->dev);
6306
6204
6307
6205
mutex_unlock(®ulator_list_mutex);
···
6385
6277
.pm = ®ulator_pm_ops,
6386
6278
#endif
6387
6279
};
6280
+
6281
+
#define bdev_to_rdev(__bdev) container_of_const(__bdev, struct regulator_dev, bdev)
6282
+
6283
+
static int regulator_bus_match(struct device *bdev,
6284
+
const struct device_driver *drv)
6285
+
{
6286
+
/* Match always succeeds, we only have one driver */
6287
+
return 1;
6288
+
}
6289
+
6290
+
static int regulator_bus_probe(struct device *bdev)
6291
+
{
6292
+
struct regulator_dev *rdev = bdev_to_rdev(bdev);
6293
+
int ret;
6294
+
6295
+
ret = regulator_resolve_supply(rdev);
6296
+
if (ret)
6297
+
rdev_dbg(rdev,
6298
+
"unable to resolve supply or constraints '%s': %pe\n",
6299
+
rdev->supply_name, ERR_PTR(ret));
6300
+
else
6301
+
rdev_dbg(rdev, "resolved supply '%s'\n", rdev->supply_name);
6302
+
6303
+
return ret;
6304
+
}
6305
+
6306
+
static const struct bus_type regulator_bus = {
6307
+
.name = "regulator",
6308
+
.match = regulator_bus_match,
6309
+
.probe = regulator_bus_probe,
6310
+
};
6311
+
6312
+
static struct device_driver regulator_bus_driver = {
6313
+
.name = "regulator-bus-drv",
6314
+
.bus = ®ulator_bus,
6315
+
.suppress_bind_attrs = true,
6316
+
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
6317
+
};
6318
+
6388
6319
/**
6389
6320
* regulator_has_full_constraints - the system has fully specified constraints
6390
6321
*
···
6757
6610
{
6758
6611
int ret;
6759
6612
6613
+
ret = bus_register(®ulator_bus);
6614
+
if (ret)
6615
+
return ret;
6616
+
6760
6617
ret = class_register(®ulator_class);
6618
+
if (ret)
6619
+
goto err_class;
6620
+
6621
+
ret = driver_register(®ulator_bus_driver);
6622
+
if (ret)
6623
+
goto err_driver;
6761
6624
6762
6625
debugfs_root = debugfs_create_dir("regulator", NULL);
6763
6626
if (IS_ERR(debugfs_root))
···
6784
6627
6785
6628
regulator_coupler_register(&generic_regulator_coupler);
6786
6629
6630
+
return 0;
6631
+
6632
+
err_driver:
6633
+
class_unregister(®ulator_class);
6634
+
err_class:
6635
+
bus_unregister(®ulator_bus);
6787
6636
return ret;
6788
6637
}
6789
6638
···
6850
6687
6851
6688
static void regulator_init_complete_work_function(struct work_struct *work)
6852
6689
{
6853
-
/*
6854
-
* Regulators may had failed to resolve their input supplies
6855
-
* when were registered, either because the input supply was
6856
-
* not registered yet or because its parent device was not
6857
-
* bound yet. So attempt to resolve the input supplies for
6858
-
* pending regulators before trying to disable unused ones.
6859
-
*/
6860
-
class_for_each_device(®ulator_class, NULL, NULL,
6861
-
regulator_register_resolve_supply);
6862
-
6863
6690
/*
6864
6691
* For debugging purposes, it may be useful to prevent unused
6865
6692
* regulators from being disabled.
+1
-1
drivers/regulator/dummy.c
+1
-1
drivers/regulator/dummy.c
+1056
drivers/regulator/max77675-regulator.c
+1056
drivers/regulator/max77675-regulator.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-or-later
2
+
/*
3
+
* Copyright (c) 2025 Analog Devices, Inc.
4
+
* ADI regulator driver for MAX77675.
5
+
*/
6
+
7
+
#include <linux/module.h>
8
+
#include <linux/mod_devicetable.h>
9
+
#include <linux/cleanup.h>
10
+
#include <linux/slab.h>
11
+
#include <linux/of.h>
12
+
#include <linux/i2c.h>
13
+
#include <linux/regmap.h>
14
+
#include <linux/platform_device.h>
15
+
#include <linux/regulator/driver.h>
16
+
#include <linux/regulator/consumer.h>
17
+
#include <linux/regulator/of_regulator.h>
18
+
#include <linux/bitfield.h>
19
+
#include <linux/bitops.h>
20
+
21
+
/* Register Addresses */
22
+
#define MAX77675_REG_CNFG_GLBL_A 0x00
23
+
#define MAX77675_REG_CNFG_GLBL_B 0x01
24
+
#define MAX77675_REG_INT_GLBL 0x02
25
+
#define MAX77675_REG_INTM_GLBL 0x03
26
+
#define MAX77675_REG_STAT_GLBL 0x04
27
+
#define MAX77675_REG_ERCF_GLBL 0x05
28
+
#define MAX77675_REG_CID 0x06
29
+
#define MAX77675_REG_CNFG_SBB_TOP_A 0x07
30
+
#define MAX77675_REG_CNFG_SBB0_A 0x08
31
+
#define MAX77675_REG_CNFG_SBB0_B 0x09
32
+
#define MAX77675_REG_CNFG_SBB1_A 0x0A
33
+
#define MAX77675_REG_CNFG_SBB1_B 0x0B
34
+
#define MAX77675_REG_CNFG_SBB2_A 0x0C
35
+
#define MAX77675_REG_CNFG_SBB2_B 0x0D
36
+
#define MAX77675_REG_CNFG_SBB3_A 0x0E
37
+
#define MAX77675_REG_CNFG_SBB3_B 0x0F
38
+
#define MAX77675_REG_CNFG_SBB_TOP_B 0x10
39
+
40
+
/* CNFG_GLBL_A (0x00) bit masks and shifts */
41
+
#define MAX77675_MRT_MASK GENMASK(7, 6) /* Manual Reset Time (bits 7:6) */
42
+
#define MAX77675_MRT_SHIFT 6
43
+
#define MAX77675_PU_DIS_BIT BIT(5) /* Pullup Disable (bit 5) */
44
+
#define MAX77675_PU_DIS_SHIFT 5
45
+
#define MAX77675_BIAS_LPM_BIT BIT(4) /* Bias Low Power Mode (bit 4) */
46
+
#define MAX77675_BIAS_LPM_SHIFT 4
47
+
#define MAX77675_SIMO_CH_DIS_BIT BIT(3) /* SIMO Internal Channel Disable (bit 3) */
48
+
#define MAX77675_SIMO_CH_DIS_SHIFT 3
49
+
#define MAX77675_EN_MODE_MASK GENMASK(2, 1) /* nEN Mode (bits 2:1) */
50
+
#define MAX77675_EN_MODE_SHIFT 1
51
+
#define MAX77675_DBEN_EN_BIT BIT(0) /* Debounce Enable (bit 0) */
52
+
#define MAX77675_DBEN_EN_SHIFT 0
53
+
54
+
/* CNFG_GLBL_B (0x01) */
55
+
#define MAX77675_SFT_CTRL_MASK GENMASK(2, 0) /* Soft Start Control */
56
+
#define MAX77675_SFT_CTRL_SHIFT 0
57
+
58
+
/* INT_GLBL (0x02) bit bits and shifts */
59
+
#define MAX77675_INT_SBB3_F_BIT BIT(7)
60
+
#define MAX77675_INT_SBB3_F_SHIFT 7
61
+
#define MAX77675_INT_SBB2_F_BIT BIT(6)
62
+
#define MAX77675_INT_SBB2_F_SHIFT 6
63
+
#define MAX77675_INT_SBB1_F_BIT BIT(5)
64
+
#define MAX77675_INT_SBB1_F_SHIFT 5
65
+
#define MAX77675_INT_SBB0_F_BIT BIT(4)
66
+
#define MAX77675_INT_SBB0_F_SHIFT 4
67
+
#define MAX77675_INT_TJAL2_R_BIT BIT(3)
68
+
#define MAX77675_INT_TJAL2_R_SHIFT 3
69
+
#define MAX77675_INT_TJAL1_R_BIT BIT(2)
70
+
#define MAX77675_INT_TJAL1_R_SHIFT 2
71
+
#define MAX77675_INT_EN_R_BIT BIT(1)
72
+
#define MAX77675_INT_EN_R_SHIFT 1
73
+
#define MAX77675_INT_EN_F_BIT BIT(0)
74
+
#define MAX77675_INT_EN_F_SHIFT 0
75
+
76
+
/* INTM_GLBL (0x03) bits and shifts */
77
+
#define MAX77675_INTM_SBB3_F_BIT BIT(7)
78
+
#define MAX77675_INTM_SBB3_F_SHIFT 7
79
+
#define MAX77675_INTM_SBB2_F_BIT BIT(6)
80
+
#define MAX77675_INTM_SBB2_F_SHIFT 6
81
+
#define MAX77675_INTM_SBB1_F_BIT BIT(5)
82
+
#define MAX77675_INTM_SBB1_F_SHIFT 5
83
+
#define MAX77675_INTM_SBB0_F_BIT BIT(4)
84
+
#define MAX77675_INTM_SBB0_F_SHIFT 4
85
+
#define MAX77675_INTM_TJAL2_R_BIT BIT(3)
86
+
#define MAX77675_INTM_TJAL2_R_SHIFT 3
87
+
#define MAX77675_INTM_TJAL1_R_BIT BIT(2)
88
+
#define MAX77675_INTM_TJAL1_R_SHIFT 2
89
+
#define MAX77675_INTM_EN_R_BIT BIT(1)
90
+
#define MAX77675_INTM_EN_R_SHIFT 1
91
+
#define MAX77675_INTM_EN_F_BIT BIT(0)
92
+
#define MAX77675_INTM_EN_F_SHIFT 0
93
+
94
+
/* STAT_GLBL (0x04) bits and shifts */
95
+
#define MAX77675_STAT_SBB3_S_BIT BIT(7)
96
+
#define MAX77675_STAT_SBB3_S_SHIFT 7
97
+
#define MAX77675_STAT_SBB2_S_BIT BIT(6)
98
+
#define MAX77675_STAT_SBB2_S_SHIFT 6
99
+
#define MAX77675_STAT_SBB1_S_BIT BIT(5)
100
+
#define MAX77675_STAT_SBB1_S_SHIFT 5
101
+
#define MAX77675_STAT_SBB0_S_BIT BIT(4)
102
+
#define MAX77675_STAT_SBB0_S_SHIFT 4
103
+
#define MAX77675_STAT_TJAL2_S_BIT BIT(2)
104
+
#define MAX77675_STAT_TJAL2_S_SHIFT 2
105
+
#define MAX77675_STAT_TJAL1_S_BIT BIT(1)
106
+
#define MAX77675_STAT_TJAL1_S_SHIFT 1
107
+
#define MAX77675_STAT_STAT_EN_BIT BIT(0)
108
+
#define MAX77675_STAT_STAT_EN_SHIFT 0
109
+
110
+
#define MAX77675_STAT_STAT_EN_BIT BIT(0)
111
+
#define MAX77675_STAT_STAT_EN_SHIFT 0
112
+
113
+
/* ERCFLAG (0x05) bits and shifts */
114
+
#define MAX77675_SFT_CRST_F_BIT BIT(5) /* Software Cold Reset Flag */
115
+
#define MAX77675_SFT_CRST_F_SHIFT 5
116
+
#define MAX77675_SFT_OFF_F_BIT BIT(4) /* Software Off Flag */
117
+
#define MAX77675_SFT_OFF_F_SHIFT 4
118
+
#define MAX77675_MRST_BIT BIT(3) /* Manual Reset Timer Flag */
119
+
#define MAX77675_MRST_SHIFT 3
120
+
#define MAX77675_UVLO_BIT BIT(2) /* Undervoltage Lockout Flag */
121
+
#define MAX77675_UVLO_SHIFT 2
122
+
#define MAX77675_OVLO_BIT BIT(1) /* Overvoltage Lockout Flag */
123
+
#define MAX77675_OVLO_SHIFT 1
124
+
#define MAX77675_TOVLD_BIT BIT(0) /* Thermal Overload Flag */
125
+
#define MAX77675_TOVLD_SHIFT 0
126
+
127
+
/* CID (0x06) bits and shifts */
128
+
#define MAX77675_CID_MASK GENMASK(4, 0) /* Chip Identification Code mask */
129
+
#define MAX77675_CID_SHIFT 0 /* Starts at bit 0 */
130
+
131
+
/* CNFG_SBB_TOP_A (0x07) bits and shifts */
132
+
#define MAX77675_STEP_SZ_SBB3_BIT BIT(5)
133
+
#define MAX77675_STEP_SZ_SBB3_SHIFT 5
134
+
#define MAX77675_STEP_SZ_SBB2_BIT BIT(4)
135
+
#define MAX77675_STEP_SZ_SBB2_SHIFT 4
136
+
#define MAX77675_STEP_SZ_SBB1_BIT BIT(3)
137
+
#define MAX77675_STEP_SZ_SBB1_SHIFT 3
138
+
#define MAX77675_STEP_SZ_SBB0_BIT BIT(2)
139
+
#define MAX77675_STEP_SZ_SBB0_SHIFT 2
140
+
#define MAX77675_DRV_SBB_MASK GENMASK(1, 0)
141
+
#define MAX77675_DRV_SBB_SHIFT 0
142
+
143
+
/* CNFG_SBB0_A (0x08) bits and shifts */
144
+
#define MAX77675_TV_SBB0_MASK GENMASK(7, 0)
145
+
#define MAX77675_TV_SBB0_SHIFT 0
146
+
147
+
/* CNFG_SBB0_B (0x09) bits and shifts */
148
+
#define MAX77675_ADE_SBB0_BIT BIT(3)
149
+
#define MAX77675_ADE_SBB0_SHIFT 3
150
+
#define MAX77675_EN_SBB0_MASK GENMASK(2, 0)
151
+
#define MAX77675_EN_SBB0_SHIFT 0
152
+
153
+
/* CNFG_SBB1_A (0x0A) bits and shifts */
154
+
#define MAX77675_TV_SBB1_MASK GENMASK(7, 0)
155
+
#define MAX77675_TV_SBB1_SHIFT 0
156
+
157
+
/* CNFG_SBB1_B (0x0B) bits and shifts */
158
+
#define MAX77675_ADE_SBB1_BIT BIT(3)
159
+
#define MAX77675_ADE_SBB1_SHIFT 3
160
+
#define MAX77675_EN_SBB1_MASK GENMASK(2, 0)
161
+
#define MAX77675_EN_SBB1_SHIFT 0
162
+
163
+
/* CNFG_SBB2_A (0x0C) bits and shifts */
164
+
#define MAX77675_TV_SBB2_MASK GENMASK(7, 0)
165
+
#define MAX77675_TV_SBB2_SHIFT 0
166
+
167
+
/* CNFG_SBB2_B (0x0D) bits and shifts */
168
+
#define MAX77675_ADE_SBB2_BIT BIT(3)
169
+
#define MAX77675_ADE_SBB2_SHIFT 3
170
+
#define MAX77675_EN_SBB2_MASK GENMASK(2, 0)
171
+
#define MAX77675_EN_SBB2_SHIFT 0
172
+
173
+
/* CNFG_SBB3_A (0x0E) bits and shifts */
174
+
#define MAX77675_TV_SBB3_MASK GENMASK(7, 0)
175
+
#define MAX77675_TV_SBB3_SHIFT 0
176
+
177
+
/* CNFG_SBB3_B (0x0F) bits and shifts */
178
+
#define MAX77675_ADE_SBB3_BIT BIT(3)
179
+
#define MAX77675_ADE_SBB3_SHIFT 3
180
+
#define MAX77675_EN_SBB3_MASK GENMASK(2, 0)
181
+
#define MAX77675_EN_SBB3_SHIFT 0
182
+
183
+
#define MAX77675_EN_SBB_MASK GENMASK(2, 0)
184
+
185
+
/* CNFG_SBB_TOP_B (0x10) bits and shifts */
186
+
#define MAX77675_DVS_SLEW_BIT BIT(5)
187
+
#define MAX77675_DVS_SLEW_SHIFT 5
188
+
#define MAX77675_LAT_MODE_BIT BIT(4)
189
+
#define MAX77675_LAT_MODE_SHIFT 4
190
+
#define MAX77675_SR_SBB3_BIT BIT(3)
191
+
#define MAX77675_SR_SBB3_SHIFT 3
192
+
#define MAX77675_SR_SBB2_BIT BIT(2)
193
+
#define MAX77675_SR_SBB2_SHIFT 2
194
+
#define MAX77675_SR_SBB1_BIT BIT(1)
195
+
#define MAX77675_SR_SBB1_SHIFT 1
196
+
#define MAX77675_SR_SBB0_BIT BIT(0)
197
+
#define MAX77675_SR_SBB0_SHIFT 0
198
+
199
+
#define MAX77675_MAX_REGISTER 0x10
200
+
201
+
/* Common minimum voltage (in microvolts) */
202
+
#define MAX77675_MIN_UV 500000 // 500 mV
203
+
204
+
/* Voltage step configuration for 25mV mode */
205
+
#define MAX77675_STEP_25MV 25000 // Step size: 25 mV
206
+
#define MAX77675_MAX_UV_25MV 5500000 // Max voltage: 5.5 V
207
+
#define MAX77675_NUM_LEVELS_25MV 201 // levels = (5500mV - 500mV) / 25mV + 1
208
+
209
+
/* Voltage step configuration for 12.5mV mode */
210
+
#define MAX77675_STEP_12_5MV 12500 // Step size: 12.5 mV
211
+
#define MAX77675_MAX_UV_12_5MV 3687500 // Max voltage: 3.6875 V
212
+
#define MAX77675_NUM_LEVELS_12_5MV 255 // levels = (3687.5mV - 500mV) / 12.5mV + 1
213
+
214
+
#define MAX77675_ENABLE_OFF 0x04
215
+
#define MAX77675_ENABLE_ON 0x06
216
+
217
+
#define MAX77675_REGULATOR_AD_OFF 0x00
218
+
#define MAX77675_REGULATOR_AD_ON BIT(3)
219
+
220
+
/* FPS source */
221
+
#define MAX77675_FPS_SLOT_0 0x0
222
+
#define MAX77675_FPS_SLOT_1 0x1
223
+
#define MAX77675_FPS_SLOT_2 0x2
224
+
#define MAX77675_FPS_SLOT_3 0x3
225
+
#define MAX77675_FPS_DEF 0x4
226
+
227
+
/* nEN Manual Reset Time Configuration (MRT) */
228
+
#define MAX77675_MRT_4S 0x0
229
+
#define MAX77675_MRT_8S 0x1
230
+
#define MAX77675_MRT_12S 0x2
231
+
#define MAX77675_MRT_16S 0x3
232
+
233
+
/* nEN Mode Configuration */
234
+
#define MAX77675_EN_PUSH_BUTTON 0x0
235
+
#define MAX77675_EN_SLIDE_SWITCH 0x1
236
+
#define MAX77675_EN_LOGIC 0x2
237
+
238
+
/* Debounce Timer Enable (DBEN_nEN) */
239
+
#define MAX77675_DBEN_100US 0x0
240
+
#define MAX77675_DBEN_30000US 0x1
241
+
242
+
/* Rising slew rate control for SBB0 when ramping up */
243
+
#define MAX77675_SR_2MV_PER_US 0x0 // 2 mV/us
244
+
#define MAX77675_SR_USE_DVS 0x1 // Use DVS slew rate setting (adi,dvs-slew-rate)
245
+
246
+
/* Latency Mode */
247
+
#define MAX77675_HIGH_LATENCY_MODE 0x0 // High latency, low quiescent current (~100us)
248
+
#define MAX77675_LOW_LATENCY_MODE 0x1 // Low latency, high quiescent current (~10us)
249
+
250
+
/* Dynamic Voltage Scaling (DVS) Slew Rate */
251
+
#define MAX77675_DVS_SLEW_5MV_PER_US 0x0 // 5 mV/us
252
+
#define MAX77675_DVS_SLEW_10MV_PER_US 0x1 // 10 mV/us
253
+
254
+
/* SIMO Buck-Boost Drive Strength (All Channels) */
255
+
#define MAX77675_DRV_SBB_STRENGTH_MAX 0x0 // Maximum drive strength (~0.6 ns transition time)
256
+
#define MAX77675_DRV_SBB_STRENGTH_HIGH 0x1 // High drive strength (~1.2 ns transition time)
257
+
#define MAX77675_DRV_SBB_STRENGTH_LOW 0x2 // Low drive strength (~1.8 ns transition time)
258
+
#define MAX77675_DRV_SBB_STRENGTH_MIN 0x3 // Minimum drive strength (~8 ns transition time)
259
+
260
+
/* Regulator ID enumeration */
261
+
enum max77675_regulator_id {
262
+
MAX77675_ID_SBB0 = 0,
263
+
MAX77675_ID_SBB1,
264
+
MAX77675_ID_SBB2,
265
+
MAX77675_ID_SBB3,
266
+
MAX77675_ID_NUM_MAX,
267
+
};
268
+
269
+
struct max77675_regulator_sbb_setting {
270
+
u8 fps_slot;
271
+
bool fixed_slew_rate;
272
+
};
273
+
274
+
struct max77675_config {
275
+
u8 en_mode;
276
+
u8 voltage_change_latency;
277
+
u8 drv_sbb_strength;
278
+
u8 dvs_slew_rate;
279
+
u8 debounce_time;
280
+
u8 manual_reset_time;
281
+
bool en_pullup_disable;
282
+
bool bias_low_power_request;
283
+
bool simo_ldo_always_on;
284
+
};
285
+
286
+
struct max77675_regulator {
287
+
struct device *dev;
288
+
struct regmap *regmap;
289
+
struct max77675_config config;
290
+
struct max77675_regulator_sbb_setting sbb_setting[MAX77675_ID_NUM_MAX];
291
+
};
292
+
293
+
static int max77675_regulator_get_fps_src(struct max77675_regulator *maxreg, int id)
294
+
{
295
+
unsigned int reg_addr;
296
+
unsigned int val;
297
+
int ret;
298
+
299
+
switch (id) {
300
+
case MAX77675_ID_SBB0:
301
+
reg_addr = MAX77675_REG_CNFG_SBB0_B;
302
+
break;
303
+
case MAX77675_ID_SBB1:
304
+
reg_addr = MAX77675_REG_CNFG_SBB1_B;
305
+
break;
306
+
case MAX77675_ID_SBB2:
307
+
reg_addr = MAX77675_REG_CNFG_SBB2_B;
308
+
break;
309
+
case MAX77675_ID_SBB3:
310
+
reg_addr = MAX77675_REG_CNFG_SBB3_B;
311
+
break;
312
+
default:
313
+
dev_err(maxreg->dev, "Invalid regulator id: %d\n", id);
314
+
return -EINVAL;
315
+
}
316
+
317
+
ret = regmap_read(maxreg->regmap, reg_addr, &val);
318
+
if (ret < 0) {
319
+
dev_err(maxreg->dev, "Failed to read FPS source (reg 0x%02x): %d\n",
320
+
reg_addr, ret);
321
+
return ret;
322
+
}
323
+
324
+
return FIELD_GET(MAX77675_EN_SBB_MASK, val);
325
+
}
326
+
327
+
static int max77675_regulator_set_fps_src(struct max77675_regulator *maxreg, int id, u8 fps_src)
328
+
{
329
+
unsigned int reg_addr;
330
+
331
+
switch (id) {
332
+
case MAX77675_ID_SBB0:
333
+
reg_addr = MAX77675_REG_CNFG_SBB0_B;
334
+
break;
335
+
case MAX77675_ID_SBB1:
336
+
reg_addr = MAX77675_REG_CNFG_SBB1_B;
337
+
break;
338
+
case MAX77675_ID_SBB2:
339
+
reg_addr = MAX77675_REG_CNFG_SBB2_B;
340
+
break;
341
+
case MAX77675_ID_SBB3:
342
+
reg_addr = MAX77675_REG_CNFG_SBB3_B;
343
+
break;
344
+
default:
345
+
dev_err(maxreg->dev, "Invalid regulator id: %d\n", id);
346
+
return -EINVAL;
347
+
}
348
+
349
+
return regmap_update_bits(maxreg->regmap, reg_addr, MAX77675_EN_SBB_MASK, fps_src);
350
+
}
351
+
352
+
static int max77675_set_sbb_slew_rate_fixed(struct max77675_regulator *maxreg, int id, bool fixed)
353
+
{
354
+
u8 mask, value;
355
+
u8 slew_src_ctrl_bit = fixed ? 0 : 1;
356
+
357
+
switch (id) {
358
+
case MAX77675_ID_SBB0:
359
+
mask = MAX77675_SR_SBB0_BIT;
360
+
value = FIELD_PREP(MAX77675_SR_SBB0_BIT, slew_src_ctrl_bit);
361
+
break;
362
+
363
+
case MAX77675_ID_SBB1:
364
+
mask = MAX77675_SR_SBB1_BIT;
365
+
value = FIELD_PREP(MAX77675_SR_SBB1_BIT, slew_src_ctrl_bit);
366
+
break;
367
+
368
+
case MAX77675_ID_SBB2:
369
+
mask = MAX77675_SR_SBB2_BIT;
370
+
value = FIELD_PREP(MAX77675_SR_SBB2_BIT, slew_src_ctrl_bit);
371
+
break;
372
+
373
+
case MAX77675_ID_SBB3:
374
+
mask = MAX77675_SR_SBB3_BIT;
375
+
value = FIELD_PREP(MAX77675_SR_SBB3_BIT, slew_src_ctrl_bit);
376
+
break;
377
+
378
+
default:
379
+
return -EINVAL;
380
+
}
381
+
382
+
return regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_SBB_TOP_B, mask, value);
383
+
}
384
+
385
+
static int max77675_init_regulator(struct max77675_regulator *maxreg, int id)
386
+
{
387
+
struct max77675_regulator_sbb_setting *sbb_setting = &maxreg->sbb_setting[id];
388
+
int ret;
389
+
390
+
if (sbb_setting->fps_slot == MAX77675_FPS_DEF) {
391
+
ret = max77675_regulator_get_fps_src(maxreg, id);
392
+
if (ret < 0)
393
+
return ret;
394
+
395
+
sbb_setting->fps_slot = ret;
396
+
} else {
397
+
ret = max77675_regulator_set_fps_src(maxreg, id, sbb_setting->fps_slot);
398
+
if (ret < 0)
399
+
return ret;
400
+
}
401
+
402
+
ret = max77675_set_sbb_slew_rate_fixed(maxreg, id, sbb_setting->fixed_slew_rate);
403
+
if (ret < 0)
404
+
return ret;
405
+
406
+
return 0;
407
+
}
408
+
409
+
static int max77675_of_parse_cb(struct device_node *np,
410
+
const struct regulator_desc *desc,
411
+
struct regulator_config *config)
412
+
{
413
+
struct max77675_regulator *maxreg = config->driver_data;
414
+
struct max77675_regulator_sbb_setting *sbb_setting = &maxreg->sbb_setting[desc->id];
415
+
static const char * const fps_slots[] = { "slot0", "slot1", "slot2", "slot3", "default" };
416
+
const char *fps_str;
417
+
int slot;
418
+
419
+
/* Parse FPS slot from DT */
420
+
if (of_property_read_string(np, "adi,fps-slot", &fps_str)) {
421
+
/* Property not set, use default */
422
+
sbb_setting->fps_slot = MAX77675_FPS_DEF;
423
+
} else {
424
+
/* Match string to index */
425
+
slot = match_string(fps_slots, ARRAY_SIZE(fps_slots), fps_str);
426
+
if (slot < 0) {
427
+
dev_dbg(maxreg->dev, "Invalid fps-slot '%s', using default\n", fps_str);
428
+
sbb_setting->fps_slot = MAX77675_FPS_DEF;
429
+
} else {
430
+
sbb_setting->fps_slot = slot;
431
+
}
432
+
}
433
+
434
+
/* Parse slew rate control source */
435
+
sbb_setting->fixed_slew_rate = of_property_read_bool(np, "adi,fixed-slew-rate");
436
+
437
+
/* Apply parsed configuration */
438
+
return max77675_init_regulator(maxreg, desc->id);
439
+
}
440
+
441
+
static int max77675_get_error_flags(struct regulator_dev *rdev, unsigned int *flags)
442
+
{
443
+
struct max77675_regulator *maxreg = rdev_get_drvdata(rdev);
444
+
unsigned int int_flags;
445
+
int id = rdev_get_id(rdev);
446
+
int ret;
447
+
448
+
ret = regmap_read(maxreg->regmap, MAX77675_REG_INT_GLBL, &int_flags);
449
+
if (ret) {
450
+
dev_err(maxreg->dev, "Failed to read INT_GLBL: %d\n", ret);
451
+
return ret;
452
+
}
453
+
454
+
*flags = 0;
455
+
456
+
switch (id) {
457
+
case MAX77675_ID_SBB0:
458
+
if (int_flags & MAX77675_INT_SBB0_F_BIT)
459
+
*flags |= REGULATOR_ERROR_FAIL;
460
+
break;
461
+
case MAX77675_ID_SBB1:
462
+
if (int_flags & MAX77675_INT_SBB1_F_BIT)
463
+
*flags |= REGULATOR_ERROR_FAIL;
464
+
break;
465
+
case MAX77675_ID_SBB2:
466
+
if (int_flags & MAX77675_INT_SBB2_F_BIT)
467
+
*flags |= REGULATOR_ERROR_FAIL;
468
+
break;
469
+
case MAX77675_ID_SBB3:
470
+
if (int_flags & MAX77675_INT_SBB3_F_BIT)
471
+
*flags |= REGULATOR_ERROR_FAIL;
472
+
break;
473
+
default:
474
+
dev_warn(maxreg->dev, "Unsupported regulator ID: %d\n", id);
475
+
break;
476
+
}
477
+
478
+
if (int_flags & MAX77675_INT_TJAL2_R_BIT) {
479
+
/* TJAL2 interrupt: Over-temperature condition (above 120 degree) */
480
+
*flags |= REGULATOR_ERROR_OVER_TEMP;
481
+
}
482
+
483
+
return 0;
484
+
}
485
+
486
+
static const struct regulator_ops max77675_regulator_ops = {
487
+
.list_voltage = regulator_list_voltage_linear,
488
+
.enable = regulator_enable_regmap,
489
+
.disable = regulator_disable_regmap,
490
+
.is_enabled = regulator_is_enabled_regmap,
491
+
.map_voltage = regulator_map_voltage_linear,
492
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
493
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
494
+
.set_active_discharge = regulator_set_active_discharge_regmap,
495
+
.get_error_flags = max77675_get_error_flags,
496
+
};
497
+
498
+
static struct regulator_desc max77675_regulators[MAX77675_ID_NUM_MAX] = {
499
+
{
500
+
.name = "sbb0",
501
+
.of_match = of_match_ptr("sbb0"),
502
+
.regulators_node = of_match_ptr("regulators"),
503
+
.of_parse_cb = max77675_of_parse_cb,
504
+
.id = MAX77675_ID_SBB0,
505
+
.ops = &max77675_regulator_ops,
506
+
.type = REGULATOR_VOLTAGE,
507
+
.owner = THIS_MODULE,
508
+
.n_voltages = MAX77675_NUM_LEVELS_25MV,
509
+
.min_uV = MAX77675_MIN_UV,
510
+
.uV_step = MAX77675_STEP_25MV,
511
+
.vsel_reg = MAX77675_REG_CNFG_SBB0_A,
512
+
.vsel_mask = MAX77675_TV_SBB0_MASK,
513
+
.enable_reg = MAX77675_REG_CNFG_SBB0_B,
514
+
.enable_mask = MAX77675_EN_SBB0_MASK,
515
+
.enable_val = MAX77675_ENABLE_ON,
516
+
.disable_val = MAX77675_ENABLE_OFF,
517
+
.active_discharge_off = MAX77675_REGULATOR_AD_OFF,
518
+
.active_discharge_on = MAX77675_REGULATOR_AD_ON,
519
+
.active_discharge_mask = MAX77675_ADE_SBB0_BIT,
520
+
.active_discharge_reg = MAX77675_REG_CNFG_SBB0_B,
521
+
},
522
+
{
523
+
.name = "sbb1",
524
+
.of_match = of_match_ptr("sbb1"),
525
+
.regulators_node = of_match_ptr("regulators"),
526
+
.of_parse_cb = max77675_of_parse_cb,
527
+
.id = MAX77675_ID_SBB1,
528
+
.ops = &max77675_regulator_ops,
529
+
.type = REGULATOR_VOLTAGE,
530
+
.owner = THIS_MODULE,
531
+
.n_voltages = MAX77675_NUM_LEVELS_25MV,
532
+
.min_uV = MAX77675_MIN_UV,
533
+
.uV_step = MAX77675_STEP_25MV,
534
+
.vsel_reg = MAX77675_REG_CNFG_SBB1_A,
535
+
.vsel_mask = MAX77675_TV_SBB1_MASK,
536
+
.enable_reg = MAX77675_REG_CNFG_SBB1_B,
537
+
.enable_mask = MAX77675_EN_SBB1_MASK,
538
+
.enable_val = MAX77675_ENABLE_ON,
539
+
.disable_val = MAX77675_ENABLE_OFF,
540
+
.active_discharge_off = MAX77675_REGULATOR_AD_OFF,
541
+
.active_discharge_on = MAX77675_REGULATOR_AD_ON,
542
+
.active_discharge_mask = MAX77675_ADE_SBB1_BIT,
543
+
.active_discharge_reg = MAX77675_REG_CNFG_SBB1_B,
544
+
},
545
+
{
546
+
.name = "sbb2",
547
+
.of_match = of_match_ptr("sbb2"),
548
+
.regulators_node = of_match_ptr("regulators"),
549
+
.of_parse_cb = max77675_of_parse_cb,
550
+
.id = MAX77675_ID_SBB2,
551
+
.ops = &max77675_regulator_ops,
552
+
.type = REGULATOR_VOLTAGE,
553
+
.owner = THIS_MODULE,
554
+
.n_voltages = MAX77675_NUM_LEVELS_25MV,
555
+
.min_uV = MAX77675_MIN_UV,
556
+
.uV_step = MAX77675_STEP_25MV,
557
+
.vsel_reg = MAX77675_REG_CNFG_SBB2_A,
558
+
.vsel_mask = MAX77675_TV_SBB2_MASK,
559
+
.enable_reg = MAX77675_REG_CNFG_SBB2_B,
560
+
.enable_mask = MAX77675_EN_SBB2_MASK,
561
+
.enable_val = MAX77675_ENABLE_ON,
562
+
.disable_val = MAX77675_ENABLE_OFF,
563
+
.active_discharge_off = MAX77675_REGULATOR_AD_OFF,
564
+
.active_discharge_on = MAX77675_REGULATOR_AD_ON,
565
+
.active_discharge_mask = MAX77675_ADE_SBB2_BIT,
566
+
.active_discharge_reg = MAX77675_REG_CNFG_SBB2_B,
567
+
},
568
+
{
569
+
.name = "sbb3",
570
+
.of_match = of_match_ptr("sbb3"),
571
+
.regulators_node = of_match_ptr("regulators"),
572
+
.of_parse_cb = max77675_of_parse_cb,
573
+
.id = MAX77675_ID_SBB3,
574
+
.ops = &max77675_regulator_ops,
575
+
.type = REGULATOR_VOLTAGE,
576
+
.owner = THIS_MODULE,
577
+
.n_voltages = MAX77675_NUM_LEVELS_25MV,
578
+
.min_uV = MAX77675_MIN_UV,
579
+
.uV_step = MAX77675_STEP_25MV,
580
+
.vsel_reg = MAX77675_REG_CNFG_SBB3_A,
581
+
.vsel_mask = MAX77675_TV_SBB3_MASK,
582
+
.enable_reg = MAX77675_REG_CNFG_SBB3_B,
583
+
.enable_mask = MAX77675_EN_SBB3_MASK,
584
+
.enable_val = MAX77675_ENABLE_ON,
585
+
.disable_val = MAX77675_ENABLE_OFF,
586
+
.active_discharge_off = MAX77675_REGULATOR_AD_OFF,
587
+
.active_discharge_on = MAX77675_REGULATOR_AD_ON,
588
+
.active_discharge_mask = MAX77675_ADE_SBB3_BIT,
589
+
.active_discharge_reg = MAX77675_REG_CNFG_SBB3_B,
590
+
},
591
+
};
592
+
593
+
static bool max77675_volatile_reg(struct device *dev, unsigned int reg)
594
+
{
595
+
switch (reg) {
596
+
case MAX77675_REG_CNFG_GLBL_B:
597
+
/* This register can be updated by an internal state machine */
598
+
case MAX77675_REG_INT_GLBL:
599
+
case MAX77675_REG_STAT_GLBL:
600
+
case MAX77675_REG_ERCF_GLBL:
601
+
return true;
602
+
default:
603
+
return false;
604
+
}
605
+
}
606
+
607
+
static const struct regmap_config max77675_regmap_config = {
608
+
.reg_bits = 8,
609
+
.val_bits = 8,
610
+
.max_register = MAX77675_MAX_REGISTER,
611
+
.cache_type = REGCACHE_MAPLE,
612
+
.volatile_reg = max77675_volatile_reg,
613
+
};
614
+
615
+
static int max77675_apply_config(struct max77675_regulator *maxreg)
616
+
{
617
+
const struct max77675_config *cfg = &maxreg->config;
618
+
int ret;
619
+
620
+
/* Set EN pin mode */
621
+
ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A,
622
+
MAX77675_EN_MODE_MASK,
623
+
FIELD_PREP(MAX77675_EN_MODE_MASK, cfg->en_mode));
624
+
if (ret) {
625
+
dev_err(maxreg->dev, "Failed to set EN mode: %d\n", ret);
626
+
return ret;
627
+
}
628
+
629
+
/* Set the latency between output voltage change and SBBx voltage ramp start */
630
+
ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_SBB_TOP_B,
631
+
MAX77675_LAT_MODE_BIT,
632
+
FIELD_PREP(MAX77675_LAT_MODE_BIT, cfg->voltage_change_latency));
633
+
if (ret) {
634
+
dev_err(maxreg->dev, "Failed to set latency mode: %d\n", ret);
635
+
return ret;
636
+
}
637
+
638
+
/* Set drive strength */
639
+
ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_SBB_TOP_A,
640
+
MAX77675_DRV_SBB_MASK,
641
+
FIELD_PREP(MAX77675_DRV_SBB_MASK, cfg->drv_sbb_strength));
642
+
if (ret) {
643
+
dev_err(maxreg->dev, "Failed to set drive strength: %d\n", ret);
644
+
return ret;
645
+
}
646
+
647
+
/* Set DVS slew rate */
648
+
ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_SBB_TOP_B,
649
+
MAX77675_DVS_SLEW_BIT,
650
+
FIELD_PREP(MAX77675_DVS_SLEW_BIT, cfg->dvs_slew_rate));
651
+
if (ret) {
652
+
dev_err(maxreg->dev, "Failed to set DVS slew rate: %d\n", ret);
653
+
return ret;
654
+
}
655
+
656
+
/* Set debounce time for EN pin */
657
+
ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A,
658
+
MAX77675_DBEN_EN_BIT,
659
+
FIELD_PREP(MAX77675_DBEN_EN_BIT, cfg->debounce_time));
660
+
if (ret) {
661
+
dev_err(maxreg->dev, "Failed to set EN debounce time: %d\n", ret);
662
+
return ret;
663
+
}
664
+
665
+
/* Set manual reset time (MRT) for EN pin */
666
+
ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A,
667
+
MAX77675_MRT_MASK,
668
+
FIELD_PREP(MAX77675_MRT_MASK, cfg->manual_reset_time));
669
+
if (ret) {
670
+
dev_err(maxreg->dev, "Failed to set manual reset time: %d\n", ret);
671
+
return ret;
672
+
}
673
+
674
+
/* Enable or disable internal pull-up resistor on EN pin */
675
+
ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A,
676
+
MAX77675_PU_DIS_BIT,
677
+
FIELD_PREP(MAX77675_PU_DIS_BIT, cfg->en_pullup_disable));
678
+
if (ret) {
679
+
dev_err(maxreg->dev, "Failed to set EN pull-up disable: %d\n", ret);
680
+
return ret;
681
+
}
682
+
683
+
/* Request main bias to enter low-power mode */
684
+
ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A,
685
+
MAX77675_BIAS_LPM_BIT,
686
+
FIELD_PREP(MAX77675_BIAS_LPM_BIT, cfg->bias_low_power_request));
687
+
if (ret) {
688
+
dev_err(maxreg->dev, "Failed to set bias low-power request: %d\n", ret);
689
+
return ret;
690
+
}
691
+
692
+
/* Force SIMO internal LDO to always supply 1.8V */
693
+
ret = regmap_update_bits(maxreg->regmap, MAX77675_REG_CNFG_GLBL_A,
694
+
MAX77675_SIMO_CH_DIS_BIT,
695
+
FIELD_PREP(MAX77675_SIMO_CH_DIS_BIT, cfg->simo_ldo_always_on));
696
+
if (ret) {
697
+
dev_err(maxreg->dev, "Failed to set SIMO internal LDO always-on: %d\n", ret);
698
+
return ret;
699
+
}
700
+
701
+
return 0;
702
+
}
703
+
704
+
static int max77675_parse_en_mode(struct device *dev,
705
+
struct device_node *np,
706
+
u8 *en_mode)
707
+
{
708
+
static const char * const en_modes[] = {"push-button", "slide-switch", "logic"};
709
+
const char *str;
710
+
int index;
711
+
712
+
*en_mode = MAX77675_EN_SLIDE_SWITCH;
713
+
714
+
if (of_property_read_string(np, "adi,en-mode", &str))
715
+
return 0;
716
+
717
+
index = match_string(en_modes, ARRAY_SIZE(en_modes), str);
718
+
if (index < 0) {
719
+
dev_err(dev, "Invalid 'adi,en-mode' value '%s'\n", str);
720
+
return -EINVAL;
721
+
}
722
+
723
+
*en_mode = index;
724
+
725
+
return 0;
726
+
}
727
+
728
+
static int max77675_parse_voltage_change_latency(struct device *dev,
729
+
struct device_node *np,
730
+
u8 *latency_mode)
731
+
{
732
+
u32 val;
733
+
734
+
*latency_mode = MAX77675_HIGH_LATENCY_MODE;
735
+
736
+
if (!of_property_read_u32(np, "adi,voltage-change-latency-us", &val)) {
737
+
switch (val) {
738
+
case 10:
739
+
*latency_mode = MAX77675_LOW_LATENCY_MODE;
740
+
break;
741
+
case 100:
742
+
*latency_mode = MAX77675_HIGH_LATENCY_MODE;
743
+
break;
744
+
default:
745
+
dev_err(dev, "Invalid voltage-change-latency-us value: %u\n", val);
746
+
return -EINVAL;
747
+
}
748
+
}
749
+
750
+
return 0;
751
+
}
752
+
753
+
static int max77675_parse_manual_reset_time(struct device *dev,
754
+
struct device_node *np,
755
+
u8 *reset_time)
756
+
{
757
+
u32 val;
758
+
759
+
*reset_time = MAX77675_MRT_4S;
760
+
761
+
if (!of_property_read_u32(np, "reset-time-sec", &val)) {
762
+
switch (val) {
763
+
case 4:
764
+
*reset_time = MAX77675_MRT_4S;
765
+
break;
766
+
case 8:
767
+
*reset_time = MAX77675_MRT_8S;
768
+
break;
769
+
case 12:
770
+
*reset_time = MAX77675_MRT_12S;
771
+
break;
772
+
case 16:
773
+
*reset_time = MAX77675_MRT_16S;
774
+
break;
775
+
default:
776
+
dev_err(dev, "Invalid reset-time-sec value: %u\n", val);
777
+
return -EINVAL;
778
+
}
779
+
}
780
+
781
+
return 0;
782
+
}
783
+
784
+
static int max77675_parse_dvs_slew_rate(struct device *dev, struct device_node *np, u8 *slew_rate)
785
+
{
786
+
u32 val;
787
+
788
+
/* Set default: 5 mV/us */
789
+
*slew_rate = MAX77675_DVS_SLEW_5MV_PER_US;
790
+
791
+
if (!of_property_read_u32(np, "adi,dvs-slew-rate-mv-per-us", &val)) {
792
+
switch (val) {
793
+
case 5:
794
+
*slew_rate = MAX77675_DVS_SLEW_5MV_PER_US;
795
+
break;
796
+
case 10:
797
+
*slew_rate = MAX77675_DVS_SLEW_10MV_PER_US;
798
+
break;
799
+
default:
800
+
dev_err(dev, "Invalid dvs-slew-rate-mv-per-us value: %u\n", val);
801
+
return -EINVAL;
802
+
}
803
+
}
804
+
805
+
return 0;
806
+
}
807
+
808
+
static int max77675_parse_drv_sbb_strength(struct device *dev, struct device_node *np, u8 *strength)
809
+
{
810
+
static const char * const strength_names[] = {"max", "high", "low", "min"};
811
+
const char *str;
812
+
int index;
813
+
814
+
/* Set default: maximum drive strength */
815
+
*strength = MAX77675_DRV_SBB_STRENGTH_MAX;
816
+
817
+
if (of_property_read_string(np, "adi,drv-sbb-strength", &str))
818
+
return 0;
819
+
820
+
index = match_string(strength_names, ARRAY_SIZE(strength_names), str);
821
+
if (index < 0) {
822
+
dev_err(dev, "Invalid 'adi,drv-sbb-strength' value: '%s'\n", str);
823
+
return -EINVAL;
824
+
}
825
+
826
+
*strength = index;
827
+
828
+
return 0;
829
+
}
830
+
831
+
static int max77675_parse_debounce_time_us(struct device *dev,
832
+
struct device_node *np,
833
+
u8 *debounce_time)
834
+
{
835
+
u32 val;
836
+
837
+
*debounce_time = MAX77675_DBEN_100US;
838
+
839
+
if (!of_property_read_u32(np, "input-debounce", &val)) {
840
+
switch (val) {
841
+
case 100:
842
+
*debounce_time = MAX77675_DBEN_100US;
843
+
break;
844
+
case 30000:
845
+
*debounce_time = MAX77675_DBEN_30000US;
846
+
break;
847
+
default:
848
+
dev_err(dev, "Invalid input-debounce value: %u\n", val);
849
+
return -EINVAL;
850
+
}
851
+
}
852
+
853
+
return 0;
854
+
}
855
+
856
+
static int max77675_parse_config(struct max77675_regulator *maxreg)
857
+
{
858
+
struct device_node *np = maxreg->dev->of_node;
859
+
struct max77675_config *cfg = &maxreg->config;
860
+
int ret;
861
+
862
+
/* EN pin mode */
863
+
ret = max77675_parse_en_mode(maxreg->dev, np, &cfg->en_mode);
864
+
if (ret < 0)
865
+
return ret;
866
+
867
+
/* voltage change latency */
868
+
ret = max77675_parse_voltage_change_latency(maxreg->dev, np, &cfg->voltage_change_latency);
869
+
if (ret < 0)
870
+
return ret;
871
+
872
+
/* drive strength */
873
+
ret = max77675_parse_drv_sbb_strength(maxreg->dev, np, &cfg->drv_sbb_strength);
874
+
if (ret < 0)
875
+
return ret;
876
+
877
+
/* dvs slew rate */
878
+
ret = max77675_parse_dvs_slew_rate(maxreg->dev, np, &cfg->dvs_slew_rate);
879
+
if (ret < 0)
880
+
return ret;
881
+
882
+
/* Debounce time for EN pin */
883
+
ret = max77675_parse_debounce_time_us(maxreg->dev, np, &cfg->debounce_time);
884
+
if (ret < 0)
885
+
return ret;
886
+
887
+
/* Manual reset time for EN pin */
888
+
ret = max77675_parse_manual_reset_time(maxreg->dev, np, &cfg->manual_reset_time);
889
+
if (ret < 0)
890
+
return ret;
891
+
892
+
/* Disable internal pull-up resistor on EN pin */
893
+
cfg->en_pullup_disable = of_property_read_bool(np, "bias-disable");
894
+
895
+
/* Request low-power mode for main bias */
896
+
cfg->bias_low_power_request = of_property_read_bool(np, "adi,bias-low-power-request");
897
+
898
+
/* Force internal LDO to always supply 1.8V */
899
+
cfg->simo_ldo_always_on = of_property_read_bool(np, "adi,simo-ldo-always-on");
900
+
901
+
return ret;
902
+
}
903
+
904
+
static int max77675_init_event(struct max77675_regulator *maxreg)
905
+
{
906
+
unsigned int ercflag, int_glbl;
907
+
int ret;
908
+
909
+
ret = regmap_read(maxreg->regmap, MAX77675_REG_ERCF_GLBL, &ercflag);
910
+
if (ret) {
911
+
dev_err(maxreg->dev, "Failed to read CID register: %d\n", ret);
912
+
return ret;
913
+
}
914
+
915
+
ret = regmap_read(maxreg->regmap, MAX77675_REG_INT_GLBL, &int_glbl);
916
+
if (ret) {
917
+
dev_err(maxreg->dev, "Failed to read INT_GLBL register: %d\n", ret);
918
+
return ret;
919
+
}
920
+
921
+
if (ercflag & MAX77675_SFT_CRST_F_BIT)
922
+
dev_dbg(maxreg->dev, "Software Cold Reset Flag is set\n");
923
+
924
+
if (ercflag & MAX77675_SFT_OFF_F_BIT)
925
+
dev_dbg(maxreg->dev, "Software Off Flag is set\n");
926
+
927
+
if (ercflag & MAX77675_MRST_BIT)
928
+
dev_dbg(maxreg->dev, "Manual Reset Timer Flag is set\n");
929
+
930
+
if (ercflag & MAX77675_UVLO_BIT)
931
+
dev_dbg(maxreg->dev, "Undervoltage Lockout Flag is set\n");
932
+
933
+
if (ercflag & MAX77675_OVLO_BIT)
934
+
dev_dbg(maxreg->dev, "Overvoltage Lockout Flag is set\n");
935
+
936
+
if (ercflag & MAX77675_TOVLD_BIT)
937
+
dev_dbg(maxreg->dev, "Thermal Overload Flag is set\n");
938
+
939
+
if (int_glbl & MAX77675_INT_SBB3_F_BIT)
940
+
dev_dbg(maxreg->dev, "SBB3 Channel Fault Interrupt occurred\n");
941
+
942
+
if (int_glbl & MAX77675_INT_SBB2_F_BIT)
943
+
dev_dbg(maxreg->dev, "SBB2 Channel Fault Interrupt occurred\n");
944
+
945
+
if (int_glbl & MAX77675_INT_SBB1_F_BIT)
946
+
dev_dbg(maxreg->dev, "SBB1 Channel Fault Interrupt occurred\n");
947
+
948
+
if (int_glbl & MAX77675_INT_SBB0_F_BIT)
949
+
dev_dbg(maxreg->dev, "SBB0 Channel Fault Interrupt occurred\n");
950
+
951
+
if (int_glbl & MAX77675_INT_TJAL2_R_BIT)
952
+
dev_dbg(maxreg->dev, "Thermal Alarm 2 Rising Interrupt occurred\n");
953
+
954
+
if (int_glbl & MAX77675_INT_TJAL1_R_BIT)
955
+
dev_dbg(maxreg->dev, "Thermal Alarm 1 Rising Interrupt occurred\n");
956
+
957
+
if (int_glbl & MAX77675_INT_EN_R_BIT)
958
+
dev_dbg(maxreg->dev, "nEN Rising Edge Interrupt occurred\n");
959
+
960
+
if (int_glbl & MAX77675_INT_EN_F_BIT)
961
+
dev_dbg(maxreg->dev, "nEN Falling Edge Interrupt occurred\n");
962
+
963
+
return 0;
964
+
}
965
+
966
+
static int max77675_regulator_probe(struct i2c_client *client)
967
+
{
968
+
struct max77675_regulator *maxreg;
969
+
struct regulator_config config = {};
970
+
int i, ret;
971
+
972
+
maxreg = devm_kzalloc(&client->dev, sizeof(*maxreg), GFP_KERNEL);
973
+
if (!maxreg)
974
+
return -ENOMEM;
975
+
976
+
maxreg->dev = &client->dev;
977
+
978
+
maxreg->regmap = devm_regmap_init_i2c(client, &max77675_regmap_config);
979
+
if (IS_ERR(maxreg->regmap))
980
+
return dev_err_probe(maxreg->dev,
981
+
PTR_ERR(maxreg->regmap),
982
+
"Failed to init regmap\n");
983
+
984
+
ret = max77675_init_event(maxreg);
985
+
if (ret < 0)
986
+
return dev_err_probe(maxreg->dev, ret, "Failed to init event\n");
987
+
988
+
ret = max77675_parse_config(maxreg);
989
+
if (ret < 0)
990
+
return dev_err_probe(maxreg->dev, ret, "Failed to parse config\n");
991
+
992
+
ret = max77675_apply_config(maxreg);
993
+
if (ret < 0)
994
+
return dev_err_probe(maxreg->dev, ret, "Failed to apply config\n");
995
+
996
+
config.dev = &client->dev;
997
+
config.regmap = maxreg->regmap;
998
+
config.driver_data = maxreg;
999
+
1000
+
struct device_node *regulators_np __free(device_node) =
1001
+
of_get_child_by_name(client->dev.of_node, "regulators");
1002
+
if (!regulators_np) {
1003
+
dev_err(maxreg->dev, "No 'regulators' subnode found in DT\n");
1004
+
return -EINVAL;
1005
+
}
1006
+
1007
+
for (i = 0; i < MAX77675_ID_NUM_MAX; i++) {
1008
+
const struct regulator_desc *desc = &max77675_regulators[i];
1009
+
struct regulator_dev *rdev;
1010
+
1011
+
struct device_node *child_np __free(device_node) =
1012
+
of_get_child_by_name(regulators_np, desc->name);
1013
+
if (!child_np) {
1014
+
dev_warn(maxreg->dev, "No DT node for regulator %s\n", desc->name);
1015
+
continue;
1016
+
}
1017
+
1018
+
config.of_node = child_np;
1019
+
1020
+
rdev = devm_regulator_register(&client->dev, desc, &config);
1021
+
if (IS_ERR(rdev)) {
1022
+
return dev_err_probe(maxreg->dev, PTR_ERR(rdev),
1023
+
"Failed to register regulator %d (%s)\n",
1024
+
i, desc->name);
1025
+
}
1026
+
}
1027
+
1028
+
return 0;
1029
+
}
1030
+
1031
+
static const struct i2c_device_id max77675_i2c_id[] = {
1032
+
{ "max77675", 0 },
1033
+
{ }
1034
+
};
1035
+
MODULE_DEVICE_TABLE(i2c, max77675_i2c_id);
1036
+
1037
+
static const struct of_device_id __maybe_unused max77675_of_match[] = {
1038
+
{ .compatible = "adi,max77675", },
1039
+
{ }
1040
+
};
1041
+
MODULE_DEVICE_TABLE(of, max77675_of_match);
1042
+
1043
+
static struct i2c_driver max77675_regulator_driver = {
1044
+
.driver = {
1045
+
.name = "max77675",
1046
+
.of_match_table = of_match_ptr(max77675_of_match),
1047
+
},
1048
+
.probe = max77675_regulator_probe,
1049
+
.id_table = max77675_i2c_id,
1050
+
};
1051
+
1052
+
module_i2c_driver(max77675_regulator_driver);
1053
+
1054
+
MODULE_DESCRIPTION("MAX77675 Regulator Driver");
1055
+
MODULE_AUTHOR("Joan Na <joan.na@analog.com>");
1056
+
MODULE_LICENSE("GPL");
+313
drivers/regulator/rt8092.c
+313
drivers/regulator/rt8092.c
···
1
+
// SPDX-License-Identifier: GPL-2.0+
2
+
//
3
+
// Copyright (c) 2025 Richtek Technology Corp.
4
+
//
5
+
// Author: ChiYuan Huang <cy_huang@richtek.com>
6
+
7
+
#include <linux/bitfield.h>
8
+
#include <linux/bits.h>
9
+
#include <linux/gpio/consumer.h>
10
+
#include <linux/i2c.h>
11
+
#include <linux/mod_devicetable.h>
12
+
#include <linux/module.h>
13
+
#include <linux/property.h>
14
+
#include <linux/regmap.h>
15
+
#include <linux/regulator/consumer.h>
16
+
#include <linux/regulator/driver.h>
17
+
#include <linux/regulator/of_regulator.h>
18
+
19
+
#define RT8092_REG_MNTRPT 0x00
20
+
#define RT8092_REG_VOUTH 0x10
21
+
#define RT8092_REG_VOUTL 0x11
22
+
#define RT8092_REG_PWMMODE 0x14
23
+
#define RT8092_REG_EVENT 0x18
24
+
#define RT8092_REG_VBANKH 0x1C
25
+
#define RT8092_REG_VBANKL 0x1D
26
+
#define RT8092_REG_VBOUND 0x1E
27
+
28
+
#define RT8092_TSDEVT_MASK BIT(7)
29
+
#define RT8092_PGEVT_MASK BIT(0)
30
+
#define RT8092_VSEL_MASK GENMASK(6, 0)
31
+
#define RT8092_VOUTEN_MASK BIT(7)
32
+
#define RT8092_FPWML_MASK BIT(7)
33
+
#define RT8092_FPWMH_MASK BIT(6)
34
+
#define RT8092_OCPEVT_MASK BIT(7)
35
+
#define RT8092_SCPEVT_MASK BIT(4)
36
+
#define RT8092_VINUVEVT_MASK BIT(1)
37
+
#define RT8092_VBANK_MASK GENMASK(1, 0)
38
+
39
+
#define RT8092_MODE_AUTO 0
40
+
#define RT8092_MODE_FPWM 1
41
+
#define RT8092_VOUT_BASEUV 303125
42
+
#define RT8092_VOUT_STEPUV 3125
43
+
#define RT8092_VOUT_MINSEL 15
44
+
#define RT8092_NUM_VOLTS 128
45
+
#define RT8092_INITSS_US 400
46
+
47
+
static int rt8092_get_vbank_index(struct regmap *regmap, bool vsel_high, unsigned int *vbank_idx)
48
+
{
49
+
unsigned int vbank_reg = vsel_high ? RT8092_REG_VBANKH : RT8092_REG_VBANKL;
50
+
unsigned int index;
51
+
int ret;
52
+
53
+
ret = regmap_read(regmap, vbank_reg, &index);
54
+
if (ret)
55
+
return ret;
56
+
57
+
*vbank_idx = FIELD_GET(RT8092_VBANK_MASK, index);
58
+
return 0;
59
+
}
60
+
61
+
static int rt8092_set_operating_mode(struct regulator_dev *rdev, unsigned int mode)
62
+
{
63
+
const struct regulator_desc *desc = rdev->desc;
64
+
struct regmap *regmap = rdev_get_regmap(rdev);
65
+
unsigned int mode_mask, mode_val;
66
+
67
+
mode_mask = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_FPWMH_MASK : RT8092_FPWML_MASK;
68
+
69
+
switch (mode) {
70
+
case REGULATOR_MODE_FAST:
71
+
mode_val = mode_mask;
72
+
break;
73
+
case REGULATOR_MODE_NORMAL:
74
+
mode_val = 0;
75
+
break;
76
+
default:
77
+
return -EINVAL;
78
+
}
79
+
80
+
return regmap_update_bits(regmap, RT8092_REG_PWMMODE, mode_mask, mode_val);
81
+
}
82
+
83
+
static unsigned int rt8092_get_operating_mode(struct regulator_dev *rdev)
84
+
{
85
+
const struct regulator_desc *desc = rdev->desc;
86
+
struct regmap *regmap = rdev_get_regmap(rdev);
87
+
unsigned int mode_mask, mode_val;
88
+
int ret;
89
+
90
+
mode_mask = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_FPWMH_MASK : RT8092_FPWML_MASK;
91
+
92
+
ret = regmap_read(regmap, RT8092_REG_PWMMODE, &mode_val);
93
+
if (ret)
94
+
return REGULATOR_MODE_INVALID;
95
+
96
+
return mode_val & mode_mask ? REGULATOR_MODE_FAST : REGULATOR_MODE_NORMAL;
97
+
}
98
+
99
+
static int rt8092_get_error_flags(struct regulator_dev *rdev, unsigned int *flags)
100
+
{
101
+
struct regmap *regmap = rdev_get_regmap(rdev);
102
+
unsigned int mntrpt, evtrpt, events = 0;
103
+
int ret;
104
+
105
+
ret = regmap_read(regmap, RT8092_REG_MNTRPT, &mntrpt);
106
+
if (ret)
107
+
return ret;
108
+
109
+
ret = regmap_read(regmap, RT8092_REG_EVENT, &evtrpt);
110
+
if (ret)
111
+
return ret;
112
+
113
+
if (!(mntrpt & RT8092_PGEVT_MASK) || evtrpt & RT8092_VINUVEVT_MASK)
114
+
events |= REGULATOR_ERROR_UNDER_VOLTAGE;
115
+
116
+
if (mntrpt & RT8092_TSDEVT_MASK)
117
+
events |= REGULATOR_ERROR_OVER_TEMP;
118
+
119
+
if (evtrpt & RT8092_OCPEVT_MASK)
120
+
events |= REGULATOR_ERROR_OVER_CURRENT;
121
+
122
+
if (evtrpt & RT8092_SCPEVT_MASK)
123
+
events |= REGULATOR_ERROR_FAIL;
124
+
125
+
*flags = events;
126
+
return 0;
127
+
}
128
+
129
+
130
+
static int rt8092_set_suspend_voltage(struct regulator_dev *rdev, int uV)
131
+
{
132
+
const struct regulator_desc *desc = rdev->desc;
133
+
struct regmap *regmap = rdev_get_regmap(rdev);
134
+
unsigned int vsel_reg, vsel_val, vbank_idx;
135
+
bool vsel_high;
136
+
int ret;
137
+
138
+
vsel_reg = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_REG_VOUTL : RT8092_REG_VOUTH;
139
+
vsel_high = desc->vsel_reg == RT8092_REG_VOUTH;
140
+
141
+
ret = rt8092_get_vbank_index(regmap, vsel_high, &vbank_idx);
142
+
if (ret)
143
+
return ret;
144
+
145
+
/* VOUT = (BASEUV + STEPUV * VSEL) * 2^vbank_idx */
146
+
uV >>= vbank_idx;
147
+
if (uV < RT8092_VOUT_BASEUV)
148
+
return -EINVAL;
149
+
150
+
vsel_val = (uV - RT8092_VOUT_BASEUV) / RT8092_VOUT_STEPUV;
151
+
if (vsel_val < RT8092_VOUT_MINSEL || vsel_val >= RT8092_NUM_VOLTS)
152
+
return -EINVAL;
153
+
154
+
return regmap_update_bits(regmap, vsel_reg, RT8092_VSEL_MASK, vsel_val);
155
+
}
156
+
157
+
static int rt8092_set_suspend_enable(struct regulator_dev *rdev)
158
+
{
159
+
const struct regulator_desc *desc = rdev->desc;
160
+
struct regmap *regmap = rdev_get_regmap(rdev);
161
+
unsigned int enable_reg;
162
+
163
+
enable_reg = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_REG_VOUTL : RT8092_REG_VOUTH;
164
+
return regmap_set_bits(regmap, enable_reg, RT8092_VOUTEN_MASK);
165
+
}
166
+
167
+
static int rt8092_set_suspend_disable(struct regulator_dev *rdev)
168
+
{
169
+
const struct regulator_desc *desc = rdev->desc;
170
+
struct regmap *regmap = rdev_get_regmap(rdev);
171
+
unsigned int enable_reg;
172
+
173
+
enable_reg = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_REG_VOUTL : RT8092_REG_VOUTH;
174
+
return regmap_clear_bits(regmap, enable_reg, RT8092_VOUTEN_MASK);
175
+
}
176
+
177
+
static int rt8092_set_suspend_mode(struct regulator_dev *rdev, unsigned int mode)
178
+
{
179
+
const struct regulator_desc *desc = rdev->desc;
180
+
struct regmap *regmap = rdev_get_regmap(rdev);
181
+
unsigned int mode_mask, mode_val;
182
+
183
+
mode_mask = desc->vsel_reg == RT8092_REG_VOUTH ? RT8092_FPWML_MASK : RT8092_FPWMH_MASK;
184
+
185
+
switch (mode) {
186
+
case REGULATOR_MODE_FAST:
187
+
mode_val = mode_mask;
188
+
break;
189
+
case REGULATOR_MODE_NORMAL:
190
+
mode_val = 0;
191
+
break;
192
+
default:
193
+
return -EINVAL;
194
+
}
195
+
196
+
return regmap_update_bits(regmap, RT8092_REG_PWMMODE, mode_mask, mode_val);
197
+
}
198
+
199
+
static const struct regulator_ops rt8092_regulator_ops = {
200
+
.list_voltage = regulator_list_voltage_linear,
201
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
202
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
203
+
.enable = regulator_enable_regmap,
204
+
.disable = regulator_disable_regmap,
205
+
.is_enabled = regulator_is_enabled_regmap,
206
+
.set_mode = rt8092_set_operating_mode,
207
+
.get_mode = rt8092_get_operating_mode,
208
+
.get_error_flags = rt8092_get_error_flags,
209
+
.set_suspend_voltage = rt8092_set_suspend_voltage,
210
+
.set_suspend_enable = rt8092_set_suspend_enable,
211
+
.set_suspend_disable = rt8092_set_suspend_disable,
212
+
.set_suspend_mode = rt8092_set_suspend_mode,
213
+
};
214
+
215
+
static unsigned int rt8092_of_map_mode(unsigned int mode)
216
+
{
217
+
switch (mode) {
218
+
case RT8092_MODE_AUTO:
219
+
return REGULATOR_MODE_NORMAL;
220
+
case RT8092_MODE_FPWM:
221
+
return REGULATOR_MODE_FAST;
222
+
default:
223
+
return REGULATOR_MODE_INVALID;
224
+
}
225
+
}
226
+
227
+
static const struct regmap_config rt8092_regmap_cfg = {
228
+
.name = "rt8092",
229
+
.reg_bits = 8,
230
+
.val_bits = 8,
231
+
.max_register = RT8092_REG_VBOUND,
232
+
};
233
+
234
+
static int rt8092_probe(struct i2c_client *i2c)
235
+
{
236
+
unsigned int vbank_idx, min_uV, step_uV;
237
+
struct regulator_config cfg = {};
238
+
struct device *dev = &i2c->dev;
239
+
struct regulator_desc *desc;
240
+
struct regulator_dev *rdev;
241
+
struct gpio_desc *enable;
242
+
struct regmap *regmap;
243
+
bool vsel_high;
244
+
int ret;
245
+
246
+
desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
247
+
if (!desc)
248
+
return -ENOMEM;
249
+
250
+
enable = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_HIGH);
251
+
if (IS_ERR(enable))
252
+
return dev_err_probe(dev, PTR_ERR(enable), "Failed get 'enable' gpio\n");
253
+
254
+
regmap = devm_regmap_init_i2c(i2c, &rt8092_regmap_cfg);
255
+
if (IS_ERR(regmap))
256
+
return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n");
257
+
258
+
vsel_high = device_property_read_bool(dev, "richtek,vsel-active-high");
259
+
260
+
ret = rt8092_get_vbank_index(regmap, vsel_high, &vbank_idx);
261
+
if (ret)
262
+
return dev_err_probe(dev, ret, "Failed to get VOUT bank index\n");
263
+
264
+
/*
265
+
* step VOUT = STEP_UV * 2^vbank_idx
266
+
* min VOUT = (BASEUV + STEPUV * VMIN_SEL) * 2^vbank_idx
267
+
*/
268
+
step_uV = RT8092_VOUT_STEPUV << vbank_idx;
269
+
min_uV = (RT8092_VOUT_BASEUV + RT8092_VOUT_STEPUV * RT8092_VOUT_MINSEL) << vbank_idx;
270
+
271
+
desc->name = "rt8092";
272
+
desc->owner = THIS_MODULE;
273
+
desc->type = REGULATOR_VOLTAGE;
274
+
desc->ops = &rt8092_regulator_ops;
275
+
desc->n_voltages = RT8092_NUM_VOLTS;
276
+
desc->min_uV = min_uV;
277
+
desc->uV_step = step_uV;
278
+
desc->linear_min_sel = RT8092_VOUT_MINSEL;
279
+
desc->enable_reg = desc->vsel_reg = vsel_high ? RT8092_REG_VOUTH : RT8092_REG_VOUTL;
280
+
desc->vsel_mask = RT8092_VSEL_MASK;
281
+
desc->enable_mask = RT8092_VOUTEN_MASK;
282
+
desc->enable_time = RT8092_INITSS_US;
283
+
desc->of_map_mode = rt8092_of_map_mode;
284
+
285
+
cfg.dev = dev;
286
+
cfg.of_node = dev_of_node(dev);
287
+
cfg.init_data = of_get_regulator_init_data(dev, dev_of_node(dev), desc);
288
+
289
+
rdev = devm_regulator_register(dev, desc, &cfg);
290
+
if (IS_ERR(rdev))
291
+
return dev_err_probe(dev, PTR_ERR(rdev), "Failed to register regulator\n");
292
+
293
+
return 0;
294
+
}
295
+
296
+
static const struct of_device_id rt8092_device_tables[] = {
297
+
{ .compatible = "richtek,rt8092" },
298
+
{}
299
+
};
300
+
MODULE_DEVICE_TABLE(of, rt8092_device_tables);
301
+
302
+
static struct i2c_driver rt8092_driver = {
303
+
.driver = {
304
+
.name = "rt8092",
305
+
.of_match_table = rt8092_device_tables,
306
+
},
307
+
.probe = rt8092_probe,
308
+
};
309
+
module_i2c_driver(rt8092_driver);
310
+
311
+
MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
312
+
MODULE_DESCRIPTION("Richtek RT8092 Regulator Driver");
313
+
MODULE_LICENSE("GPL");
+1073
-113
drivers/regulator/s2mps11.c
+1073
-113
drivers/regulator/s2mps11.c
···
3
3
// Copyright (c) 2012-2014 Samsung Electronics Co., Ltd
4
4
// http://www.samsung.com
5
5
6
+
#include <dt-bindings/regulator/samsung,s2mpg10-regulator.h>
6
7
#include <linux/bug.h>
7
8
#include <linux/cleanup.h>
8
9
#include <linux/err.h>
···
17
16
#include <linux/regulator/machine.h>
18
17
#include <linux/regulator/of_regulator.h>
19
18
#include <linux/mfd/samsung/core.h>
19
+
#include <linux/mfd/samsung/s2mpg10.h>
20
+
#include <linux/mfd/samsung/s2mpg11.h>
20
21
#include <linux/mfd/samsung/s2mps11.h>
21
22
#include <linux/mfd/samsung/s2mps13.h>
22
23
#include <linux/mfd/samsung/s2mps14.h>
23
24
#include <linux/mfd/samsung/s2mps15.h>
24
25
#include <linux/mfd/samsung/s2mpu02.h>
25
26
#include <linux/mfd/samsung/s2mpu05.h>
27
+
28
+
enum {
29
+
S2MPG10_REGULATOR_OPS_STD,
30
+
S2MPG10_REGULATOR_OPS_EXTCONTROL,
31
+
};
26
32
27
33
/* The highest number of possible regulators for supported devices. */
28
34
#define S2MPS_REGULATOR_MAX S2MPS13_REGULATOR_MAX
···
48
40
* the suspend mode was enabled.
49
41
*/
50
42
DECLARE_BITMAP(suspend_state, S2MPS_REGULATOR_MAX);
43
+
};
51
44
52
-
/*
53
-
* Array (size: number of regulators) with GPIO-s for external
54
-
* sleep control.
55
-
*/
56
-
struct gpio_desc **ext_control_gpiod;
45
+
#define to_s2mpg10_regulator_desc(x) container_of((x), struct s2mpg10_regulator_desc, desc)
46
+
47
+
struct s2mpg10_regulator_desc {
48
+
struct regulator_desc desc;
49
+
50
+
/* Ramp rate during enable, valid for bucks only. */
51
+
unsigned int enable_ramp_rate;
52
+
53
+
/* Registers for external control of rail. */
54
+
unsigned int pctrlsel_reg;
55
+
unsigned int pctrlsel_mask;
56
+
/* Populated from DT. */
57
+
unsigned int pctrlsel_val;
57
58
};
58
59
59
60
static int get_ramp_delay(int ramp_delay)
···
261
244
case S2MPS14X:
262
245
if (test_bit(rdev_id, s2mps11->suspend_state))
263
246
val = S2MPS14_ENABLE_SUSPEND;
264
-
else if (s2mps11->ext_control_gpiod[rdev_id])
247
+
else if (rdev->ena_pin)
265
248
val = S2MPS14_ENABLE_EXT_CONTROL;
266
249
else
267
250
val = rdev->desc->enable_mask;
···
351
334
rdev->desc->enable_mask, state);
352
335
}
353
336
337
+
static int s2mps11_of_parse_gpiod(struct device_node *np,
338
+
const char *con_id, bool optional,
339
+
const struct regulator_desc *desc,
340
+
struct regulator_config *config)
341
+
{
342
+
struct gpio_desc *ena_gpiod;
343
+
int ret;
344
+
345
+
ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), con_id, 0,
346
+
GPIOD_OUT_HIGH |
347
+
GPIOD_FLAGS_BIT_NONEXCLUSIVE,
348
+
desc->name
349
+
? : dev_name(config->dev));
350
+
if (IS_ERR(ena_gpiod)) {
351
+
ret = PTR_ERR(ena_gpiod);
352
+
353
+
/* Ignore all errors except probe defer. */
354
+
if (ret == -EPROBE_DEFER)
355
+
return ret;
356
+
357
+
if (ret == -ENOENT) {
358
+
if (optional)
359
+
return 0;
360
+
361
+
dev_info(config->dev,
362
+
"No entry for control GPIO for %d/%s in node %pOF\n",
363
+
desc->id, desc->name, np);
364
+
} else {
365
+
dev_warn_probe(config->dev, ret,
366
+
"Failed to get control GPIO for %d/%s in node %pOF\n",
367
+
desc->id, desc->name, np);
368
+
}
369
+
370
+
return 0;
371
+
}
372
+
373
+
dev_info(config->dev, "Using GPIO for ext-control over %d/%s\n",
374
+
desc->id, desc->name);
375
+
376
+
config->ena_gpiod = ena_gpiod;
377
+
378
+
return 0;
379
+
}
380
+
381
+
static int s2mps11_of_parse_cb(struct device_node *np,
382
+
const struct regulator_desc *desc,
383
+
struct regulator_config *config)
384
+
{
385
+
const struct s2mps11_info *s2mps11 = config->driver_data;
386
+
387
+
if (s2mps11->dev_type == S2MPS14X)
388
+
switch (desc->id) {
389
+
case S2MPS14_LDO10:
390
+
case S2MPS14_LDO11:
391
+
case S2MPS14_LDO12:
392
+
break;
393
+
394
+
default:
395
+
return 0;
396
+
}
397
+
else
398
+
return 0;
399
+
400
+
return s2mps11_of_parse_gpiod(np, "samsung,ext-control", false, desc,
401
+
config);
402
+
}
403
+
404
+
static int s2mpg10_of_parse_cb(struct device_node *np,
405
+
const struct regulator_desc *desc,
406
+
struct regulator_config *config)
407
+
{
408
+
const struct s2mps11_info *s2mps11 = config->driver_data;
409
+
struct s2mpg10_regulator_desc *s2mpg10_desc = to_s2mpg10_regulator_desc(desc);
410
+
static const u32 ext_control_s2mpg10[] = {
411
+
[S2MPG10_EXTCTRL_PWREN] = S2MPG10_PCTRLSEL_PWREN,
412
+
[S2MPG10_EXTCTRL_PWREN_MIF] = S2MPG10_PCTRLSEL_PWREN_MIF,
413
+
[S2MPG10_EXTCTRL_AP_ACTIVE_N] = S2MPG10_PCTRLSEL_AP_ACTIVE_N,
414
+
[S2MPG10_EXTCTRL_CPUCL1_EN] = S2MPG10_PCTRLSEL_CPUCL1_EN,
415
+
[S2MPG10_EXTCTRL_CPUCL1_EN2] = S2MPG10_PCTRLSEL_CPUCL1_EN2,
416
+
[S2MPG10_EXTCTRL_CPUCL2_EN] = S2MPG10_PCTRLSEL_CPUCL2_EN,
417
+
[S2MPG10_EXTCTRL_CPUCL2_EN2] = S2MPG10_PCTRLSEL_CPUCL2_EN2,
418
+
[S2MPG10_EXTCTRL_TPU_EN] = S2MPG10_PCTRLSEL_TPU_EN,
419
+
[S2MPG10_EXTCTRL_TPU_EN2] = S2MPG10_PCTRLSEL_TPU_EN2,
420
+
[S2MPG10_EXTCTRL_TCXO_ON] = S2MPG10_PCTRLSEL_TCXO_ON,
421
+
[S2MPG10_EXTCTRL_TCXO_ON2] = S2MPG10_PCTRLSEL_TCXO_ON2,
422
+
[S2MPG10_EXTCTRL_LDO20M_EN2] = S2MPG10_PCTRLSEL_LDO20M_EN2,
423
+
[S2MPG10_EXTCTRL_LDO20M_EN] = S2MPG10_PCTRLSEL_LDO20M_EN,
424
+
};
425
+
static const u32 ext_control_s2mpg11[] = {
426
+
[S2MPG11_EXTCTRL_PWREN] = S2MPG10_PCTRLSEL_PWREN,
427
+
[S2MPG11_EXTCTRL_PWREN_MIF] = S2MPG10_PCTRLSEL_PWREN_MIF,
428
+
[S2MPG11_EXTCTRL_AP_ACTIVE_N] = S2MPG10_PCTRLSEL_AP_ACTIVE_N,
429
+
[S2MPG11_EXTCTRL_G3D_EN] = S2MPG10_PCTRLSEL_CPUCL1_EN,
430
+
[S2MPG11_EXTCTRL_G3D_EN2] = S2MPG10_PCTRLSEL_CPUCL1_EN2,
431
+
[S2MPG11_EXTCTRL_AOC_VDD] = S2MPG10_PCTRLSEL_CPUCL2_EN,
432
+
[S2MPG11_EXTCTRL_AOC_RET] = S2MPG10_PCTRLSEL_CPUCL2_EN2,
433
+
[S2MPG11_EXTCTRL_UFS_EN] = S2MPG10_PCTRLSEL_TPU_EN,
434
+
[S2MPG11_EXTCTRL_LDO13S_EN] = S2MPG10_PCTRLSEL_TPU_EN2,
435
+
};
436
+
u32 ext_control;
437
+
438
+
if (s2mps11->dev_type != S2MPG10 && s2mps11->dev_type != S2MPG11)
439
+
return 0;
440
+
441
+
if (of_property_read_u32(np, "samsung,ext-control", &ext_control))
442
+
return 0;
443
+
444
+
switch (s2mps11->dev_type) {
445
+
case S2MPG10:
446
+
switch (desc->id) {
447
+
case S2MPG10_BUCK1 ... S2MPG10_BUCK7:
448
+
case S2MPG10_BUCK10:
449
+
case S2MPG10_LDO3 ... S2MPG10_LDO19:
450
+
if (ext_control > S2MPG10_EXTCTRL_TCXO_ON2)
451
+
return -EINVAL;
452
+
break;
453
+
454
+
case S2MPG10_LDO20:
455
+
if (ext_control < S2MPG10_EXTCTRL_LDO20M_EN2 ||
456
+
ext_control > S2MPG10_EXTCTRL_LDO20M_EN)
457
+
return -EINVAL;
458
+
break;
459
+
460
+
default:
461
+
return -EINVAL;
462
+
}
463
+
464
+
if (ext_control > ARRAY_SIZE(ext_control_s2mpg10))
465
+
return -EINVAL;
466
+
ext_control = ext_control_s2mpg10[ext_control];
467
+
break;
468
+
469
+
case S2MPG11:
470
+
switch (desc->id) {
471
+
case S2MPG11_BUCK1 ... S2MPG11_BUCK3:
472
+
case S2MPG11_BUCK5:
473
+
case S2MPG11_BUCK8:
474
+
case S2MPG11_BUCK9:
475
+
case S2MPG11_BUCKD:
476
+
case S2MPG11_BUCKA:
477
+
case S2MPG11_LDO1:
478
+
case S2MPG11_LDO2:
479
+
case S2MPG11_LDO8:
480
+
case S2MPG11_LDO13:
481
+
if (ext_control > S2MPG11_EXTCTRL_LDO13S_EN)
482
+
return -EINVAL;
483
+
break;
484
+
485
+
default:
486
+
return -EINVAL;
487
+
}
488
+
489
+
if (ext_control > ARRAY_SIZE(ext_control_s2mpg11))
490
+
return -EINVAL;
491
+
ext_control = ext_control_s2mpg11[ext_control];
492
+
break;
493
+
494
+
default:
495
+
return -EINVAL;
496
+
}
497
+
498
+
/*
499
+
* If the regulator should be configured for external control, then:
500
+
* 1) the PCTRLSELx register needs to be set accordingly
501
+
* 2) regulator_desc::enable_val needs to be:
502
+
* a) updated and
503
+
* b) written to the hardware
504
+
* 3) we switch to the ::ops that provide an empty ::enable() and no
505
+
* ::disable() implementations
506
+
*
507
+
* Points 1) and 2b) will be handled in _probe(), after
508
+
* devm_regulator_register() returns, so that we can properly act on
509
+
* failures, since the regulator core ignores most return values from
510
+
* this parse callback.
511
+
*/
512
+
s2mpg10_desc->pctrlsel_val = ext_control;
513
+
s2mpg10_desc->pctrlsel_val <<= (ffs(s2mpg10_desc->pctrlsel_mask) - 1);
514
+
515
+
s2mpg10_desc->desc.enable_val = S2MPG10_PMIC_CTRL_ENABLE_EXT;
516
+
s2mpg10_desc->desc.enable_val <<= (ffs(desc->enable_mask) - 1);
517
+
518
+
++s2mpg10_desc->desc.ops;
519
+
520
+
return s2mps11_of_parse_gpiod(np, "enable", true, desc, config);
521
+
}
522
+
523
+
static int s2mpg10_enable_ext_control(struct s2mps11_info *s2mps11,
524
+
struct regulator_dev *rdev)
525
+
{
526
+
const struct s2mpg10_regulator_desc *s2mpg10_desc;
527
+
int ret;
528
+
529
+
switch (s2mps11->dev_type) {
530
+
case S2MPG10:
531
+
case S2MPG11:
532
+
s2mpg10_desc = to_s2mpg10_regulator_desc(rdev->desc);
533
+
break;
534
+
535
+
default:
536
+
return 0;
537
+
}
538
+
539
+
ret = regmap_update_bits(rdev_get_regmap(rdev),
540
+
s2mpg10_desc->pctrlsel_reg,
541
+
s2mpg10_desc->pctrlsel_mask,
542
+
s2mpg10_desc->pctrlsel_val);
543
+
if (ret)
544
+
return dev_err_probe(rdev_get_dev(rdev), ret,
545
+
"failed to configure pctrlsel for %s\n",
546
+
rdev->desc->name);
547
+
548
+
/*
549
+
* When using external control, the enable bit of the regulator still
550
+
* needs to be set. The actual state will still be determined by the
551
+
* external signal.
552
+
*/
553
+
ret = regulator_enable_regmap(rdev);
554
+
if (ret)
555
+
return dev_err_probe(rdev_get_dev(rdev), ret,
556
+
"failed to enable regulator %s\n",
557
+
rdev->desc->name);
558
+
559
+
return 0;
560
+
}
561
+
562
+
static int s2mpg10_regulator_enable_nop(struct regulator_dev *rdev)
563
+
{
564
+
/*
565
+
* We need to provide this, otherwise the regulator core's enable on
566
+
* this regulator will return a failure and subsequently disable our
567
+
* parent regulator.
568
+
*/
569
+
return 0;
570
+
}
571
+
572
+
static int s2mpg10_regulator_buck_enable_time(struct regulator_dev *rdev)
573
+
{
574
+
const struct s2mpg10_regulator_desc * const s2mpg10_desc =
575
+
to_s2mpg10_regulator_desc(rdev->desc);
576
+
const struct regulator_ops * const ops = rdev->desc->ops;
577
+
int vsel, curr_uV;
578
+
579
+
vsel = ops->get_voltage_sel(rdev);
580
+
if (vsel < 0)
581
+
return vsel;
582
+
583
+
curr_uV = ops->list_voltage(rdev, vsel);
584
+
if (curr_uV < 0)
585
+
return curr_uV;
586
+
587
+
return (rdev->desc->enable_time
588
+
+ DIV_ROUND_UP(curr_uV, s2mpg10_desc->enable_ramp_rate));
589
+
}
590
+
591
+
static int s2mpg1x_regulator_buck_set_voltage_time(struct regulator_dev *rdev,
592
+
int old_uV, int new_uV,
593
+
unsigned int ramp_reg,
594
+
unsigned int ramp_mask)
595
+
{
596
+
unsigned int ramp_sel, ramp_rate;
597
+
int ret;
598
+
599
+
if (old_uV == new_uV)
600
+
return 0;
601
+
602
+
ret = regmap_read(rdev->regmap, ramp_reg, &ramp_sel);
603
+
if (ret)
604
+
return ret;
605
+
606
+
ramp_sel &= ramp_mask;
607
+
ramp_sel >>= ffs(ramp_mask) - 1;
608
+
if (ramp_sel >= rdev->desc->n_ramp_values ||
609
+
!rdev->desc->ramp_delay_table)
610
+
return -EINVAL;
611
+
612
+
ramp_rate = rdev->desc->ramp_delay_table[ramp_sel];
613
+
614
+
return DIV_ROUND_UP(abs(new_uV - old_uV), ramp_rate);
615
+
}
616
+
617
+
static int s2mpg10_regulator_buck_set_voltage_time(struct regulator_dev *rdev,
618
+
int old_uV, int new_uV)
619
+
{
620
+
unsigned int ramp_reg;
621
+
622
+
ramp_reg = rdev->desc->ramp_reg;
623
+
if (old_uV > new_uV)
624
+
/* The downwards ramp is at a different offset. */
625
+
ramp_reg += S2MPG10_PMIC_DVS_RAMP4 - S2MPG10_PMIC_DVS_RAMP1;
626
+
627
+
return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV,
628
+
ramp_reg,
629
+
rdev->desc->ramp_mask);
630
+
}
631
+
632
+
static int s2mpg11_regulator_buck_set_voltage_time(struct regulator_dev *rdev,
633
+
int old_uV, int new_uV)
634
+
{
635
+
unsigned int ramp_mask;
636
+
637
+
ramp_mask = rdev->desc->ramp_mask;
638
+
if (old_uV > new_uV)
639
+
/* The downwards mask is at a different position. */
640
+
ramp_mask >>= 2;
641
+
642
+
return s2mpg1x_regulator_buck_set_voltage_time(rdev, old_uV, new_uV,
643
+
rdev->desc->ramp_reg,
644
+
ramp_mask);
645
+
}
646
+
647
+
/*
648
+
* We assign both, ::set_voltage_time() and ::set_voltage_time_sel(), because
649
+
* only if the latter is != NULL, the regulator core will call neither during
650
+
* DVS if the regulator is disabled. If the latter is NULL, the core always
651
+
* calls the ::set_voltage_time() callback, which would give incorrect results
652
+
* if the regulator is off.
653
+
* At the same time, we do need ::set_voltage_time() due to differing upwards
654
+
* and downwards ramps and we can not make that code dependent on the regulator
655
+
* enable state, as that would break regulator_set_voltage_time() which
656
+
* expects a correct result no matter the enable state.
657
+
*/
658
+
static const struct regulator_ops s2mpg10_reg_buck_ops[] = {
659
+
[S2MPG10_REGULATOR_OPS_STD] = {
660
+
.list_voltage = regulator_list_voltage_linear_range,
661
+
.map_voltage = regulator_map_voltage_linear_range,
662
+
.is_enabled = regulator_is_enabled_regmap,
663
+
.enable = regulator_enable_regmap,
664
+
.disable = regulator_disable_regmap,
665
+
.enable_time = s2mpg10_regulator_buck_enable_time,
666
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
667
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
668
+
.set_voltage_time = s2mpg10_regulator_buck_set_voltage_time,
669
+
.set_voltage_time_sel = regulator_set_voltage_time_sel,
670
+
.set_ramp_delay = regulator_set_ramp_delay_regmap,
671
+
},
672
+
[S2MPG10_REGULATOR_OPS_EXTCONTROL] = {
673
+
.list_voltage = regulator_list_voltage_linear_range,
674
+
.map_voltage = regulator_map_voltage_linear_range,
675
+
.enable = s2mpg10_regulator_enable_nop,
676
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
677
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
678
+
.set_voltage_time = s2mpg10_regulator_buck_set_voltage_time,
679
+
.set_voltage_time_sel = regulator_set_voltage_time_sel,
680
+
.set_ramp_delay = regulator_set_ramp_delay_regmap,
681
+
}
682
+
};
683
+
684
+
#define s2mpg10_buck_to_ramp_mask(n) (GENMASK(1, 0) << (((n) % 4) * 2))
685
+
686
+
/*
687
+
* The ramp_delay during enable is fixed (12.5mV/μs), while the ramp during
688
+
* DVS can be adjusted. Linux can adjust the ramp delay via DT, in which case
689
+
* the regulator core will modify the regulator's constraints and call our
690
+
* .set_ramp_delay() which updates the DVS ramp in ramp_reg.
691
+
* For enable, our .enable_time() unconditionally uses enable_ramp_rate
692
+
* (12.5mV/μs) while our ::set_voltage_time() takes the value in ramp_reg
693
+
* into account.
694
+
*/
695
+
#define regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, _ops, \
696
+
_vrange, _vsel_reg, _vsel_mask, _en_reg, _en_mask, \
697
+
_r_reg, _r_mask, _r_table, _r_table_sz, \
698
+
_en_time) { \
699
+
.name = "buck" _name, \
700
+
.supply_name = _supply, \
701
+
.of_match = of_match_ptr("buck" _name), \
702
+
.regulators_node = of_match_ptr("regulators"), \
703
+
.of_parse_cb = s2mpg10_of_parse_cb, \
704
+
.id = _id, \
705
+
.ops = &(_ops)[0], \
706
+
.type = REGULATOR_VOLTAGE, \
707
+
.owner = THIS_MODULE, \
708
+
.linear_ranges = _vrange, \
709
+
.n_linear_ranges = ARRAY_SIZE(_vrange), \
710
+
.n_voltages = _vrange##_count, \
711
+
.vsel_reg = _vsel_reg, \
712
+
.vsel_mask = _vsel_mask, \
713
+
.enable_reg = _en_reg, \
714
+
.enable_mask = _en_mask, \
715
+
.ramp_reg = _r_reg, \
716
+
.ramp_mask = _r_mask, \
717
+
.ramp_delay_table = _r_table, \
718
+
.n_ramp_values = _r_table_sz, \
719
+
.enable_time = _en_time, /* + V/enable_ramp_rate */ \
720
+
}
721
+
722
+
#define regulator_desc_s2mpg10_buck(_num, _vrange, _r_reg) \
723
+
regulator_desc_s2mpg1x_buck_cmn(#_num "m", S2MPG10_BUCK##_num, \
724
+
"vinb"#_num "m", s2mpg10_reg_buck_ops, _vrange, \
725
+
S2MPG10_PMIC_B##_num##M_OUT1, GENMASK(7, 0), \
726
+
S2MPG10_PMIC_B##_num##M_CTRL, GENMASK(7, 6), \
727
+
S2MPG10_PMIC_##_r_reg, \
728
+
s2mpg10_buck_to_ramp_mask(S2MPG10_BUCK##_num \
729
+
- S2MPG10_BUCK1), \
730
+
s2mpg10_buck_ramp_table, \
731
+
ARRAY_SIZE(s2mpg10_buck_ramp_table), 30)
732
+
733
+
#define s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg) \
734
+
.desc = regulator_desc_s2mpg10_buck(_num, _vrange, _r_reg), \
735
+
.enable_ramp_rate = 12500
736
+
737
+
#define s2mpg10_regulator_desc_buck_gpio(_num, _vrange, _r_reg, \
738
+
_pc_reg, _pc_mask) \
739
+
[S2MPG10_BUCK##_num] = { \
740
+
s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg), \
741
+
.pctrlsel_reg = S2MPG10_PMIC_##_pc_reg, \
742
+
.pctrlsel_mask = _pc_mask, \
743
+
}
744
+
745
+
#define s2mpg10_regulator_desc_buck(_num, _vrange, _r_reg) \
746
+
[S2MPG10_BUCK##_num] = { \
747
+
s2mpg10_regulator_desc_buck_cm(_num, _vrange, _r_reg), \
748
+
}
749
+
750
+
/* ops for S2MPG1x LDO regulators without ramp control */
751
+
static const struct regulator_ops s2mpg10_reg_ldo_ops[] = {
752
+
[S2MPG10_REGULATOR_OPS_STD] = {
753
+
.list_voltage = regulator_list_voltage_linear_range,
754
+
.map_voltage = regulator_map_voltage_linear_range,
755
+
.is_enabled = regulator_is_enabled_regmap,
756
+
.enable = regulator_enable_regmap,
757
+
.disable = regulator_disable_regmap,
758
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
759
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
760
+
.set_voltage_time_sel = regulator_set_voltage_time_sel,
761
+
},
762
+
[S2MPG10_REGULATOR_OPS_EXTCONTROL] = {
763
+
.list_voltage = regulator_list_voltage_linear_range,
764
+
.map_voltage = regulator_map_voltage_linear_range,
765
+
.enable = s2mpg10_regulator_enable_nop,
766
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
767
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
768
+
.set_voltage_time_sel = regulator_set_voltage_time_sel,
769
+
}
770
+
};
771
+
772
+
/* ops for S2MPG1x LDO regulators that have ramp control */
773
+
static const struct regulator_ops s2mpg10_reg_ldo_ramp_ops[] = {
774
+
[S2MPG10_REGULATOR_OPS_STD] = {
775
+
.list_voltage = regulator_list_voltage_linear_range,
776
+
.map_voltage = regulator_map_voltage_linear_range,
777
+
.is_enabled = regulator_is_enabled_regmap,
778
+
.enable = regulator_enable_regmap,
779
+
.disable = regulator_disable_regmap,
780
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
781
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
782
+
.set_voltage_time_sel = regulator_set_voltage_time_sel,
783
+
.set_ramp_delay = regulator_set_ramp_delay_regmap,
784
+
},
785
+
[S2MPG10_REGULATOR_OPS_EXTCONTROL] = {
786
+
.list_voltage = regulator_list_voltage_linear_range,
787
+
.map_voltage = regulator_map_voltage_linear_range,
788
+
.enable = s2mpg10_regulator_enable_nop,
789
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
790
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
791
+
.set_voltage_time_sel = regulator_set_voltage_time_sel,
792
+
.set_ramp_delay = regulator_set_ramp_delay_regmap,
793
+
}
794
+
};
795
+
796
+
#define regulator_desc_s2mpg1x_ldo_cmn(_name, _id, _supply, _ops, \
797
+
_vrange, _vsel_reg, _vsel_mask, _en_reg, _en_mask, \
798
+
_ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz) { \
799
+
.name = "ldo" _name, \
800
+
.supply_name = _supply, \
801
+
.of_match = of_match_ptr("ldo" _name), \
802
+
.regulators_node = of_match_ptr("regulators"), \
803
+
.of_parse_cb = s2mpg10_of_parse_cb, \
804
+
.id = _id, \
805
+
.ops = &(_ops)[0], \
806
+
.type = REGULATOR_VOLTAGE, \
807
+
.owner = THIS_MODULE, \
808
+
.linear_ranges = _vrange, \
809
+
.n_linear_ranges = ARRAY_SIZE(_vrange), \
810
+
.n_voltages = _vrange##_count, \
811
+
.vsel_reg = _vsel_reg, \
812
+
.vsel_mask = _vsel_mask, \
813
+
.enable_reg = _en_reg, \
814
+
.enable_mask = _en_mask, \
815
+
.ramp_delay = _ramp_delay, \
816
+
.ramp_reg = _r_reg, \
817
+
.ramp_mask = _r_mask, \
818
+
.ramp_delay_table = _r_table, \
819
+
.n_ramp_values = _r_table_sz, \
820
+
.enable_time = 130, /* startup 20+-10 + ramp 30..100μs */ \
821
+
}
822
+
823
+
#define s2mpg10_regulator_desc_ldo_cmn(_num, _supply, _ops, _vrange, \
824
+
_vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \
825
+
_ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \
826
+
_pc_reg, _pc_mask) \
827
+
[S2MPG10_LDO##_num] = { \
828
+
.desc = regulator_desc_s2mpg1x_ldo_cmn(#_num "m", \
829
+
S2MPG10_LDO##_num, _supply, _ops, \
830
+
_vrange, \
831
+
S2MPG10_PMIC_L##_num##M_##_vsel_reg_sfx, \
832
+
_vsel_mask, \
833
+
S2MPG10_PMIC_##_en_reg, _en_mask, \
834
+
_ramp_delay, _r_reg, _r_mask, _r_table, \
835
+
_r_table_sz), \
836
+
.pctrlsel_reg = _pc_reg, \
837
+
.pctrlsel_mask = _pc_mask, \
838
+
}
839
+
840
+
/* standard LDO via LxM_CTRL */
841
+
#define s2mpg10_regulator_desc_ldo(_num, _supply, _vrange) \
842
+
s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \
843
+
s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \
844
+
L##_num##M_CTRL, BIT(7), \
845
+
0, 0, 0, NULL, 0, \
846
+
0, 0)
847
+
848
+
/* standard LDO but possibly GPIO controlled */
849
+
#define s2mpg10_regulator_desc_ldo_gpio(_num, _supply, _vrange, \
850
+
_pc_reg, _pc_mask) \
851
+
s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \
852
+
s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \
853
+
L##_num##M_CTRL, GENMASK(7, 6), \
854
+
0, 0, 0, NULL, 0, \
855
+
S2MPG10_PMIC_##_pc_reg, _pc_mask)
856
+
857
+
/* LDO with ramp support and possibly GPIO controlled */
858
+
#define s2mpg10_regulator_desc_ldo_ramp(_num, _supply, _vrange, \
859
+
_en_mask, _r_reg, _pc_reg, _pc_mask) \
860
+
s2mpg10_regulator_desc_ldo_cmn(_num, _supply, \
861
+
s2mpg10_reg_ldo_ramp_ops, _vrange, CTRL1, GENMASK(6, 0), \
862
+
LDO_CTRL2, _en_mask, \
863
+
6250, S2MPG10_PMIC_##_r_reg, GENMASK(1, 0), \
864
+
s2mpg10_ldo_ramp_table, \
865
+
ARRAY_SIZE(s2mpg10_ldo_ramp_table), \
866
+
S2MPG10_PMIC_##_pc_reg, _pc_mask)
867
+
868
+
#define S2MPG10_VOLTAGE_RANGE(_prefix, _idx, _offs_uV, _min_uV, \
869
+
_max_uV, _step_uV) \
870
+
static const struct linear_range _prefix##_vranges##_idx[] = { \
871
+
REGULATOR_LINEAR_VRANGE(_offs_uV, _min_uV, _max_uV, _step_uV) \
872
+
}; \
873
+
static const unsigned int _prefix##_vranges##_idx##_count = \
874
+
((((_max_uV) - (_offs_uV)) / (_step_uV)) + 1)
875
+
876
+
/* voltage range for s2mpg10 BUCK 1, 2, 3, 4, 5, 7, 8, 9, 10 */
877
+
S2MPG10_VOLTAGE_RANGE(s2mpg10_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV);
878
+
879
+
/* voltage range for s2mpg10 BUCK 6 */
880
+
S2MPG10_VOLTAGE_RANGE(s2mpg10_buck, 6, 200000, 450000, 1350000, STEP_6_25_MV);
881
+
882
+
static const unsigned int s2mpg10_buck_ramp_table[] = {
883
+
6250, 12500, 25000
884
+
};
885
+
886
+
/* voltage range for s2mpg10 LDO 1, 11, 12 */
887
+
S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 1, 300000, 700000, 1300000, STEP_12_5_MV);
888
+
889
+
/* voltage range for s2mpg10 LDO 2, 4, 9, 14, 18, 19, 20, 23, 25, 29, 30, 31 */
890
+
S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 2, 700000, 1600000, 1950000, STEP_25_MV);
891
+
892
+
/* voltage range for s2mpg10 LDO 3, 5, 6, 8, 16, 17, 24, 28 */
893
+
S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 3, 725000, 725000, 1300000, STEP_12_5_MV);
894
+
895
+
/* voltage range for s2mpg10 LDO 7 */
896
+
S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 7, 300000, 450000, 1300000, STEP_12_5_MV);
897
+
898
+
/* voltage range for s2mpg10 LDO 13, 15 */
899
+
S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 13, 300000, 450000, 950000, STEP_12_5_MV);
900
+
901
+
/* voltage range for s2mpg10 LDO 10 */
902
+
S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 10, 1800000, 1800000, 3350000, STEP_25_MV);
903
+
904
+
/* voltage range for s2mpg10 LDO 21, 22, 26, 27 */
905
+
S2MPG10_VOLTAGE_RANGE(s2mpg10_ldo, 21, 1800000, 2500000, 3300000, STEP_25_MV);
906
+
907
+
/* possible ramp values for s2mpg10 LDO 1, 7, 11, 12, 13, 15 */
908
+
static const unsigned int s2mpg10_ldo_ramp_table[] = {
909
+
6250, 12500
910
+
};
911
+
912
+
static const struct s2mpg10_regulator_desc s2mpg10_regulators[] = {
913
+
s2mpg10_regulator_desc_buck_gpio(1, s2mpg10_buck_vranges1, DVS_RAMP1,
914
+
PCTRLSEL1, GENMASK(3, 0)),
915
+
s2mpg10_regulator_desc_buck_gpio(2, s2mpg10_buck_vranges1, DVS_RAMP1,
916
+
PCTRLSEL1, GENMASK(7, 4)),
917
+
s2mpg10_regulator_desc_buck_gpio(3, s2mpg10_buck_vranges1, DVS_RAMP1,
918
+
PCTRLSEL2, GENMASK(3, 0)),
919
+
s2mpg10_regulator_desc_buck_gpio(4, s2mpg10_buck_vranges1, DVS_RAMP1,
920
+
PCTRLSEL2, GENMASK(7, 4)),
921
+
s2mpg10_regulator_desc_buck_gpio(5, s2mpg10_buck_vranges1, DVS_RAMP2,
922
+
PCTRLSEL3, GENMASK(3, 0)),
923
+
s2mpg10_regulator_desc_buck_gpio(6, s2mpg10_buck_vranges6, DVS_RAMP2,
924
+
PCTRLSEL3, GENMASK(7, 4)),
925
+
s2mpg10_regulator_desc_buck_gpio(7, s2mpg10_buck_vranges1, DVS_RAMP2,
926
+
PCTRLSEL4, GENMASK(3, 0)),
927
+
s2mpg10_regulator_desc_buck(8, s2mpg10_buck_vranges1, DVS_RAMP2),
928
+
s2mpg10_regulator_desc_buck(9, s2mpg10_buck_vranges1, DVS_RAMP3),
929
+
s2mpg10_regulator_desc_buck_gpio(10, s2mpg10_buck_vranges1, DVS_RAMP3,
930
+
PCTRLSEL4, GENMASK(7, 4)),
931
+
/*
932
+
* Standard LDO via LxM_CTRL but non-standard (greater) V-range and with
933
+
* ramp support.
934
+
*/
935
+
s2mpg10_regulator_desc_ldo_cmn(1, "vinl3m", s2mpg10_reg_ldo_ramp_ops,
936
+
s2mpg10_ldo_vranges1,
937
+
CTRL, GENMASK(6, 0),
938
+
L1M_CTRL, BIT(7),
939
+
6250, S2MPG10_PMIC_DVS_RAMP6,
940
+
GENMASK(5, 4), s2mpg10_ldo_ramp_table,
941
+
ARRAY_SIZE(s2mpg10_ldo_ramp_table),
942
+
0, 0),
943
+
s2mpg10_regulator_desc_ldo(2, "vinl9m", s2mpg10_ldo_vranges2),
944
+
s2mpg10_regulator_desc_ldo_gpio(3, "vinl4m", s2mpg10_ldo_vranges3,
945
+
PCTRLSEL5, GENMASK(3, 0)),
946
+
s2mpg10_regulator_desc_ldo_gpio(4, "vinl9m", s2mpg10_ldo_vranges2,
947
+
PCTRLSEL5, GENMASK(7, 4)),
948
+
s2mpg10_regulator_desc_ldo_gpio(5, "vinl3m", s2mpg10_ldo_vranges3,
949
+
PCTRLSEL6, GENMASK(3, 0)),
950
+
s2mpg10_regulator_desc_ldo_gpio(6, "vinl7m", s2mpg10_ldo_vranges3,
951
+
PCTRLSEL6, GENMASK(7, 4)),
952
+
/*
953
+
* Ramp support, possibly GPIO controlled, non-standard (greater) V-
954
+
* range and enable reg & mask.
955
+
*/
956
+
s2mpg10_regulator_desc_ldo_cmn(7, "vinl3m", s2mpg10_reg_ldo_ramp_ops,
957
+
s2mpg10_ldo_vranges7,
958
+
CTRL, GENMASK(6, 0),
959
+
LDO_CTRL1, GENMASK(4, 3),
960
+
6250, S2MPG10_PMIC_DVS_RAMP6,
961
+
GENMASK(7, 6), s2mpg10_ldo_ramp_table,
962
+
ARRAY_SIZE(s2mpg10_ldo_ramp_table),
963
+
S2MPG10_PMIC_PCTRLSEL7, GENMASK(3, 0)),
964
+
s2mpg10_regulator_desc_ldo_gpio(8, "vinl4m", s2mpg10_ldo_vranges3,
965
+
PCTRLSEL7, GENMASK(7, 4)),
966
+
s2mpg10_regulator_desc_ldo_gpio(9, "vinl10m", s2mpg10_ldo_vranges2,
967
+
PCTRLSEL8, GENMASK(3, 0)),
968
+
s2mpg10_regulator_desc_ldo_gpio(10, "vinl15m", s2mpg10_ldo_vranges10,
969
+
PCTRLSEL8, GENMASK(7, 4)),
970
+
s2mpg10_regulator_desc_ldo_ramp(11, "vinl7m", s2mpg10_ldo_vranges1,
971
+
GENMASK(1, 0), DVS_SYNC_CTRL3,
972
+
PCTRLSEL9, GENMASK(3, 0)),
973
+
s2mpg10_regulator_desc_ldo_ramp(12, "vinl8m", s2mpg10_ldo_vranges1,
974
+
GENMASK(3, 2), DVS_SYNC_CTRL4,
975
+
PCTRLSEL9, GENMASK(7, 4)),
976
+
s2mpg10_regulator_desc_ldo_ramp(13, "vinl1m", s2mpg10_ldo_vranges13,
977
+
GENMASK(5, 4), DVS_SYNC_CTRL5,
978
+
PCTRLSEL10, GENMASK(3, 0)),
979
+
s2mpg10_regulator_desc_ldo_gpio(14, "vinl10m", s2mpg10_ldo_vranges2,
980
+
PCTRLSEL10, GENMASK(7, 4)),
981
+
s2mpg10_regulator_desc_ldo_ramp(15, "vinl2m", s2mpg10_ldo_vranges13,
982
+
GENMASK(7, 6), DVS_SYNC_CTRL6,
983
+
PCTRLSEL11, GENMASK(3, 0)),
984
+
s2mpg10_regulator_desc_ldo_gpio(16, "vinl5m", s2mpg10_ldo_vranges3,
985
+
PCTRLSEL11, GENMASK(7, 4)),
986
+
s2mpg10_regulator_desc_ldo_gpio(17, "vinl6m", s2mpg10_ldo_vranges3,
987
+
PCTRLSEL12, GENMASK(3, 0)),
988
+
s2mpg10_regulator_desc_ldo_gpio(18, "vinl10m", s2mpg10_ldo_vranges2,
989
+
PCTRLSEL12, GENMASK(7, 4)),
990
+
s2mpg10_regulator_desc_ldo_gpio(19, "vinl10m", s2mpg10_ldo_vranges2,
991
+
PCTRLSEL13, GENMASK(3, 0)),
992
+
s2mpg10_regulator_desc_ldo_gpio(20, "vinl10m", s2mpg10_ldo_vranges2,
993
+
PCTRLSEL13, GENMASK(7, 4)),
994
+
s2mpg10_regulator_desc_ldo(21, "vinl14m", s2mpg10_ldo_vranges21),
995
+
s2mpg10_regulator_desc_ldo(22, "vinl15m", s2mpg10_ldo_vranges21),
996
+
s2mpg10_regulator_desc_ldo(23, "vinl11m", s2mpg10_ldo_vranges2),
997
+
s2mpg10_regulator_desc_ldo(24, "vinl7m", s2mpg10_ldo_vranges3),
998
+
s2mpg10_regulator_desc_ldo(25, "vinl10m", s2mpg10_ldo_vranges2),
999
+
s2mpg10_regulator_desc_ldo(26, "vinl15m", s2mpg10_ldo_vranges21),
1000
+
s2mpg10_regulator_desc_ldo(27, "vinl15m", s2mpg10_ldo_vranges21),
1001
+
s2mpg10_regulator_desc_ldo(28, "vinl7m", s2mpg10_ldo_vranges3),
1002
+
s2mpg10_regulator_desc_ldo(29, "vinl12m", s2mpg10_ldo_vranges2),
1003
+
s2mpg10_regulator_desc_ldo(30, "vinl13m", s2mpg10_ldo_vranges2),
1004
+
s2mpg10_regulator_desc_ldo(31, "vinl11m", s2mpg10_ldo_vranges2)
1005
+
};
1006
+
1007
+
static const struct regulator_ops s2mpg11_reg_buck_ops[] = {
1008
+
[S2MPG10_REGULATOR_OPS_STD] = {
1009
+
.list_voltage = regulator_list_voltage_linear_range,
1010
+
.map_voltage = regulator_map_voltage_linear_range,
1011
+
.is_enabled = regulator_is_enabled_regmap,
1012
+
.enable = regulator_enable_regmap,
1013
+
.disable = regulator_disable_regmap,
1014
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
1015
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
1016
+
.set_voltage_time = s2mpg11_regulator_buck_set_voltage_time,
1017
+
.set_voltage_time_sel = regulator_set_voltage_time_sel,
1018
+
.enable_time = s2mpg10_regulator_buck_enable_time,
1019
+
.set_ramp_delay = regulator_set_ramp_delay_regmap,
1020
+
},
1021
+
[S2MPG10_REGULATOR_OPS_EXTCONTROL] = {
1022
+
.list_voltage = regulator_list_voltage_linear_range,
1023
+
.map_voltage = regulator_map_voltage_linear_range,
1024
+
.enable = s2mpg10_regulator_enable_nop,
1025
+
.get_voltage_sel = regulator_get_voltage_sel_regmap,
1026
+
.set_voltage_sel = regulator_set_voltage_sel_regmap,
1027
+
.set_voltage_time = s2mpg11_regulator_buck_set_voltage_time,
1028
+
.set_voltage_time_sel = regulator_set_voltage_time_sel,
1029
+
.enable_time = s2mpg10_regulator_buck_enable_time,
1030
+
.set_ramp_delay = regulator_set_ramp_delay_regmap,
1031
+
}
1032
+
};
1033
+
1034
+
#define s2mpg11_buck_to_ramp_mask(n) (GENMASK(3, 2) << (((n) % 2) * 4))
1035
+
1036
+
#define regulator_desc_s2mpg11_buckx(_name, _id, _supply, _vrange, \
1037
+
_vsel_reg, _en_reg, _en_mask, _r_reg) \
1038
+
regulator_desc_s2mpg1x_buck_cmn(_name, _id, _supply, \
1039
+
s2mpg11_reg_buck_ops, _vrange, \
1040
+
S2MPG11_PMIC_##_vsel_reg, GENMASK(7, 0), \
1041
+
S2MPG11_PMIC_##_en_reg, _en_mask, \
1042
+
S2MPG11_PMIC_##_r_reg, \
1043
+
s2mpg11_buck_to_ramp_mask(_id - S2MPG11_BUCK1), \
1044
+
s2mpg10_buck_ramp_table, \
1045
+
ARRAY_SIZE(s2mpg10_buck_ramp_table), 30)
1046
+
1047
+
#define s2mpg11_regulator_desc_buck_xm(_num, _vrange, _vsel_reg_sfx, \
1048
+
_en_mask, _r_reg, _en_rrate) \
1049
+
.desc = regulator_desc_s2mpg11_buckx(#_num"s", \
1050
+
S2MPG11_BUCK##_num, "vinb"#_num"s", \
1051
+
_vrange, \
1052
+
B##_num##S_##_vsel_reg_sfx, \
1053
+
B##_num##S_CTRL, _en_mask, \
1054
+
_r_reg), \
1055
+
.enable_ramp_rate = _en_rrate
1056
+
1057
+
#define s2mpg11_regulator_desc_buck_cm(_num, _vrange, _vsel_reg_sfx, \
1058
+
_en_mask, _r_reg) \
1059
+
[S2MPG11_BUCK##_num] = { \
1060
+
s2mpg11_regulator_desc_buck_xm(_num, _vrange, \
1061
+
_vsel_reg_sfx, _en_mask, _r_reg, 12500), \
1062
+
}
1063
+
1064
+
#define s2mpg11_regulator_desc_buckn_cm_gpio(_num, _vrange, \
1065
+
_vsel_reg_sfx, _en_mask, _r_reg, _pc_reg, _pc_mask) \
1066
+
[S2MPG11_BUCK##_num] = { \
1067
+
s2mpg11_regulator_desc_buck_xm(_num, _vrange, \
1068
+
_vsel_reg_sfx, _en_mask, _r_reg, 12500), \
1069
+
.pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \
1070
+
.pctrlsel_mask = _pc_mask, \
1071
+
}
1072
+
1073
+
#define s2mpg11_regulator_desc_buck_vm(_num, _vrange, _vsel_reg_sfx, \
1074
+
_en_mask, _r_reg) \
1075
+
[S2MPG11_BUCK##_num] = { \
1076
+
s2mpg11_regulator_desc_buck_xm(_num, _vrange, \
1077
+
_vsel_reg_sfx, _en_mask, _r_reg, 25000), \
1078
+
}
1079
+
1080
+
#define s2mpg11_regulator_desc_bucka(_num, _num_lower, _r_reg, \
1081
+
_pc_reg, _pc_mask) \
1082
+
[S2MPG11_BUCK##_num] = { \
1083
+
.desc = regulator_desc_s2mpg11_buckx(#_num_lower, \
1084
+
S2MPG11_BUCK##_num, "vinb"#_num_lower, \
1085
+
s2mpg11_buck_vranges##_num_lower, \
1086
+
BUCK##_num##_OUT, \
1087
+
BUCK##_num##_CTRL, GENMASK(7, 6), \
1088
+
_r_reg), \
1089
+
.enable_ramp_rate = 25000, \
1090
+
.pctrlsel_reg = S2MPG11_PMIC_##_pc_reg, \
1091
+
.pctrlsel_mask = _pc_mask, \
1092
+
}
1093
+
1094
+
#define s2mpg11_regulator_desc_buckboost() \
1095
+
[S2MPG11_BUCKBOOST] = { \
1096
+
.desc = regulator_desc_s2mpg1x_buck_cmn("boost", \
1097
+
S2MPG11_BUCKBOOST, "vinbb", \
1098
+
s2mpg10_reg_ldo_ops, \
1099
+
s2mpg11_buck_vrangesboost, \
1100
+
S2MPG11_PMIC_BB_OUT1, GENMASK(6, 0), \
1101
+
S2MPG11_PMIC_BB_CTRL, BIT(7), \
1102
+
0, 0, NULL, 0, 35), \
1103
+
.enable_ramp_rate = 17500, \
1104
+
}
1105
+
1106
+
#define s2mpg11_regulator_desc_ldo_cmn(_num, _supply, _ops, \
1107
+
_vrange, _vsel_reg_sfx, _vsel_mask, _en_reg, _en_mask, \
1108
+
_ramp_delay, _r_reg, _r_mask, _r_table, _r_table_sz, \
1109
+
_pc_reg, _pc_mask) \
1110
+
[S2MPG11_LDO##_num] = { \
1111
+
.desc = regulator_desc_s2mpg1x_ldo_cmn(#_num "s", \
1112
+
S2MPG11_LDO##_num, _supply, _ops, \
1113
+
_vrange, \
1114
+
S2MPG11_PMIC_L##_num##S_##_vsel_reg_sfx, \
1115
+
_vsel_mask, \
1116
+
S2MPG11_PMIC_##_en_reg, _en_mask, \
1117
+
_ramp_delay, _r_reg, _r_mask, _r_table, \
1118
+
_r_table_sz), \
1119
+
.pctrlsel_reg = _pc_reg, \
1120
+
.pctrlsel_mask = _pc_mask, \
1121
+
}
1122
+
1123
+
/* standard LDO via LxM_CTRL */
1124
+
#define s2mpg11_regulator_desc_ldo(_num, _supply, _vrange) \
1125
+
s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \
1126
+
s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \
1127
+
L##_num##S_CTRL, BIT(7), \
1128
+
0, 0, 0, NULL, 0, \
1129
+
0, 0)
1130
+
1131
+
/* standard LDO but possibly GPIO controlled */
1132
+
#define s2mpg11_regulator_desc_ldo_gpio(_num, _supply, _vrange, \
1133
+
_pc_reg, _pc_mask) \
1134
+
s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \
1135
+
s2mpg10_reg_ldo_ops, _vrange, CTRL, GENMASK(5, 0), \
1136
+
L##_num##S_CTRL, GENMASK(7, 6), \
1137
+
0, 0, 0, NULL, 0, \
1138
+
S2MPG11_PMIC_##_pc_reg, _pc_mask)
1139
+
1140
+
/* LDO with ramp support and possibly GPIO controlled */
1141
+
#define s2mpg11_regulator_desc_ldo_ramp(_num, _supply, _vrange, \
1142
+
_en_mask, _r_reg, _pc_reg, _pc_mask) \
1143
+
s2mpg11_regulator_desc_ldo_cmn(_num, _supply, \
1144
+
s2mpg10_reg_ldo_ramp_ops, _vrange, CTRL1, GENMASK(6, 0), \
1145
+
LDO_CTRL1, _en_mask, \
1146
+
6250, S2MPG11_PMIC_##_r_reg, GENMASK(1, 0), \
1147
+
s2mpg10_ldo_ramp_table, \
1148
+
ARRAY_SIZE(s2mpg10_ldo_ramp_table), \
1149
+
S2MPG11_PMIC_##_pc_reg, _pc_mask)
1150
+
1151
+
/* voltage range for s2mpg11 BUCK 1, 2, 3, 4, 8, 9, 10 */
1152
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 1, 200000, 450000, 1300000, STEP_6_25_MV);
1153
+
1154
+
/* voltage range for s2mpg11 BUCK 5 */
1155
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 5, 200000, 400000, 1300000, STEP_6_25_MV);
1156
+
1157
+
/* voltage range for s2mpg11 BUCK 6 */
1158
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 6, 200000, 1000000, 1500000, STEP_6_25_MV);
1159
+
1160
+
/* voltage range for s2mpg11 BUCK 7 */
1161
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, 7, 600000, 1500000, 2200000, STEP_12_5_MV);
1162
+
1163
+
/* voltage range for s2mpg11 BUCK D */
1164
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, d, 600000, 2400000, 3300000, STEP_12_5_MV);
1165
+
1166
+
/* voltage range for s2mpg11 BUCK A */
1167
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, a, 600000, 1700000, 2100000, STEP_12_5_MV);
1168
+
1169
+
/* voltage range for s2mpg11 BUCK BOOST */
1170
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_buck, boost,
1171
+
2600000, 3000000, 3600000, STEP_12_5_MV);
1172
+
1173
+
/* voltage range for s2mpg11 LDO 1, 2 */
1174
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 1, 300000, 450000, 950000, STEP_12_5_MV);
1175
+
1176
+
/* voltage range for s2mpg11 LDO 3, 7, 10, 11, 12, 14, 15 */
1177
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 3, 700000, 1600000, 1950000, STEP_25_MV);
1178
+
1179
+
/* voltage range for s2mpg11 LDO 4, 6 */
1180
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 4, 1800000, 2500000, 3300000, STEP_25_MV);
1181
+
1182
+
/* voltage range for s2mpg11 LDO 5 */
1183
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 5, 1600000, 1600000, 1950000, STEP_12_5_MV);
1184
+
1185
+
/* voltage range for s2mpg11 LDO 8 */
1186
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 8, 979600, 1130400, 1281200, 5800);
1187
+
1188
+
/* voltage range for s2mpg11 LDO 9 */
1189
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 9, 725000, 725000, 1300000, STEP_12_5_MV);
1190
+
1191
+
/* voltage range for s2mpg11 LDO 13 */
1192
+
S2MPG10_VOLTAGE_RANGE(s2mpg11_ldo, 13, 1800000, 1800000, 3350000, STEP_25_MV);
1193
+
1194
+
static const struct s2mpg10_regulator_desc s2mpg11_regulators[] = {
1195
+
s2mpg11_regulator_desc_buckboost(),
1196
+
s2mpg11_regulator_desc_buckn_cm_gpio(1, s2mpg11_buck_vranges1,
1197
+
OUT1, GENMASK(7, 6), DVS_RAMP1,
1198
+
PCTRLSEL1, GENMASK(3, 0)),
1199
+
s2mpg11_regulator_desc_buckn_cm_gpio(2, s2mpg11_buck_vranges1,
1200
+
OUT1, GENMASK(7, 6), DVS_RAMP1,
1201
+
PCTRLSEL1, GENMASK(7, 4)),
1202
+
s2mpg11_regulator_desc_buckn_cm_gpio(3, s2mpg11_buck_vranges1,
1203
+
OUT1, GENMASK(7, 6), DVS_RAMP2,
1204
+
PCTRLSEL2, GENMASK(3, 0)),
1205
+
s2mpg11_regulator_desc_buck_cm(4, s2mpg11_buck_vranges1,
1206
+
OUT, BIT(7), DVS_RAMP2),
1207
+
s2mpg11_regulator_desc_buckn_cm_gpio(5, s2mpg11_buck_vranges5,
1208
+
OUT, GENMASK(7, 6), DVS_RAMP3,
1209
+
PCTRLSEL2, GENMASK(7, 4)),
1210
+
s2mpg11_regulator_desc_buck_cm(6, s2mpg11_buck_vranges6,
1211
+
OUT1, BIT(7), DVS_RAMP3),
1212
+
s2mpg11_regulator_desc_buck_vm(7, s2mpg11_buck_vranges7,
1213
+
OUT1, BIT(7), DVS_RAMP4),
1214
+
s2mpg11_regulator_desc_buckn_cm_gpio(8, s2mpg11_buck_vranges1,
1215
+
OUT1, GENMASK(7, 6), DVS_RAMP4,
1216
+
PCTRLSEL3, GENMASK(3, 0)),
1217
+
s2mpg11_regulator_desc_buckn_cm_gpio(9, s2mpg11_buck_vranges1,
1218
+
OUT1, GENMASK(7, 6), DVS_RAMP5,
1219
+
PCTRLSEL3, GENMASK(7, 4)),
1220
+
s2mpg11_regulator_desc_buck_cm(10, s2mpg11_buck_vranges1,
1221
+
OUT, BIT(7), DVS_RAMP5),
1222
+
s2mpg11_regulator_desc_bucka(D, d, DVS_RAMP6, PCTRLSEL4, GENMASK(3, 0)),
1223
+
s2mpg11_regulator_desc_bucka(A, a, DVS_RAMP6, PCTRLSEL4, GENMASK(7, 4)),
1224
+
s2mpg11_regulator_desc_ldo_ramp(1, "vinl1s", s2mpg11_ldo_vranges1,
1225
+
GENMASK(5, 4), DVS_SYNC_CTRL1,
1226
+
PCTRLSEL5, GENMASK(3, 0)),
1227
+
s2mpg11_regulator_desc_ldo_ramp(2, "vinl1s", s2mpg11_ldo_vranges1,
1228
+
GENMASK(7, 6), DVS_SYNC_CTRL2,
1229
+
PCTRLSEL5, GENMASK(7, 4)),
1230
+
s2mpg11_regulator_desc_ldo(3, "vinl3s", s2mpg11_ldo_vranges3),
1231
+
s2mpg11_regulator_desc_ldo(4, "vinl5s", s2mpg11_ldo_vranges4),
1232
+
s2mpg11_regulator_desc_ldo(5, "vinl3s", s2mpg11_ldo_vranges5),
1233
+
s2mpg11_regulator_desc_ldo(6, "vinl5s", s2mpg11_ldo_vranges4),
1234
+
s2mpg11_regulator_desc_ldo(7, "vinl3s", s2mpg11_ldo_vranges3),
1235
+
s2mpg11_regulator_desc_ldo_gpio(8, "vinl2s", s2mpg11_ldo_vranges8,
1236
+
PCTRLSEL6, GENMASK(3, 0)),
1237
+
s2mpg11_regulator_desc_ldo(9, "vinl2s", s2mpg11_ldo_vranges9),
1238
+
s2mpg11_regulator_desc_ldo(10, "vinl4s", s2mpg11_ldo_vranges3),
1239
+
s2mpg11_regulator_desc_ldo(11, "vinl4s", s2mpg11_ldo_vranges3),
1240
+
s2mpg11_regulator_desc_ldo(12, "vinl4s", s2mpg11_ldo_vranges3),
1241
+
s2mpg11_regulator_desc_ldo_gpio(13, "vinl6s", s2mpg11_ldo_vranges13,
1242
+
PCTRLSEL6, GENMASK(7, 4)),
1243
+
s2mpg11_regulator_desc_ldo(14, "vinl4s", s2mpg11_ldo_vranges3),
1244
+
s2mpg11_regulator_desc_ldo(15, "vinl3s", s2mpg11_ldo_vranges3)
1245
+
};
1246
+
354
1247
static const struct regulator_ops s2mps11_ldo_ops = {
355
1248
.list_voltage = regulator_list_voltage_linear,
356
1249
.map_voltage = regulator_map_voltage_linear,
···
1289
362
#define regulator_desc_s2mps11_ldo(num, step) { \
1290
363
.name = "LDO"#num, \
1291
364
.id = S2MPS11_LDO##num, \
365
+
.of_match = of_match_ptr("LDO"#num), \
366
+
.regulators_node = of_match_ptr("regulators"), \
1292
367
.ops = &s2mps11_ldo_ops, \
1293
368
.type = REGULATOR_VOLTAGE, \
1294
369
.owner = THIS_MODULE, \
···
1307
378
#define regulator_desc_s2mps11_buck1_4(num) { \
1308
379
.name = "BUCK"#num, \
1309
380
.id = S2MPS11_BUCK##num, \
381
+
.of_match = of_match_ptr("BUCK"#num), \
382
+
.regulators_node = of_match_ptr("regulators"), \
1310
383
.ops = &s2mps11_buck_ops, \
1311
384
.type = REGULATOR_VOLTAGE, \
1312
385
.owner = THIS_MODULE, \
···
1326
395
#define regulator_desc_s2mps11_buck5 { \
1327
396
.name = "BUCK5", \
1328
397
.id = S2MPS11_BUCK5, \
398
+
.of_match = of_match_ptr("BUCK5"), \
399
+
.regulators_node = of_match_ptr("regulators"), \
1329
400
.ops = &s2mps11_buck_ops, \
1330
401
.type = REGULATOR_VOLTAGE, \
1331
402
.owner = THIS_MODULE, \
···
1345
412
#define regulator_desc_s2mps11_buck67810(num, min, step, min_sel, voltages) { \
1346
413
.name = "BUCK"#num, \
1347
414
.id = S2MPS11_BUCK##num, \
415
+
.of_match = of_match_ptr("BUCK"#num), \
416
+
.regulators_node = of_match_ptr("regulators"), \
1348
417
.ops = &s2mps11_buck_ops, \
1349
418
.type = REGULATOR_VOLTAGE, \
1350
419
.owner = THIS_MODULE, \
···
1364
429
#define regulator_desc_s2mps11_buck9 { \
1365
430
.name = "BUCK9", \
1366
431
.id = S2MPS11_BUCK9, \
432
+
.of_match = of_match_ptr("BUCK9"), \
433
+
.regulators_node = of_match_ptr("regulators"), \
1367
434
.ops = &s2mps11_buck_ops, \
1368
435
.type = REGULATOR_VOLTAGE, \
1369
436
.owner = THIS_MODULE, \
···
1439
502
#define regulator_desc_s2mps13_ldo(num, min, step, min_sel) { \
1440
503
.name = "LDO"#num, \
1441
504
.id = S2MPS13_LDO##num, \
505
+
.of_match = of_match_ptr("LDO"#num), \
506
+
.regulators_node = of_match_ptr("regulators"), \
1442
507
.ops = &s2mps14_reg_ops, \
1443
508
.type = REGULATOR_VOLTAGE, \
1444
509
.owner = THIS_MODULE, \
···
1457
518
#define regulator_desc_s2mps13_buck(num, min, step, min_sel) { \
1458
519
.name = "BUCK"#num, \
1459
520
.id = S2MPS13_BUCK##num, \
521
+
.of_match = of_match_ptr("BUCK"#num), \
522
+
.regulators_node = of_match_ptr("regulators"), \
1460
523
.ops = &s2mps14_reg_ops, \
1461
524
.type = REGULATOR_VOLTAGE, \
1462
525
.owner = THIS_MODULE, \
···
1476
535
#define regulator_desc_s2mps13_buck7(num, min, step, min_sel) { \
1477
536
.name = "BUCK"#num, \
1478
537
.id = S2MPS13_BUCK##num, \
538
+
.of_match = of_match_ptr("BUCK"#num), \
539
+
.regulators_node = of_match_ptr("regulators"), \
1479
540
.ops = &s2mps14_reg_ops, \
1480
541
.type = REGULATOR_VOLTAGE, \
1481
542
.owner = THIS_MODULE, \
···
1495
552
#define regulator_desc_s2mps13_buck8_10(num, min, step, min_sel) { \
1496
553
.name = "BUCK"#num, \
1497
554
.id = S2MPS13_BUCK##num, \
555
+
.of_match = of_match_ptr("BUCK"#num), \
556
+
.regulators_node = of_match_ptr("regulators"), \
1498
557
.ops = &s2mps14_reg_ops, \
1499
558
.type = REGULATOR_VOLTAGE, \
1500
559
.owner = THIS_MODULE, \
···
1579
634
#define regulator_desc_s2mps14_ldo(num, min, step) { \
1580
635
.name = "LDO"#num, \
1581
636
.id = S2MPS14_LDO##num, \
637
+
.of_match = of_match_ptr("LDO"#num), \
638
+
.regulators_node = of_match_ptr("regulators"), \
639
+
.of_parse_cb = s2mps11_of_parse_cb, \
1582
640
.ops = &s2mps14_reg_ops, \
1583
641
.type = REGULATOR_VOLTAGE, \
1584
642
.owner = THIS_MODULE, \
···
1597
649
#define regulator_desc_s2mps14_buck(num, min, step, min_sel) { \
1598
650
.name = "BUCK"#num, \
1599
651
.id = S2MPS14_BUCK##num, \
652
+
.of_match = of_match_ptr("BUCK"#num), \
653
+
.regulators_node = of_match_ptr("regulators"), \
654
+
.of_parse_cb = s2mps11_of_parse_cb, \
1600
655
.ops = &s2mps14_reg_ops, \
1601
656
.type = REGULATOR_VOLTAGE, \
1602
657
.owner = THIS_MODULE, \
···
1676
725
#define regulator_desc_s2mps15_ldo(num, range) { \
1677
726
.name = "LDO"#num, \
1678
727
.id = S2MPS15_LDO##num, \
728
+
.of_match = of_match_ptr("LDO"#num), \
729
+
.regulators_node = of_match_ptr("regulators"), \
1679
730
.ops = &s2mps15_reg_ldo_ops, \
1680
731
.type = REGULATOR_VOLTAGE, \
1681
732
.owner = THIS_MODULE, \
···
1693
740
#define regulator_desc_s2mps15_buck(num, range) { \
1694
741
.name = "BUCK"#num, \
1695
742
.id = S2MPS15_BUCK##num, \
743
+
.of_match = of_match_ptr("BUCK"#num), \
744
+
.regulators_node = of_match_ptr("regulators"), \
1696
745
.ops = &s2mps15_reg_buck_ops, \
1697
746
.type = REGULATOR_VOLTAGE, \
1698
747
.owner = THIS_MODULE, \
···
1784
829
};
1785
830
1786
831
static int s2mps14_pmic_enable_ext_control(struct s2mps11_info *s2mps11,
1787
-
struct regulator_dev *rdev)
832
+
struct regulator_dev *rdev)
1788
833
{
1789
-
return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
1790
-
rdev->desc->enable_mask, S2MPS14_ENABLE_EXT_CONTROL);
1791
-
}
1792
-
1793
-
static void s2mps14_pmic_dt_parse_ext_control_gpio(struct platform_device *pdev,
1794
-
struct of_regulator_match *rdata, struct s2mps11_info *s2mps11)
1795
-
{
1796
-
struct gpio_desc **gpio = s2mps11->ext_control_gpiod;
1797
-
unsigned int i;
1798
-
unsigned int valid_regulators[3] = { S2MPS14_LDO10, S2MPS14_LDO11,
1799
-
S2MPS14_LDO12 };
1800
-
1801
-
for (i = 0; i < ARRAY_SIZE(valid_regulators); i++) {
1802
-
unsigned int reg = valid_regulators[i];
1803
-
1804
-
if (!rdata[reg].init_data || !rdata[reg].of_node)
1805
-
continue;
1806
-
1807
-
gpio[reg] = devm_fwnode_gpiod_get(&pdev->dev,
1808
-
of_fwnode_handle(rdata[reg].of_node),
1809
-
"samsung,ext-control",
1810
-
GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE,
1811
-
"s2mps11-regulator");
1812
-
if (PTR_ERR(gpio[reg]) == -ENOENT)
1813
-
gpio[reg] = NULL;
1814
-
else if (IS_ERR(gpio[reg])) {
1815
-
dev_err(&pdev->dev, "Failed to get control GPIO for %d/%s\n",
1816
-
reg, rdata[reg].name);
1817
-
gpio[reg] = NULL;
1818
-
continue;
1819
-
}
1820
-
if (gpio[reg])
1821
-
dev_dbg(&pdev->dev, "Using GPIO for ext-control over %d/%s\n",
1822
-
reg, rdata[reg].name);
1823
-
}
1824
-
}
1825
-
1826
-
static int s2mps11_pmic_dt_parse(struct platform_device *pdev,
1827
-
struct of_regulator_match *rdata, struct s2mps11_info *s2mps11,
1828
-
unsigned int rdev_num)
1829
-
{
1830
-
struct device_node *reg_np;
1831
-
1832
-
reg_np = of_get_child_by_name(pdev->dev.parent->of_node, "regulators");
1833
-
if (!reg_np) {
1834
-
dev_err(&pdev->dev, "could not find regulators sub-node\n");
1835
-
return -EINVAL;
1836
-
}
1837
-
1838
-
of_regulator_match(&pdev->dev, reg_np, rdata, rdev_num);
1839
-
if (s2mps11->dev_type == S2MPS14X)
1840
-
s2mps14_pmic_dt_parse_ext_control_gpio(pdev, rdata, s2mps11);
1841
-
1842
-
of_node_put(reg_np);
1843
-
834
+
int ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
835
+
rdev->desc->enable_mask,
836
+
S2MPS14_ENABLE_EXT_CONTROL);
837
+
if (ret < 0)
838
+
return dev_err_probe(rdev_get_dev(rdev), ret,
839
+
"failed to enable GPIO control over %d/%s\n",
840
+
rdev->desc->id, rdev->desc->name);
1844
841
return 0;
1845
842
}
1846
843
···
1853
946
#define regulator_desc_s2mpu02_ldo1(num) { \
1854
947
.name = "LDO"#num, \
1855
948
.id = S2MPU02_LDO##num, \
949
+
.of_match = of_match_ptr("LDO"#num), \
950
+
.regulators_node = of_match_ptr("regulators"), \
1856
951
.ops = &s2mpu02_ldo_ops, \
1857
952
.type = REGULATOR_VOLTAGE, \
1858
953
.owner = THIS_MODULE, \
···
1870
961
#define regulator_desc_s2mpu02_ldo2(num) { \
1871
962
.name = "LDO"#num, \
1872
963
.id = S2MPU02_LDO##num, \
964
+
.of_match = of_match_ptr("LDO"#num), \
965
+
.regulators_node = of_match_ptr("regulators"), \
1873
966
.ops = &s2mpu02_ldo_ops, \
1874
967
.type = REGULATOR_VOLTAGE, \
1875
968
.owner = THIS_MODULE, \
···
1887
976
#define regulator_desc_s2mpu02_ldo3(num) { \
1888
977
.name = "LDO"#num, \
1889
978
.id = S2MPU02_LDO##num, \
979
+
.of_match = of_match_ptr("LDO"#num), \
980
+
.regulators_node = of_match_ptr("regulators"), \
1890
981
.ops = &s2mpu02_ldo_ops, \
1891
982
.type = REGULATOR_VOLTAGE, \
1892
983
.owner = THIS_MODULE, \
···
1904
991
#define regulator_desc_s2mpu02_ldo4(num) { \
1905
992
.name = "LDO"#num, \
1906
993
.id = S2MPU02_LDO##num, \
994
+
.of_match = of_match_ptr("LDO"#num), \
995
+
.regulators_node = of_match_ptr("regulators"), \
1907
996
.ops = &s2mpu02_ldo_ops, \
1908
997
.type = REGULATOR_VOLTAGE, \
1909
998
.owner = THIS_MODULE, \
···
1921
1006
#define regulator_desc_s2mpu02_ldo5(num) { \
1922
1007
.name = "LDO"#num, \
1923
1008
.id = S2MPU02_LDO##num, \
1009
+
.of_match = of_match_ptr("LDO"#num), \
1010
+
.regulators_node = of_match_ptr("regulators"), \
1924
1011
.ops = &s2mpu02_ldo_ops, \
1925
1012
.type = REGULATOR_VOLTAGE, \
1926
1013
.owner = THIS_MODULE, \
···
1939
1022
#define regulator_desc_s2mpu02_buck1234(num) { \
1940
1023
.name = "BUCK"#num, \
1941
1024
.id = S2MPU02_BUCK##num, \
1025
+
.of_match = of_match_ptr("BUCK"#num), \
1026
+
.regulators_node = of_match_ptr("regulators"), \
1942
1027
.ops = &s2mpu02_buck_ops, \
1943
1028
.type = REGULATOR_VOLTAGE, \
1944
1029
.owner = THIS_MODULE, \
···
1957
1038
#define regulator_desc_s2mpu02_buck5(num) { \
1958
1039
.name = "BUCK"#num, \
1959
1040
.id = S2MPU02_BUCK##num, \
1041
+
.of_match = of_match_ptr("BUCK"#num), \
1042
+
.regulators_node = of_match_ptr("regulators"), \
1960
1043
.ops = &s2mpu02_ldo_ops, \
1961
1044
.type = REGULATOR_VOLTAGE, \
1962
1045
.owner = THIS_MODULE, \
···
1975
1054
#define regulator_desc_s2mpu02_buck6(num) { \
1976
1055
.name = "BUCK"#num, \
1977
1056
.id = S2MPU02_BUCK##num, \
1057
+
.of_match = of_match_ptr("BUCK"#num), \
1058
+
.regulators_node = of_match_ptr("regulators"), \
1978
1059
.ops = &s2mpu02_ldo_ops, \
1979
1060
.type = REGULATOR_VOLTAGE, \
1980
1061
.owner = THIS_MODULE, \
···
1993
1070
#define regulator_desc_s2mpu02_buck7(num) { \
1994
1071
.name = "BUCK"#num, \
1995
1072
.id = S2MPU02_BUCK##num, \
1073
+
.of_match = of_match_ptr("BUCK"#num), \
1074
+
.regulators_node = of_match_ptr("regulators"), \
1996
1075
.ops = &s2mpu02_ldo_ops, \
1997
1076
.type = REGULATOR_VOLTAGE, \
1998
1077
.owner = THIS_MODULE, \
···
2050
1125
#define regulator_desc_s2mpu05_ldo_reg(num, min, step, reg) { \
2051
1126
.name = "ldo"#num, \
2052
1127
.id = S2MPU05_LDO##num, \
1128
+
.of_match = of_match_ptr("ldo"#num), \
1129
+
.regulators_node = of_match_ptr("regulators"), \
2053
1130
.ops = &s2mpu02_ldo_ops, \
2054
1131
.type = REGULATOR_VOLTAGE, \
2055
1132
.owner = THIS_MODULE, \
···
2083
1156
#define regulator_desc_s2mpu05_buck(num, which) { \
2084
1157
.name = "buck"#num, \
2085
1158
.id = S2MPU05_BUCK##num, \
1159
+
.of_match = of_match_ptr("buck"#num), \
1160
+
.regulators_node = of_match_ptr("regulators"), \
2086
1161
.ops = &s2mpu02_buck_ops, \
2087
1162
.type = REGULATOR_VOLTAGE, \
2088
1163
.owner = THIS_MODULE, \
···
2131
1202
regulator_desc_s2mpu05_buck45(5),
2132
1203
};
2133
1204
1205
+
static int s2mps11_handle_ext_control(struct s2mps11_info *s2mps11,
1206
+
struct regulator_dev *rdev)
1207
+
{
1208
+
int ret;
1209
+
1210
+
switch (s2mps11->dev_type) {
1211
+
case S2MPS14X:
1212
+
if (!rdev->ena_pin)
1213
+
return 0;
1214
+
1215
+
ret = s2mps14_pmic_enable_ext_control(s2mps11, rdev);
1216
+
break;
1217
+
1218
+
case S2MPG10:
1219
+
case S2MPG11:
1220
+
/*
1221
+
* If desc.enable_val is != 0, then external control was
1222
+
* requested. We can not test s2mpg10_desc::ext_control,
1223
+
* because 0 is a valid value.
1224
+
*/
1225
+
if (!rdev->desc->enable_val)
1226
+
return 0;
1227
+
1228
+
ret = s2mpg10_enable_ext_control(s2mps11, rdev);
1229
+
break;
1230
+
1231
+
default:
1232
+
return 0;
1233
+
}
1234
+
1235
+
return ret;
1236
+
}
1237
+
2134
1238
static int s2mps11_pmic_probe(struct platform_device *pdev)
2135
1239
{
2136
1240
struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
2137
1241
struct regulator_config config = { };
2138
1242
struct s2mps11_info *s2mps11;
2139
-
unsigned int rdev_num = 0;
2140
-
int i, ret = 0;
1243
+
unsigned int rdev_num;
1244
+
int i, ret;
2141
1245
const struct regulator_desc *regulators;
1246
+
const struct s2mpg10_regulator_desc *s2mpg1x_regulators = NULL;
2142
1247
2143
1248
s2mps11 = devm_kzalloc(&pdev->dev, sizeof(struct s2mps11_info),
2144
1249
GFP_KERNEL);
···
2181
1218
2182
1219
s2mps11->dev_type = platform_get_device_id(pdev)->driver_data;
2183
1220
switch (s2mps11->dev_type) {
1221
+
case S2MPG10:
1222
+
rdev_num = ARRAY_SIZE(s2mpg10_regulators);
1223
+
s2mpg1x_regulators = s2mpg10_regulators;
1224
+
BUILD_BUG_ON(ARRAY_SIZE(s2mpg10_regulators) > S2MPS_REGULATOR_MAX);
1225
+
break;
1226
+
case S2MPG11:
1227
+
rdev_num = ARRAY_SIZE(s2mpg11_regulators);
1228
+
s2mpg1x_regulators = s2mpg11_regulators;
1229
+
BUILD_BUG_ON(ARRAY_SIZE(s2mpg11_regulators) > S2MPS_REGULATOR_MAX);
1230
+
break;
2184
1231
case S2MPS11X:
2185
1232
rdev_num = ARRAY_SIZE(s2mps11_regulators);
2186
1233
regulators = s2mps11_regulators;
2187
-
BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps11_regulators));
1234
+
BUILD_BUG_ON(ARRAY_SIZE(s2mps11_regulators) > S2MPS_REGULATOR_MAX);
2188
1235
break;
2189
1236
case S2MPS13X:
2190
1237
rdev_num = ARRAY_SIZE(s2mps13_regulators);
2191
1238
regulators = s2mps13_regulators;
2192
-
BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps13_regulators));
1239
+
BUILD_BUG_ON(ARRAY_SIZE(s2mps13_regulators) > S2MPS_REGULATOR_MAX);
2193
1240
break;
2194
1241
case S2MPS14X:
2195
1242
rdev_num = ARRAY_SIZE(s2mps14_regulators);
2196
1243
regulators = s2mps14_regulators;
2197
-
BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps14_regulators));
1244
+
BUILD_BUG_ON(ARRAY_SIZE(s2mps14_regulators) > S2MPS_REGULATOR_MAX);
2198
1245
break;
2199
1246
case S2MPS15X:
2200
1247
rdev_num = ARRAY_SIZE(s2mps15_regulators);
2201
1248
regulators = s2mps15_regulators;
2202
-
BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mps15_regulators));
1249
+
BUILD_BUG_ON(ARRAY_SIZE(s2mps15_regulators) > S2MPS_REGULATOR_MAX);
2203
1250
break;
2204
1251
case S2MPU02:
2205
1252
rdev_num = ARRAY_SIZE(s2mpu02_regulators);
2206
1253
regulators = s2mpu02_regulators;
2207
-
BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mpu02_regulators));
1254
+
BUILD_BUG_ON(ARRAY_SIZE(s2mpu02_regulators) > S2MPS_REGULATOR_MAX);
2208
1255
break;
2209
1256
case S2MPU05:
2210
1257
rdev_num = ARRAY_SIZE(s2mpu05_regulators);
2211
1258
regulators = s2mpu05_regulators;
2212
-
BUILD_BUG_ON(S2MPS_REGULATOR_MAX < ARRAY_SIZE(s2mpu05_regulators));
1259
+
BUILD_BUG_ON(ARRAY_SIZE(s2mpu05_regulators) > S2MPS_REGULATOR_MAX);
2213
1260
break;
2214
1261
default:
2215
-
dev_err(&pdev->dev, "Invalid device type: %u\n",
2216
-
s2mps11->dev_type);
2217
-
return -EINVAL;
1262
+
return dev_err_probe(&pdev->dev, -ENODEV,
1263
+
"Unsupported device type %d\n",
1264
+
s2mps11->dev_type);
2218
1265
}
2219
1266
2220
-
s2mps11->ext_control_gpiod = devm_kcalloc(&pdev->dev, rdev_num,
2221
-
sizeof(*s2mps11->ext_control_gpiod), GFP_KERNEL);
2222
-
if (!s2mps11->ext_control_gpiod)
2223
-
return -ENOMEM;
1267
+
if (s2mpg1x_regulators) {
1268
+
size_t regulators_sz = rdev_num * sizeof(*s2mpg1x_regulators);
2224
1269
2225
-
struct of_regulator_match *rdata __free(kfree) =
2226
-
kcalloc(rdev_num, sizeof(*rdata), GFP_KERNEL);
2227
-
if (!rdata)
2228
-
return -ENOMEM;
1270
+
s2mpg1x_regulators = devm_kmemdup(&pdev->dev,
1271
+
s2mpg1x_regulators,
1272
+
regulators_sz,
1273
+
GFP_KERNEL);
1274
+
if (!s2mpg1x_regulators)
1275
+
return -ENOMEM;
1276
+
}
2229
1277
2230
-
for (i = 0; i < rdev_num; i++)
2231
-
rdata[i].name = regulators[i].name;
2232
-
2233
-
ret = s2mps11_pmic_dt_parse(pdev, rdata, s2mps11, rdev_num);
2234
-
if (ret)
2235
-
return ret;
1278
+
device_set_of_node_from_dev(&pdev->dev, pdev->dev.parent);
2236
1279
2237
1280
platform_set_drvdata(pdev, s2mps11);
2238
1281
···
2246
1277
config.regmap = iodev->regmap_pmic;
2247
1278
config.driver_data = s2mps11;
2248
1279
for (i = 0; i < rdev_num; i++) {
1280
+
const struct regulator_desc *rdesc;
2249
1281
struct regulator_dev *regulator;
2250
1282
2251
-
config.init_data = rdata[i].init_data;
2252
-
config.of_node = rdata[i].of_node;
2253
-
config.ena_gpiod = s2mps11->ext_control_gpiod[i];
2254
-
/*
2255
-
* Hand the GPIO descriptor management over to the regulator
2256
-
* core, remove it from devres management.
2257
-
*/
2258
-
if (config.ena_gpiod)
2259
-
devm_gpiod_unhinge(&pdev->dev, config.ena_gpiod);
2260
-
regulator = devm_regulator_register(&pdev->dev,
2261
-
®ulators[i], &config);
2262
-
if (IS_ERR(regulator)) {
2263
-
dev_err(&pdev->dev, "regulator init failed for %d\n",
2264
-
i);
2265
-
return PTR_ERR(regulator);
2266
-
}
1283
+
if (s2mpg1x_regulators)
1284
+
rdesc = &s2mpg1x_regulators[i].desc;
1285
+
else
1286
+
rdesc = ®ulators[i];
2267
1287
2268
-
if (config.ena_gpiod) {
2269
-
ret = s2mps14_pmic_enable_ext_control(s2mps11,
2270
-
regulator);
2271
-
if (ret < 0) {
2272
-
dev_err(&pdev->dev,
2273
-
"failed to enable GPIO control over %s: %d\n",
2274
-
regulator->desc->name, ret);
2275
-
return ret;
2276
-
}
2277
-
}
1288
+
regulator = devm_regulator_register(&pdev->dev,
1289
+
rdesc, &config);
1290
+
if (IS_ERR(regulator))
1291
+
return dev_err_probe(&pdev->dev, PTR_ERR(regulator),
1292
+
"regulator init failed for %d/%s\n",
1293
+
rdesc->id, rdesc->name);
1294
+
1295
+
ret = s2mps11_handle_ext_control(s2mps11, regulator);
1296
+
if (ret < 0)
1297
+
return ret;
2278
1298
}
2279
1299
2280
1300
return 0;
2281
1301
}
2282
1302
2283
1303
static const struct platform_device_id s2mps11_pmic_id[] = {
1304
+
{ "s2mpg10-regulator", S2MPG10},
1305
+
{ "s2mpg11-regulator", S2MPG11},
2284
1306
{ "s2mps11-regulator", S2MPS11X},
2285
1307
{ "s2mps13-regulator", S2MPS13X},
2286
1308
{ "s2mps14-regulator", S2MPS14X},
+454
drivers/regulator/tps65185.c
+454
drivers/regulator/tps65185.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-only
2
+
// Copyright (C) 2025 Andreas Kemnade
3
+
4
+
/* Datasheet: https://www.ti.com/lit/gpn/tps65185 */
5
+
6
+
#include <linux/cleanup.h>
7
+
#include <linux/completion.h>
8
+
#include <linux/gpio/consumer.h>
9
+
#include <linux/i2c.h>
10
+
#include <linux/module.h>
11
+
#include <linux/mutex.h>
12
+
#include <linux/hwmon.h>
13
+
#include <linux/pm_runtime.h>
14
+
#include <linux/property.h>
15
+
#include <linux/regulator/consumer.h>
16
+
#include <linux/regulator/driver.h>
17
+
#include <linux/regulator/machine.h>
18
+
#include <linux/regmap.h>
19
+
20
+
#define TPS65185_REG_TMST_VALUE 0
21
+
#define TPS65185_REG_ENABLE 1
22
+
#define TPS65185_REG_VADJ 2
23
+
#define TPS65185_REG_VCOM1 3
24
+
#define TPS65185_REG_VCOM2 4
25
+
#define TPS65185_REG_INT_EN1 5
26
+
#define TPS65185_REG_INT_EN2 6
27
+
#define TPS65185_REG_INT1 7
28
+
#define TPS65185_REG_INT2 8
29
+
#define TPS65185_REG_TMST1 0xd
30
+
#define TPS65185_REG_TMST2 0xe
31
+
#define TPS65185_REG_PG 0xf
32
+
#define TPS65185_REG_REVID 0x10
33
+
34
+
#define TPS65185_READ_THERM BIT(7)
35
+
#define TPS65185_CONV_END BIT(5)
36
+
37
+
#define TPS65185_ENABLE_ACTIVE BIT(7)
38
+
#define TPS65185_ENABLE_STANDBY BIT(6)
39
+
40
+
#define PGOOD_TIMEOUT_MSECS 200
41
+
42
+
struct tps65185_data {
43
+
struct device *dev;
44
+
struct regmap *regmap;
45
+
struct gpio_desc *pgood_gpio;
46
+
struct gpio_desc *pwrup_gpio;
47
+
struct gpio_desc *vcom_ctrl_gpio;
48
+
struct gpio_desc *wakeup_gpio;
49
+
struct completion pgood_completion;
50
+
int pgood_irq;
51
+
struct completion tmst_completion;
52
+
};
53
+
54
+
static const struct hwmon_channel_info *tps65185_info[] = {
55
+
HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
56
+
HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
57
+
NULL
58
+
};
59
+
60
+
static int tps65185_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
61
+
u32 attr, int channel, long *temp)
62
+
{
63
+
struct tps65185_data *data = dev_get_drvdata(dev);
64
+
unsigned int val;
65
+
int ret;
66
+
67
+
reinit_completion(&data->tmst_completion);
68
+
/* start acquisition */
69
+
regmap_update_bits(data->regmap, TPS65185_REG_TMST1,
70
+
TPS65185_READ_THERM, TPS65185_READ_THERM);
71
+
wait_for_completion_timeout(&data->tmst_completion,
72
+
msecs_to_jiffies(PGOOD_TIMEOUT_MSECS));
73
+
ret = regmap_read(data->regmap, TPS65185_REG_TMST1, &val);
74
+
if (!(val & TPS65185_CONV_END))
75
+
return -ETIMEDOUT;
76
+
77
+
ret = regmap_read(data->regmap, TPS65185_REG_TMST_VALUE, &val);
78
+
if (ret)
79
+
return ret;
80
+
81
+
*temp = (s8)val * 1000;
82
+
83
+
return 0;
84
+
}
85
+
86
+
static umode_t tps65185_hwmon_is_visible(const void *data,
87
+
enum hwmon_sensor_types type,
88
+
u32 attr, int channel)
89
+
{
90
+
return 0444;
91
+
}
92
+
93
+
static const struct hwmon_ops tps65185_hwmon_ops = {
94
+
.is_visible = tps65185_hwmon_is_visible,
95
+
.read = tps65185_hwmon_read,
96
+
};
97
+
98
+
static const struct hwmon_chip_info tps65185_chip_info = {
99
+
.ops = &tps65185_hwmon_ops,
100
+
.info = tps65185_info,
101
+
};
102
+
103
+
static bool tps65185_volatile_reg(struct device *dev, unsigned int reg)
104
+
{
105
+
switch (reg) {
106
+
case TPS65185_REG_TMST_VALUE:
107
+
case TPS65185_REG_ENABLE:
108
+
case TPS65185_REG_VCOM2:
109
+
case TPS65185_REG_INT1:
110
+
case TPS65185_REG_INT2:
111
+
case TPS65185_REG_TMST1:
112
+
return true;
113
+
default:
114
+
return false;
115
+
}
116
+
}
117
+
118
+
static const struct regmap_config regmap_config = {
119
+
.reg_bits = 8,
120
+
.val_bits = 8,
121
+
.max_register = 0x10,
122
+
.cache_type = REGCACHE_MAPLE,
123
+
.volatile_reg = tps65185_volatile_reg,
124
+
};
125
+
126
+
static const struct regulator_ops tps65185_v3p3ops = {
127
+
.list_voltage = regulator_list_voltage_linear,
128
+
.enable = regulator_enable_regmap,
129
+
.disable = regulator_disable_regmap,
130
+
.is_enabled = regulator_is_enabled_regmap,
131
+
};
132
+
133
+
static int tps65185_check_powergood(struct regulator_dev *rdev)
134
+
{
135
+
struct tps65185_data *data = rdev_get_drvdata(rdev);
136
+
137
+
return gpiod_get_value_cansleep(data->pgood_gpio);
138
+
}
139
+
140
+
static int tps65185_vposneg_get_voltage_sel(struct regulator_dev *rdev)
141
+
{
142
+
int ret;
143
+
144
+
ret = regulator_get_voltage_sel_regmap(rdev);
145
+
if (ret < 0)
146
+
return ret;
147
+
148
+
/* highest value is lowest voltage */
149
+
return 6 - ret;
150
+
}
151
+
152
+
static int tps65185_vposneg_set_voltage_sel(struct regulator_dev *rdev, unsigned int selector)
153
+
{
154
+
return regulator_set_voltage_sel_regmap(rdev, 6 - selector);
155
+
}
156
+
157
+
static irqreturn_t pgood_handler(int irq, void *dev_id)
158
+
{
159
+
struct tps65185_data *data = dev_id;
160
+
161
+
complete(&data->pgood_completion);
162
+
163
+
return IRQ_HANDLED;
164
+
}
165
+
166
+
static int tps65185_vposneg_enable(struct regulator_dev *rdev)
167
+
{
168
+
struct tps65185_data *data = rdev_get_drvdata(rdev);
169
+
int ret;
170
+
171
+
reinit_completion(&data->pgood_completion);
172
+
if (data->pwrup_gpio)
173
+
ret = gpiod_set_value_cansleep(data->pwrup_gpio, 1);
174
+
else
175
+
ret = regmap_update_bits(data->regmap, TPS65185_REG_ENABLE,
176
+
TPS65185_ENABLE_ACTIVE,
177
+
TPS65185_ENABLE_ACTIVE);
178
+
179
+
if (ret)
180
+
return ret;
181
+
182
+
dev_dbg(data->dev, "turning on...");
183
+
wait_for_completion_timeout(&data->pgood_completion,
184
+
msecs_to_jiffies(PGOOD_TIMEOUT_MSECS));
185
+
dev_dbg(data->dev, "turned on");
186
+
if (gpiod_get_value_cansleep(data->pgood_gpio) != 1)
187
+
return -ETIMEDOUT;
188
+
189
+
return 0;
190
+
}
191
+
192
+
static int tps65185_vposneg_disable(struct regulator_dev *rdev)
193
+
{
194
+
struct tps65185_data *data = rdev_get_drvdata(rdev);
195
+
int ret;
196
+
197
+
if (data->pwrup_gpio)
198
+
ret = gpiod_set_value_cansleep(data->pwrup_gpio, 0);
199
+
else
200
+
ret = regmap_update_bits(data->regmap, TPS65185_REG_ENABLE,
201
+
TPS65185_ENABLE_STANDBY,
202
+
TPS65185_ENABLE_STANDBY);
203
+
204
+
return ret;
205
+
}
206
+
207
+
static int tps65185_vcom_set_voltage_sel(struct regulator_dev *rdev, unsigned int selector)
208
+
{
209
+
struct tps65185_data *data = rdev_get_drvdata(rdev);
210
+
int ret;
211
+
212
+
ret = regmap_update_bits(data->regmap, TPS65185_REG_VCOM2, BIT(0), selector >> 8);
213
+
if (ret < 0)
214
+
return ret;
215
+
216
+
return regmap_write(data->regmap, TPS65185_REG_VCOM1, selector & 0xFF);
217
+
}
218
+
219
+
static int tps65185_vcom_get_voltage_sel(struct regulator_dev *rdev)
220
+
{
221
+
struct tps65185_data *data = rdev_get_drvdata(rdev);
222
+
int ret;
223
+
unsigned int sel, sel2;
224
+
225
+
ret = regmap_read(data->regmap, TPS65185_REG_VCOM1, &sel);
226
+
if (ret < 0)
227
+
return ret;
228
+
229
+
ret = regmap_read(data->regmap, TPS65185_REG_VCOM2, &sel2);
230
+
if (ret < 0)
231
+
return ret;
232
+
233
+
if (sel2 & BIT(0))
234
+
sel |= 0x100;
235
+
236
+
return sel;
237
+
}
238
+
239
+
static const struct regulator_ops tps65185_vcom_ops = {
240
+
.list_voltage = regulator_list_voltage_linear,
241
+
.map_voltage = regulator_map_voltage_linear,
242
+
.set_voltage_sel = tps65185_vcom_set_voltage_sel,
243
+
.get_voltage_sel = tps65185_vcom_get_voltage_sel,
244
+
};
245
+
246
+
static const struct regulator_ops tps65185_vposneg_ops = {
247
+
.list_voltage = regulator_list_voltage_linear,
248
+
.map_voltage = regulator_map_voltage_linear,
249
+
.enable = tps65185_vposneg_enable,
250
+
.disable = tps65185_vposneg_disable,
251
+
.is_enabled = tps65185_check_powergood,
252
+
.set_voltage_sel = tps65185_vposneg_set_voltage_sel,
253
+
.get_voltage_sel = tps65185_vposneg_get_voltage_sel,
254
+
};
255
+
256
+
static const struct regulator_desc regulators[] = {
257
+
{
258
+
.name = "v3p3",
259
+
.of_match = of_match_ptr("v3p3"),
260
+
.regulators_node = of_match_ptr("regulators"),
261
+
.id = 0,
262
+
.ops = &tps65185_v3p3ops,
263
+
.type = REGULATOR_VOLTAGE,
264
+
.owner = THIS_MODULE,
265
+
.enable_reg = TPS65185_REG_ENABLE,
266
+
.enable_mask = BIT(5),
267
+
.n_voltages = 1,
268
+
.min_uV = 3300000,
269
+
},
270
+
{
271
+
.name = "vposneg",
272
+
.of_match = of_match_ptr("vposneg"),
273
+
.regulators_node = of_match_ptr("regulators"),
274
+
.id = 1,
275
+
.ops = &tps65185_vposneg_ops,
276
+
.type = REGULATOR_VOLTAGE,
277
+
.owner = THIS_MODULE,
278
+
.n_voltages = 4,
279
+
.vsel_reg = TPS65185_REG_VADJ,
280
+
.vsel_mask = 0x7,
281
+
.min_uV = 14250000,
282
+
.uV_step = 250000,
283
+
}
284
+
};
285
+
286
+
static const struct regulator_desc vcom_regulator_desc = {
287
+
.name = "vcom",
288
+
.of_match = of_match_ptr("vcom"),
289
+
.regulators_node = of_match_ptr("regulators"),
290
+
.supply_name = "vposneg",
291
+
.id = 2,
292
+
.ops = &tps65185_vcom_ops,
293
+
.type = REGULATOR_VOLTAGE,
294
+
.owner = THIS_MODULE,
295
+
.n_voltages = 511,
296
+
.min_uV = 0,
297
+
.uV_step = 10000,
298
+
};
299
+
300
+
static irqreturn_t tps65185_irq_thread(int irq, void *dev_id)
301
+
{
302
+
struct tps65185_data *data = dev_id;
303
+
unsigned int int_status_1, int_status_2;
304
+
int ret;
305
+
306
+
/* read both status to have irq cleared */
307
+
ret = regmap_read(data->regmap, TPS65185_REG_INT1, &int_status_1);
308
+
if (ret)
309
+
return IRQ_NONE;
310
+
311
+
ret = regmap_read(data->regmap, TPS65185_REG_INT2, &int_status_2);
312
+
if (ret)
313
+
return IRQ_NONE;
314
+
315
+
if (int_status_2 & BIT(0))
316
+
complete(&data->tmst_completion);
317
+
318
+
dev_dbg(data->dev, "irq status %02x %02x\n", int_status_1, int_status_2);
319
+
320
+
if (int_status_1 || int_status_2)
321
+
return IRQ_HANDLED;
322
+
323
+
return IRQ_NONE;
324
+
}
325
+
326
+
static int tps65185_probe(struct i2c_client *client)
327
+
{
328
+
struct tps65185_data *data;
329
+
struct regulator_config config = { };
330
+
struct regulator_dev *rdev;
331
+
int ret = 0;
332
+
int i;
333
+
334
+
data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
335
+
data->regmap = devm_regmap_init_i2c(client, ®map_config);
336
+
if (IS_ERR(data->regmap))
337
+
return dev_err_probe(&client->dev, PTR_ERR(data->regmap),
338
+
"failed to allocate regmap!\n");
339
+
340
+
data->pgood_gpio = devm_gpiod_get(&client->dev, "pwr-good", GPIOD_IN);
341
+
if (IS_ERR(data->pgood_gpio))
342
+
return dev_err_probe(&client->dev,
343
+
PTR_ERR(data->pgood_gpio),
344
+
"failed to get power good gpio\n");
345
+
346
+
data->pgood_irq = gpiod_to_irq(data->pgood_gpio);
347
+
if (data->pgood_irq < 0)
348
+
return data->pgood_irq;
349
+
350
+
data->pwrup_gpio = devm_gpiod_get_optional(&client->dev, "enable", GPIOD_OUT_LOW);
351
+
if (IS_ERR(data->pwrup_gpio))
352
+
return dev_err_probe(&client->dev, PTR_ERR(data->pwrup_gpio),
353
+
"failed to get pwrup gpio\n");
354
+
355
+
data->wakeup_gpio = devm_gpiod_get_optional(&client->dev, "wakeup", GPIOD_OUT_HIGH);
356
+
if (IS_ERR(data->wakeup_gpio))
357
+
return dev_err_probe(&client->dev,
358
+
PTR_ERR(data->wakeup_gpio),
359
+
"failed to get wakeup gpio\n");
360
+
361
+
data->vcom_ctrl_gpio = devm_gpiod_get_optional(&client->dev, "vcom-ctrl", GPIOD_OUT_LOW);
362
+
if (IS_ERR(data->vcom_ctrl_gpio))
363
+
return dev_err_probe(&client->dev,
364
+
PTR_ERR(data->vcom_ctrl_gpio),
365
+
"failed to get vcm ctrl gpio\n");
366
+
367
+
ret = devm_regulator_get_enable(&client->dev, "vin");
368
+
if (ret)
369
+
return dev_err_probe(&client->dev, ret,
370
+
"failed to get vin regulator\n");
371
+
372
+
data->dev = &client->dev;
373
+
i2c_set_clientdata(client, data);
374
+
375
+
init_completion(&data->pgood_completion);
376
+
init_completion(&data->tmst_completion);
377
+
378
+
ret = devm_request_threaded_irq(&client->dev, data->pgood_irq, NULL,
379
+
pgood_handler,
380
+
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
381
+
"PGOOD", data);
382
+
if (ret)
383
+
return dev_err_probe(&client->dev, ret,
384
+
"failed to request power good irq\n");
385
+
386
+
if (client->irq) {
387
+
ret = devm_request_threaded_irq(&client->dev, client->irq,
388
+
NULL, tps65185_irq_thread,
389
+
IRQF_TRIGGER_LOW | IRQF_ONESHOT,
390
+
"tps65185", data);
391
+
if (ret)
392
+
return dev_err_probe(&client->dev, ret,
393
+
"failed to request irq\n");
394
+
}
395
+
396
+
ret = regmap_update_bits(data->regmap, TPS65185_REG_INT_EN2, BIT(0), BIT(0));
397
+
if (ret)
398
+
return dev_err_probe(&client->dev, ret,
399
+
"failed to enable temp irq\n");
400
+
401
+
config.driver_data = data;
402
+
config.dev = &client->dev;
403
+
config.regmap = data->regmap;
404
+
405
+
for (i = 0; i < ARRAY_SIZE(regulators); i++) {
406
+
rdev = devm_regulator_register(&client->dev, ®ulators[i],
407
+
&config);
408
+
if (IS_ERR(rdev))
409
+
return dev_err_probe(&client->dev, PTR_ERR(rdev),
410
+
"failed to register %s regulator\n",
411
+
regulators[i].name);
412
+
}
413
+
414
+
config.ena_gpiod = data->vcom_ctrl_gpio;
415
+
rdev = devm_regulator_register(&client->dev, &vcom_regulator_desc, &config);
416
+
if (IS_ERR(rdev))
417
+
return dev_err_probe(&client->dev, PTR_ERR(rdev),
418
+
"failed to register vcom regulator\n");
419
+
420
+
if (IS_REACHABLE(CONFIG_HWMON)) {
421
+
struct device *hwmon_dev;
422
+
423
+
hwmon_dev = devm_hwmon_device_register_with_info(&client->dev, "tps65185", data,
424
+
&tps65185_chip_info, NULL);
425
+
if (IS_ERR(hwmon_dev))
426
+
dev_notice(&client->dev, "failed to register hwmon\n");
427
+
}
428
+
429
+
return 0;
430
+
}
431
+
432
+
static const struct of_device_id tps65185_dt_ids[] = {
433
+
{
434
+
.compatible = "ti,tps65185",
435
+
}, {
436
+
/* sentinel */
437
+
}
438
+
};
439
+
MODULE_DEVICE_TABLE(of, tps65185_dt_ids);
440
+
441
+
static struct i2c_driver tps65185_i2c_driver = {
442
+
.driver = {
443
+
.name = "tps65185",
444
+
.of_match_table = tps65185_dt_ids,
445
+
},
446
+
.probe = tps65185_probe,
447
+
};
448
+
449
+
module_i2c_driver(tps65185_i2c_driver);
450
+
451
+
/* Module information */
452
+
MODULE_DESCRIPTION("TPS65185 regulator driver");
453
+
MODULE_LICENSE("GPL");
454
+
+8
-13
drivers/rtc/rtc-s5m.c
+8
-13
drivers/rtc/rtc-s5m.c
···
15
15
#include <linux/rtc.h>
16
16
#include <linux/platform_device.h>
17
17
#include <linux/mfd/samsung/core.h>
18
-
#include <linux/mfd/samsung/irq.h>
19
18
#include <linux/mfd/samsung/rtc.h>
20
19
#include <linux/mfd/samsung/s2mps14.h>
21
20
···
682
683
case S2MPS15X:
683
684
regmap_cfg = &s2mps14_rtc_regmap_config;
684
685
info->regs = &s2mps15_rtc_regs;
685
-
alarm_irq = S2MPS14_IRQ_RTCA0;
686
686
break;
687
687
case S2MPS14X:
688
688
regmap_cfg = &s2mps14_rtc_regmap_config;
689
689
info->regs = &s2mps14_rtc_regs;
690
-
alarm_irq = S2MPS14_IRQ_RTCA0;
691
690
break;
692
691
case S2MPS13X:
693
692
regmap_cfg = &s2mps14_rtc_regmap_config;
694
693
info->regs = &s2mps13_rtc_regs;
695
-
alarm_irq = S2MPS14_IRQ_RTCA0;
696
694
break;
697
695
case S5M8767X:
698
696
regmap_cfg = &s5m_rtc_regmap_config;
699
697
info->regs = &s5m_rtc_regs;
700
-
alarm_irq = S5M8767_IRQ_RTCA1;
701
698
break;
702
699
default:
703
700
return dev_err_probe(&pdev->dev, -ENODEV,
···
714
719
"Failed to allocate regmap\n");
715
720
} else if (device_type == S2MPG10) {
716
721
info->regs = &s2mpg10_rtc_regs;
717
-
alarm_irq = S2MPG10_IRQ_RTCA0;
718
722
} else {
719
723
return dev_err_probe(&pdev->dev, -ENODEV,
720
724
"Unsupported device type %d\n",
···
724
730
info->s5m87xx = s5m87xx;
725
731
info->device_type = device_type;
726
732
727
-
if (s5m87xx->irq_data) {
728
-
info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
729
-
if (info->irq <= 0)
730
-
return dev_err_probe(&pdev->dev, -EINVAL,
731
-
"Failed to get virtual IRQ %d\n",
732
-
alarm_irq);
733
-
}
733
+
alarm_irq = platform_get_irq_byname_optional(pdev, "alarm");
734
+
if (alarm_irq > 0)
735
+
info->irq = alarm_irq;
736
+
else if (alarm_irq == -ENXIO)
737
+
info->irq = 0;
738
+
else
739
+
return dev_err_probe(&pdev->dev, alarm_irq ? : -EINVAL,
740
+
"IRQ 'alarm' not found\n");
734
741
735
742
platform_set_drvdata(pdev, info);
736
743
+53
include/dt-bindings/regulator/samsung,s2mpg10-regulator.h
+53
include/dt-bindings/regulator/samsung,s2mpg10-regulator.h
···
1
+
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2
+
/*
3
+
* Copyright 2021 Google LLC
4
+
* Copyright 2025 Linaro Ltd.
5
+
*
6
+
* Device Tree binding constants for the Samsung S2MPG1x PMIC regulators
7
+
*/
8
+
9
+
#ifndef _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H
10
+
#define _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H
11
+
12
+
/*
13
+
* Several regulators may be controlled via external signals instead of via
14
+
* software. These constants describe the possible signals for such regulators
15
+
* and generally correspond to the respecitve on-chip pins.
16
+
*
17
+
* S2MPG10 regulators supporting these are:
18
+
* - buck1m .. buck7m buck10m
19
+
* - ldo3m .. ldo19m
20
+
*
21
+
* ldo20m supports external control, but using a different set of control
22
+
* signals.
23
+
*
24
+
* S2MPG11 regulators supporting these are:
25
+
* - buck1s .. buck3s buck5s buck8s buck9s bucka buckd
26
+
* - ldo1s ldo2s ldo8s ldo13s
27
+
*/
28
+
#define S2MPG10_EXTCTRL_PWREN 0 /* PWREN pin */
29
+
#define S2MPG10_EXTCTRL_PWREN_MIF 1 /* PWREN_MIF pin */
30
+
#define S2MPG10_EXTCTRL_AP_ACTIVE_N 2 /* ~AP_ACTIVE_N pin */
31
+
#define S2MPG10_EXTCTRL_CPUCL1_EN 3 /* CPUCL1_EN pin */
32
+
#define S2MPG10_EXTCTRL_CPUCL1_EN2 4 /* CPUCL1_EN & PWREN pins */
33
+
#define S2MPG10_EXTCTRL_CPUCL2_EN 5 /* CPUCL2_EN pin */
34
+
#define S2MPG10_EXTCTRL_CPUCL2_EN2 6 /* CPUCL2_E2 & PWREN pins */
35
+
#define S2MPG10_EXTCTRL_TPU_EN 7 /* TPU_EN pin */
36
+
#define S2MPG10_EXTCTRL_TPU_EN2 8 /* TPU_EN & ~AP_ACTIVE_N pins */
37
+
#define S2MPG10_EXTCTRL_TCXO_ON 9 /* TCXO_ON pin */
38
+
#define S2MPG10_EXTCTRL_TCXO_ON2 10 /* TCXO_ON & ~AP_ACTIVE_N pins */
39
+
40
+
#define S2MPG10_EXTCTRL_LDO20M_EN2 11 /* VLDO20M_EN & LDO20M_SFR */
41
+
#define S2MPG10_EXTCTRL_LDO20M_EN 12 /* VLDO20M_EN pin */
42
+
43
+
#define S2MPG11_EXTCTRL_PWREN 0 /* PWREN pin */
44
+
#define S2MPG11_EXTCTRL_PWREN_MIF 1 /* PWREN_MIF pin */
45
+
#define S2MPG11_EXTCTRL_AP_ACTIVE_N 2 /* ~AP_ACTIVE_N pin */
46
+
#define S2MPG11_EXTCTRL_G3D_EN 3 /* G3D_EN pin */
47
+
#define S2MPG11_EXTCTRL_G3D_EN2 4 /* G3D_EN & ~AP_ACTIVE_N pins */
48
+
#define S2MPG11_EXTCTRL_AOC_VDD 5 /* AOC_VDD pin */
49
+
#define S2MPG11_EXTCTRL_AOC_RET 6 /* AOC_RET pin */
50
+
#define S2MPG11_EXTCTRL_UFS_EN 7 /* UFS_EN pin */
51
+
#define S2MPG11_EXTCTRL_LDO13S_EN 8 /* VLDO13S_EN pin */
52
+
53
+
#endif /* _DT_BINDINGS_REGULATOR_SAMSUNG_S2MPG10_H */
+1
-1
include/linux/mfd/samsung/core.h
+1
-1
include/linux/mfd/samsung/core.h
+105
include/linux/mfd/samsung/irq.h
+105
include/linux/mfd/samsung/irq.h
···
166
166
S2MPG10_IRQ_NR,
167
167
};
168
168
169
+
enum s2mpg11_common_irq {
170
+
/* Top-level (common) block */
171
+
S2MPG11_COMMON_IRQ_PMIC,
172
+
S2MPG11_COMMON_IRQ_UNUSED,
173
+
};
174
+
175
+
enum s2mpg11_irq {
176
+
/* PMIC */
177
+
S2MPG11_IRQ_PWRONF,
178
+
S2MPG11_IRQ_PWRONR,
179
+
S2MPG11_IRQ_PIF_TIMEOUT_MIF,
180
+
S2MPG11_IRQ_PIF_TIMEOUTS,
181
+
S2MPG11_IRQ_WTSR,
182
+
S2MPG11_IRQ_SPD_ABNORMAL_STOP,
183
+
S2MPG11_IRQ_SPD_PARITY_ERR,
184
+
#define S2MPG11_IRQ_PWRONF_MASK BIT(0)
185
+
#define S2MPG11_IRQ_PWRONR_MASK BIT(1)
186
+
#define S2MPG11_IRQ_PIF_TIMEOUT_MIF_MASK BIT(3)
187
+
#define S2MPG11_IRQ_PIF_TIMEOUTS_MASK BIT(4)
188
+
#define S2MPG11_IRQ_WTSR_MASK BIT(5)
189
+
#define S2MPG11_IRQ_SPD_ABNORMAL_STOP_MASK BIT(6)
190
+
#define S2MPG11_IRQ_SPD_PARITY_ERR_MASK BIT(7)
191
+
192
+
S2MPG11_IRQ_140C,
193
+
S2MPG11_IRQ_120C,
194
+
S2MPG11_IRQ_TSD,
195
+
S2MPG11_IRQ_WRST,
196
+
S2MPG11_IRQ_NTC_CYCLE_DONE,
197
+
S2MPG11_IRQ_PMETER_OVERF,
198
+
#define S2MPG11_IRQ_INT140C_MASK BIT(0)
199
+
#define S2MPG11_IRQ_INT120C_MASK BIT(1)
200
+
#define S2MPG11_IRQ_TSD_MASK BIT(2)
201
+
#define S2MPG11_IRQ_WRST_MASK BIT(5)
202
+
#define S2MPG11_IRQ_NTC_CYCLE_DONE_MASK BIT(6)
203
+
#define S2MPG11_IRQ_PMETER_OVERF_MASK BIT(7)
204
+
205
+
S2MPG11_IRQ_OCP_B1S,
206
+
S2MPG11_IRQ_OCP_B2S,
207
+
S2MPG11_IRQ_OCP_B3S,
208
+
S2MPG11_IRQ_OCP_B4S,
209
+
S2MPG11_IRQ_OCP_B5S,
210
+
S2MPG11_IRQ_OCP_B6S,
211
+
S2MPG11_IRQ_OCP_B7S,
212
+
S2MPG11_IRQ_OCP_B8S,
213
+
#define S2MPG11_IRQ_OCP_B1S_MASK BIT(0)
214
+
#define S2MPG11_IRQ_OCP_B2S_MASK BIT(1)
215
+
#define S2MPG11_IRQ_OCP_B3S_MASK BIT(2)
216
+
#define S2MPG11_IRQ_OCP_B4S_MASK BIT(3)
217
+
#define S2MPG11_IRQ_OCP_B5S_MASK BIT(4)
218
+
#define S2MPG11_IRQ_OCP_B6S_MASK BIT(5)
219
+
#define S2MPG11_IRQ_OCP_B7S_MASK BIT(6)
220
+
#define S2MPG11_IRQ_OCP_B8S_MASK BIT(7)
221
+
222
+
S2MPG11_IRQ_OCP_B9S,
223
+
S2MPG11_IRQ_OCP_B10S,
224
+
S2MPG11_IRQ_OCP_BDS,
225
+
S2MPG11_IRQ_OCP_BAS,
226
+
S2MPG11_IRQ_OCP_BBS,
227
+
S2MPG11_IRQ_WLWP_ACC,
228
+
S2MPG11_IRQ_SPD_SRP_PKT_RST,
229
+
#define S2MPG11_IRQ_OCP_B9S_MASK BIT(0)
230
+
#define S2MPG11_IRQ_OCP_B10S_MASK BIT(1)
231
+
#define S2MPG11_IRQ_OCP_BDS_MASK BIT(2)
232
+
#define S2MPG11_IRQ_OCP_BAS_MASK BIT(3)
233
+
#define S2MPG11_IRQ_OCP_BBS_MASK BIT(4)
234
+
#define S2MPG11_IRQ_WLWP_ACC_MASK BIT(5)
235
+
#define S2MPG11_IRQ_SPD_SRP_PKT_RST_MASK BIT(7)
236
+
237
+
S2MPG11_IRQ_PWR_WARN_CH0,
238
+
S2MPG11_IRQ_PWR_WARN_CH1,
239
+
S2MPG11_IRQ_PWR_WARN_CH2,
240
+
S2MPG11_IRQ_PWR_WARN_CH3,
241
+
S2MPG11_IRQ_PWR_WARN_CH4,
242
+
S2MPG11_IRQ_PWR_WARN_CH5,
243
+
S2MPG11_IRQ_PWR_WARN_CH6,
244
+
S2MPG11_IRQ_PWR_WARN_CH7,
245
+
#define S2MPG11_IRQ_PWR_WARN_CH0_MASK BIT(0)
246
+
#define S2MPG11_IRQ_PWR_WARN_CH1_MASK BIT(1)
247
+
#define S2MPG11_IRQ_PWR_WARN_CH2_MASK BIT(2)
248
+
#define S2MPG11_IRQ_PWR_WARN_CH3_MASK BIT(3)
249
+
#define S2MPG11_IRQ_PWR_WARN_CH4_MASK BIT(4)
250
+
#define S2MPG11_IRQ_PWR_WARN_CH5_MASK BIT(5)
251
+
#define S2MPG11_IRQ_PWR_WARN_CH6_MASK BIT(6)
252
+
#define S2MPG11_IRQ_PWR_WARN_CH7_MASK BIT(7)
253
+
254
+
S2MPG11_IRQ_NTC_WARN_CH0,
255
+
S2MPG11_IRQ_NTC_WARN_CH1,
256
+
S2MPG11_IRQ_NTC_WARN_CH2,
257
+
S2MPG11_IRQ_NTC_WARN_CH3,
258
+
S2MPG11_IRQ_NTC_WARN_CH4,
259
+
S2MPG11_IRQ_NTC_WARN_CH5,
260
+
S2MPG11_IRQ_NTC_WARN_CH6,
261
+
S2MPG11_IRQ_NTC_WARN_CH7,
262
+
#define S2MPG11_IRQ_NTC_WARN_CH0_MASK BIT(0)
263
+
#define S2MPG11_IRQ_NTC_WARN_CH1_MASK BIT(1)
264
+
#define S2MPG11_IRQ_NTC_WARN_CH2_MASK BIT(2)
265
+
#define S2MPG11_IRQ_NTC_WARN_CH3_MASK BIT(3)
266
+
#define S2MPG11_IRQ_NTC_WARN_CH4_MASK BIT(4)
267
+
#define S2MPG11_IRQ_NTC_WARN_CH5_MASK BIT(5)
268
+
#define S2MPG11_IRQ_NTC_WARN_CH6_MASK BIT(6)
269
+
#define S2MPG11_IRQ_NTC_WARN_CH7_MASK BIT(7)
270
+
271
+
S2MPG11_IRQ_NR,
272
+
};
273
+
169
274
enum s2mps11_irq {
170
275
S2MPS11_IRQ_PWRONF,
171
276
S2MPS11_IRQ_PWRONR,
+34
-10
include/linux/mfd/samsung/s2mpg10.h
+34
-10
include/linux/mfd/samsung/s2mpg10.h
···
290
290
S2MPG10_PMIC_LDO_SENSE4,
291
291
};
292
292
293
+
/* Rail controlled externally, based on PCTRLSELx */
294
+
#define S2MPG10_PMIC_CTRL_ENABLE_EXT BIT(0)
295
+
296
+
/* For S2MPG10_PMIC_PCTRLSELx */
297
+
#define S2MPG10_PCTRLSEL_PWREN 0x1 /* PWREN pin */
298
+
#define S2MPG10_PCTRLSEL_PWREN_TRG 0x2 /* PWREN_TRG bit in MIMICKING_CTRL */
299
+
#define S2MPG10_PCTRLSEL_PWREN_MIF 0x3 /* PWREN_MIF pin */
300
+
#define S2MPG10_PCTRLSEL_PWREN_MIF_TRG 0x4 /* PWREN_MIF_TRG bit in MIMICKING_CTRL */
301
+
#define S2MPG10_PCTRLSEL_AP_ACTIVE_N 0x5 /* ~AP_ACTIVE_N pin */
302
+
#define S2MPG10_PCTRLSEL_AP_ACTIVE_N_TRG 0x6 /* ~AP_ACTIVE_N_TRG bit in MIMICKING_CTRL */
303
+
#define S2MPG10_PCTRLSEL_CPUCL1_EN 0x7 /* CPUCL1_EN pin */
304
+
#define S2MPG10_PCTRLSEL_CPUCL1_EN2 0x8 /* CPUCL1_EN & PWREN pins */
305
+
#define S2MPG10_PCTRLSEL_CPUCL2_EN 0x9 /* CPUCL2_EN pin */
306
+
#define S2MPG10_PCTRLSEL_CPUCL2_EN2 0xa /* CPUCL2_E2 & PWREN pins */
307
+
#define S2MPG10_PCTRLSEL_TPU_EN 0xb /* TPU_EN pin */
308
+
#define S2MPG10_PCTRLSEL_TPU_EN2 0xc /* TPU_EN & ~AP_ACTIVE_N pins */
309
+
#define S2MPG10_PCTRLSEL_TCXO_ON 0xd /* TCXO_ON pin */
310
+
#define S2MPG10_PCTRLSEL_TCXO_ON2 0xe /* TCXO_ON & ~AP_ACTIVE_N pins */
311
+
312
+
/* For S2MPG10_PMIC_PCTRLSELx of LDO20M */
313
+
#define S2MPG10_PCTRLSEL_LDO20M_EN2 0x1 /* VLDO20M_EN & LDO20M_SFR */
314
+
#define S2MPG10_PCTRLSEL_LDO20M_EN 0x2 /* VLDO20M_EN pin */
315
+
#define S2MPG10_PCTRLSEL_LDO20M_SFR 0x3 /* LDO20M_SFR bit in LDO_CTRL1 register */
316
+
293
317
/* Meter registers (type 0xa00) */
294
318
enum s2mpg10_meter_reg {
295
319
S2MPG10_METER_CTRL1,
···
431
407
432
408
/* S2MPG10 regulator IDs */
433
409
enum s2mpg10_regulators {
410
+
S2MPG10_BUCK1,
411
+
S2MPG10_BUCK2,
412
+
S2MPG10_BUCK3,
413
+
S2MPG10_BUCK4,
414
+
S2MPG10_BUCK5,
415
+
S2MPG10_BUCK6,
416
+
S2MPG10_BUCK7,
417
+
S2MPG10_BUCK8,
418
+
S2MPG10_BUCK9,
419
+
S2MPG10_BUCK10,
434
420
S2MPG10_LDO1,
435
421
S2MPG10_LDO2,
436
422
S2MPG10_LDO3,
···
472
438
S2MPG10_LDO29,
473
439
S2MPG10_LDO30,
474
440
S2MPG10_LDO31,
475
-
S2MPG10_BUCK1,
476
-
S2MPG10_BUCK2,
477
-
S2MPG10_BUCK3,
478
-
S2MPG10_BUCK4,
479
-
S2MPG10_BUCK5,
480
-
S2MPG10_BUCK6,
481
-
S2MPG10_BUCK7,
482
-
S2MPG10_BUCK8,
483
-
S2MPG10_BUCK9,
484
-
S2MPG10_BUCK10,
485
441
S2MPG10_REGULATOR_MAX,
486
442
};
487
443
+434
include/linux/mfd/samsung/s2mpg11.h
+434
include/linux/mfd/samsung/s2mpg11.h
···
1
+
/* SPDX-License-Identifier: GPL-2.0+ */
2
+
/*
3
+
* Copyright 2015 Samsung Electronics
4
+
* Copyright 2020 Google Inc
5
+
* Copyright 2025 Linaro Ltd.
6
+
*/
7
+
8
+
#ifndef __LINUX_MFD_S2MPG11_H
9
+
#define __LINUX_MFD_S2MPG11_H
10
+
11
+
/* Common registers (type 0x000) */
12
+
enum s2mpg11_common_reg {
13
+
S2MPG11_COMMON_CHIPID,
14
+
S2MPG11_COMMON_INT,
15
+
S2MPG11_COMMON_INT_MASK,
16
+
S2MPG11_COMMON_SPD_CTRL1 = 0x0a,
17
+
S2MPG11_COMMON_SPD_CTRL2,
18
+
S2MPG11_COMMON_SPD_CTRL3,
19
+
S2MPG11_COMMON_MON1SEL = 0x1a,
20
+
S2MPG11_COMMON_MON2SEL,
21
+
S2MPG11_COMMON_MONR,
22
+
S2MPG11_COMMON_DEBUG_CTRL1,
23
+
S2MPG11_COMMON_DEBUG_CTRL2,
24
+
S2MPG11_COMMON_DEBUG_CTRL3,
25
+
S2MPG11_COMMON_DEBUG_CTRL4,
26
+
S2MPG11_COMMON_DEBUG_CTRL5,
27
+
S2MPG11_COMMON_DEBUG_CTRL6,
28
+
S2MPG11_COMMON_TEST_MODE1,
29
+
S2MPG11_COMMON_SPD_DEBUG1,
30
+
S2MPG11_COMMON_SPD_DEBUG2,
31
+
S2MPG11_COMMON_SPD_DEBUG3,
32
+
S2MPG11_COMMON_SPD_DEBUG4,
33
+
};
34
+
35
+
/* For S2MPG11_COMMON_INT and S2MPG11_COMMON_INT_MASK */
36
+
#define S2MPG11_COMMON_INT_SRC GENMASK(2, 0)
37
+
#define S2MPG11_COMMON_INT_SRC_PMIC BIT(0)
38
+
39
+
/* PMIC registers (type 0x100) */
40
+
enum s2mpg11_pmic_reg {
41
+
S2MPG11_PMIC_INT1,
42
+
S2MPG11_PMIC_INT2,
43
+
S2MPG11_PMIC_INT3,
44
+
S2MPG11_PMIC_INT4,
45
+
S2MPG11_PMIC_INT5,
46
+
S2MPG11_PMIC_INT6,
47
+
S2MPG11_PMIC_INT1M,
48
+
S2MPG11_PMIC_INT2M,
49
+
S2MPG11_PMIC_INT3M,
50
+
S2MPG11_PMIC_INT4M,
51
+
S2MPG11_PMIC_INT5M,
52
+
S2MPG11_PMIC_INT6M,
53
+
S2MPG11_PMIC_STATUS1,
54
+
S2MPG11_PMIC_OFFSRC,
55
+
S2MPG11_PMIC_COMMON_CTRL1,
56
+
S2MPG11_PMIC_COMMON_CTRL2,
57
+
S2MPG11_PMIC_COMMON_CTRL3,
58
+
S2MPG11_PMIC_MIMICKING_CTRL,
59
+
S2MPG11_PMIC_B1S_CTRL,
60
+
S2MPG11_PMIC_B1S_OUT1,
61
+
S2MPG11_PMIC_B1S_OUT2,
62
+
S2MPG11_PMIC_B2S_CTRL,
63
+
S2MPG11_PMIC_B2S_OUT1,
64
+
S2MPG11_PMIC_B2S_OUT2,
65
+
S2MPG11_PMIC_B3S_CTRL,
66
+
S2MPG11_PMIC_B3S_OUT1,
67
+
S2MPG11_PMIC_B3S_OUT2,
68
+
S2MPG11_PMIC_B4S_CTRL,
69
+
S2MPG11_PMIC_B4S_OUT,
70
+
S2MPG11_PMIC_B5S_CTRL,
71
+
S2MPG11_PMIC_B5S_OUT,
72
+
S2MPG11_PMIC_B6S_CTRL,
73
+
S2MPG11_PMIC_B6S_OUT1,
74
+
S2MPG11_PMIC_B6S_OUT2,
75
+
S2MPG11_PMIC_B7S_CTRL,
76
+
S2MPG11_PMIC_B7S_OUT1,
77
+
S2MPG11_PMIC_B7S_OUT2,
78
+
S2MPG11_PMIC_B8S_CTRL,
79
+
S2MPG11_PMIC_B8S_OUT1,
80
+
S2MPG11_PMIC_B8S_OUT2,
81
+
S2MPG11_PMIC_B9S_CTRL,
82
+
S2MPG11_PMIC_B9S_OUT1,
83
+
S2MPG11_PMIC_B9S_OUT2,
84
+
S2MPG11_PMIC_B10S_CTRL,
85
+
S2MPG11_PMIC_B10S_OUT,
86
+
S2MPG11_PMIC_BUCKD_CTRL,
87
+
S2MPG11_PMIC_BUCKD_OUT,
88
+
S2MPG11_PMIC_BUCKA_CTRL,
89
+
S2MPG11_PMIC_BUCKA_OUT,
90
+
S2MPG11_PMIC_BB_CTRL,
91
+
S2MPG11_PMIC_BB_OUT1,
92
+
S2MPG11_PMIC_BB_OUT2,
93
+
S2MPG11_PMIC_BUCK1S_USONIC,
94
+
S2MPG11_PMIC_BUCK2S_USONIC,
95
+
S2MPG11_PMIC_BUCK3S_USONIC,
96
+
S2MPG11_PMIC_BUCK4S_USONIC,
97
+
S2MPG11_PMIC_BUCK5S_USONIC,
98
+
S2MPG11_PMIC_BUCK6S_USONIC,
99
+
S2MPG11_PMIC_BUCK7S_USONIC,
100
+
S2MPG11_PMIC_BUCK8S_USONIC,
101
+
S2MPG11_PMIC_BUCK9S_USONIC,
102
+
S2MPG11_PMIC_BUCK10S_USONIC,
103
+
S2MPG11_PMIC_BUCKD_USONIC,
104
+
S2MPG11_PMIC_BUCKA_USONIC,
105
+
S2MPG11_PMIC_BB_USONIC,
106
+
S2MPG11_PMIC_L1S_CTRL1,
107
+
S2MPG11_PMIC_L1S_CTRL2,
108
+
S2MPG11_PMIC_L2S_CTRL1,
109
+
S2MPG11_PMIC_L2S_CTRL2,
110
+
S2MPG11_PMIC_L3S_CTRL,
111
+
S2MPG11_PMIC_L4S_CTRL,
112
+
S2MPG11_PMIC_L5S_CTRL,
113
+
S2MPG11_PMIC_L6S_CTRL,
114
+
S2MPG11_PMIC_L7S_CTRL,
115
+
S2MPG11_PMIC_L8S_CTRL,
116
+
S2MPG11_PMIC_L9S_CTRL,
117
+
S2MPG11_PMIC_L10S_CTRL,
118
+
S2MPG11_PMIC_L11S_CTRL,
119
+
S2MPG11_PMIC_L12S_CTRL,
120
+
S2MPG11_PMIC_L13S_CTRL,
121
+
S2MPG11_PMIC_L14S_CTRL,
122
+
S2MPG11_PMIC_L15S_CTRL,
123
+
S2MPG11_PMIC_LDO_CTRL1,
124
+
S2MPG11_PMIC_LDO_DSCH1,
125
+
S2MPG11_PMIC_LDO_DSCH2,
126
+
S2MPG11_PMIC_DVS_RAMP1,
127
+
S2MPG11_PMIC_DVS_RAMP2,
128
+
S2MPG11_PMIC_DVS_RAMP3,
129
+
S2MPG11_PMIC_DVS_RAMP4,
130
+
S2MPG11_PMIC_DVS_RAMP5,
131
+
S2MPG11_PMIC_DVS_RAMP6,
132
+
/* Nothing @ 0x5a */
133
+
S2MPG11_PMIC_DVS_SYNC_CTRL1 = 0x5c,
134
+
S2MPG11_PMIC_DVS_SYNC_CTRL2,
135
+
S2MPG11_PMIC_OFF_CTRL1,
136
+
S2MPG11_PMIC_OFF_CTRL2,
137
+
S2MPG11_PMIC_OFF_CTRL3,
138
+
S2MPG11_PMIC_SEQ_CTRL1,
139
+
S2MPG11_PMIC_SEQ_CTRL2,
140
+
S2MPG11_PMIC_SEQ_CTRL3,
141
+
S2MPG11_PMIC_SEQ_CTRL4,
142
+
S2MPG11_PMIC_SEQ_CTRL5,
143
+
S2MPG11_PMIC_SEQ_CTRL6,
144
+
S2MPG11_PMIC_SEQ_CTRL7,
145
+
S2MPG11_PMIC_SEQ_CTRL8,
146
+
S2MPG11_PMIC_SEQ_CTRL9,
147
+
S2MPG11_PMIC_SEQ_CTRL10,
148
+
S2MPG11_PMIC_SEQ_CTRL11,
149
+
S2MPG11_PMIC_SEQ_CTRL12,
150
+
S2MPG11_PMIC_SEQ_CTRL13,
151
+
S2MPG11_PMIC_SEQ_CTRL14,
152
+
S2MPG11_PMIC_SEQ_CTRL15,
153
+
S2MPG11_PMIC_SEQ_CTRL16,
154
+
S2MPG11_PMIC_SEQ_CTRL17,
155
+
S2MPG11_PMIC_SEQ_CTRL18,
156
+
S2MPG11_PMIC_SEQ_CTRL19,
157
+
S2MPG11_PMIC_SEQ_CTRL20,
158
+
S2MPG11_PMIC_SEQ_CTRL21,
159
+
S2MPG11_PMIC_SEQ_CTRL22,
160
+
S2MPG11_PMIC_SEQ_CTRL23,
161
+
S2MPG11_PMIC_SEQ_CTRL24,
162
+
S2MPG11_PMIC_SEQ_CTRL25,
163
+
S2MPG11_PMIC_SEQ_CTRL26,
164
+
S2MPG11_PMIC_SEQ_CTRL27,
165
+
S2MPG11_PMIC_OFF_SEQ_CTRL1,
166
+
S2MPG11_PMIC_OFF_SEQ_CTRL2,
167
+
S2MPG11_PMIC_OFF_SEQ_CTRL3,
168
+
S2MPG11_PMIC_OFF_SEQ_CTRL4,
169
+
S2MPG11_PMIC_OFF_SEQ_CTRL5,
170
+
S2MPG11_PMIC_OFF_SEQ_CTRL6,
171
+
S2MPG11_PMIC_OFF_SEQ_CTRL7,
172
+
S2MPG11_PMIC_OFF_SEQ_CTRL8,
173
+
S2MPG11_PMIC_OFF_SEQ_CTRL9,
174
+
S2MPG11_PMIC_OFF_SEQ_CTRL10,
175
+
S2MPG11_PMIC_OFF_SEQ_CTRL11,
176
+
S2MPG11_PMIC_OFF_SEQ_CTRL12,
177
+
S2MPG11_PMIC_OFF_SEQ_CTRL13,
178
+
S2MPG11_PMIC_OFF_SEQ_CTRL14,
179
+
S2MPG11_PMIC_OFF_SEQ_CTRL15,
180
+
S2MPG11_PMIC_OFF_SEQ_CTRL16,
181
+
S2MPG11_PMIC_OFF_SEQ_CTRL17,
182
+
S2MPG11_PMIC_PCTRLSEL1,
183
+
S2MPG11_PMIC_PCTRLSEL2,
184
+
S2MPG11_PMIC_PCTRLSEL3,
185
+
S2MPG11_PMIC_PCTRLSEL4,
186
+
S2MPG11_PMIC_PCTRLSEL5,
187
+
S2MPG11_PMIC_PCTRLSEL6,
188
+
S2MPG11_PMIC_DCTRLSEL1,
189
+
S2MPG11_PMIC_DCTRLSEL2,
190
+
S2MPG11_PMIC_DCTRLSEL3,
191
+
S2MPG11_PMIC_DCTRLSEL4,
192
+
S2MPG11_PMIC_DCTRLSEL5,
193
+
S2MPG11_PMIC_GPIO_CTRL1,
194
+
S2MPG11_PMIC_GPIO_CTRL2,
195
+
S2MPG11_PMIC_GPIO_CTRL3,
196
+
S2MPG11_PMIC_GPIO_CTRL4,
197
+
S2MPG11_PMIC_GPIO_CTRL5,
198
+
S2MPG11_PMIC_GPIO_CTRL6,
199
+
S2MPG11_PMIC_GPIO_CTRL7,
200
+
S2MPG11_PMIC_B2S_OCP_WARN,
201
+
S2MPG11_PMIC_B2S_OCP_WARN_X,
202
+
S2MPG11_PMIC_B2S_OCP_WARN_Y,
203
+
S2MPG11_PMIC_B2S_OCP_WARN_Z,
204
+
S2MPG11_PMIC_B2S_SOFT_OCP_WARN,
205
+
S2MPG11_PMIC_B2S_SOFT_OCP_WARN_X,
206
+
S2MPG11_PMIC_B2S_SOFT_OCP_WARN_Y,
207
+
S2MPG11_PMIC_B2S_SOFT_OCP_WARN_Z,
208
+
S2MPG11_PMIC_BUCK_OCP_EN1,
209
+
S2MPG11_PMIC_BUCK_OCP_EN2,
210
+
S2MPG11_PMIC_BUCK_OCP_PD_EN1,
211
+
S2MPG11_PMIC_BUCK_OCP_PD_EN2,
212
+
S2MPG11_PMIC_BUCK_OCP_CTRL1,
213
+
S2MPG11_PMIC_BUCK_OCP_CTRL2,
214
+
S2MPG11_PMIC_BUCK_OCP_CTRL3,
215
+
S2MPG11_PMIC_BUCK_OCP_CTRL4,
216
+
S2MPG11_PMIC_BUCK_OCP_CTRL5,
217
+
S2MPG11_PMIC_BUCK_OCP_CTRL6,
218
+
S2MPG11_PMIC_BUCK_OCP_CTRL7,
219
+
S2MPG11_PMIC_PIF_CTRL,
220
+
S2MPG11_PMIC_BUCK_HR_MODE1,
221
+
S2MPG11_PMIC_BUCK_HR_MODE2,
222
+
S2MPG11_PMIC_FAULTOUT_CTRL,
223
+
S2MPG11_PMIC_LDO_SENSE1,
224
+
S2MPG11_PMIC_LDO_SENSE2,
225
+
};
226
+
227
+
/* For S2MPG11_PMIC_PCTRLSELx */
228
+
#define S2MPG11_PCTRLSEL_PWREN 0x1 /* PWREN pin */
229
+
#define S2MPG11_PCTRLSEL_PWREN_TRG 0x2 /* PWREN_TRG bit in MIMICKING_CTRL */
230
+
#define S2MPG11_PCTRLSEL_PWREN_MIF 0x3 /* PWREN_MIF pin */
231
+
#define S2MPG11_PCTRLSEL_PWREN_MIF_TRG 0x4 /* PWREN_MIF_TRG bit in MIMICKING_CTRL */
232
+
#define S2MPG11_PCTRLSEL_AP_ACTIVE_N 0x5 /* ~AP_ACTIVE_N pin */
233
+
#define S2MPG11_PCTRLSEL_AP_ACTIVE_N_TRG 0x6 /* ~AP_ACTIVE_N_TRG bit in MIMICKING_CTRL */
234
+
#define S2MPG11_PCTRLSEL_G3D_EN 0x7 /* G3D_EN pin */
235
+
#define S2MPG11_PCTRLSEL_G3D_EN2 0x8 /* G3D_EN & ~AP_ACTIVE_N pins */
236
+
#define S2MPG11_PCTRLSEL_AOC_VDD 0x9 /* AOC_VDD pin */
237
+
#define S2MPG11_PCTRLSEL_AOC_RET 0xa /* AOC_RET pin */
238
+
#define S2MPG11_PCTRLSEL_UFS_EN 0xb /* UFS_EN pin */
239
+
#define S2MPG11_PCTRLSEL_LDO13S_EN 0xc /* VLDO13S_EN pin */
240
+
241
+
/* Meter registers (type 0xa00) */
242
+
enum s2mpg11_meter_reg {
243
+
S2MPG11_METER_CTRL1,
244
+
S2MPG11_METER_CTRL2,
245
+
S2MPG11_METER_CTRL3,
246
+
S2MPG11_METER_CTRL4,
247
+
S2MPG11_METER_CTRL5,
248
+
S2MPG11_METER_BUCKEN1,
249
+
S2MPG11_METER_BUCKEN2,
250
+
S2MPG11_METER_MUXSEL0,
251
+
S2MPG11_METER_MUXSEL1,
252
+
S2MPG11_METER_MUXSEL2,
253
+
S2MPG11_METER_MUXSEL3,
254
+
S2MPG11_METER_MUXSEL4,
255
+
S2MPG11_METER_MUXSEL5,
256
+
S2MPG11_METER_MUXSEL6,
257
+
S2MPG11_METER_MUXSEL7,
258
+
S2MPG11_METER_LPF_C0_0,
259
+
S2MPG11_METER_LPF_C0_1,
260
+
S2MPG11_METER_LPF_C0_2,
261
+
S2MPG11_METER_LPF_C0_3,
262
+
S2MPG11_METER_LPF_C0_4,
263
+
S2MPG11_METER_LPF_C0_5,
264
+
S2MPG11_METER_LPF_C0_6,
265
+
S2MPG11_METER_LPF_C0_7,
266
+
S2MPG11_METER_NTC_LPF_C0_0,
267
+
S2MPG11_METER_NTC_LPF_C0_1,
268
+
S2MPG11_METER_NTC_LPF_C0_2,
269
+
S2MPG11_METER_NTC_LPF_C0_3,
270
+
S2MPG11_METER_NTC_LPF_C0_4,
271
+
S2MPG11_METER_NTC_LPF_C0_5,
272
+
S2MPG11_METER_NTC_LPF_C0_6,
273
+
S2MPG11_METER_NTC_LPF_C0_7,
274
+
S2MPG11_METER_PWR_WARN0,
275
+
S2MPG11_METER_PWR_WARN1,
276
+
S2MPG11_METER_PWR_WARN2,
277
+
S2MPG11_METER_PWR_WARN3,
278
+
S2MPG11_METER_PWR_WARN4,
279
+
S2MPG11_METER_PWR_WARN5,
280
+
S2MPG11_METER_PWR_WARN6,
281
+
S2MPG11_METER_PWR_WARN7,
282
+
S2MPG11_METER_NTC_L_WARN0,
283
+
S2MPG11_METER_NTC_L_WARN1,
284
+
S2MPG11_METER_NTC_L_WARN2,
285
+
S2MPG11_METER_NTC_L_WARN3,
286
+
S2MPG11_METER_NTC_L_WARN4,
287
+
S2MPG11_METER_NTC_L_WARN5,
288
+
S2MPG11_METER_NTC_L_WARN6,
289
+
S2MPG11_METER_NTC_L_WARN7,
290
+
S2MPG11_METER_NTC_H_WARN0,
291
+
S2MPG11_METER_NTC_H_WARN1,
292
+
S2MPG11_METER_NTC_H_WARN2,
293
+
S2MPG11_METER_NTC_H_WARN3,
294
+
S2MPG11_METER_NTC_H_WARN4,
295
+
S2MPG11_METER_NTC_H_WARN5,
296
+
S2MPG11_METER_NTC_H_WARN6,
297
+
S2MPG11_METER_NTC_H_WARN7,
298
+
S2MPG11_METER_PWR_HYS1,
299
+
S2MPG11_METER_PWR_HYS2,
300
+
S2MPG11_METER_PWR_HYS3,
301
+
S2MPG11_METER_PWR_HYS4,
302
+
S2MPG11_METER_NTC_HYS1,
303
+
S2MPG11_METER_NTC_HYS2,
304
+
S2MPG11_METER_NTC_HYS3,
305
+
S2MPG11_METER_NTC_HYS4,
306
+
/* Nothing @ 0x3f */
307
+
S2MPG11_METER_ACC_DATA_CH0_1 = 0x40,
308
+
S2MPG11_METER_ACC_DATA_CH0_2,
309
+
S2MPG11_METER_ACC_DATA_CH0_3,
310
+
S2MPG11_METER_ACC_DATA_CH0_4,
311
+
S2MPG11_METER_ACC_DATA_CH0_5,
312
+
S2MPG11_METER_ACC_DATA_CH0_6,
313
+
S2MPG11_METER_ACC_DATA_CH1_1,
314
+
S2MPG11_METER_ACC_DATA_CH1_2,
315
+
S2MPG11_METER_ACC_DATA_CH1_3,
316
+
S2MPG11_METER_ACC_DATA_CH1_4,
317
+
S2MPG11_METER_ACC_DATA_CH1_5,
318
+
S2MPG11_METER_ACC_DATA_CH1_6,
319
+
S2MPG11_METER_ACC_DATA_CH2_1,
320
+
S2MPG11_METER_ACC_DATA_CH2_2,
321
+
S2MPG11_METER_ACC_DATA_CH2_3,
322
+
S2MPG11_METER_ACC_DATA_CH2_4,
323
+
S2MPG11_METER_ACC_DATA_CH2_5,
324
+
S2MPG11_METER_ACC_DATA_CH2_6,
325
+
S2MPG11_METER_ACC_DATA_CH3_1,
326
+
S2MPG11_METER_ACC_DATA_CH3_2,
327
+
S2MPG11_METER_ACC_DATA_CH3_3,
328
+
S2MPG11_METER_ACC_DATA_CH3_4,
329
+
S2MPG11_METER_ACC_DATA_CH3_5,
330
+
S2MPG11_METER_ACC_DATA_CH3_6,
331
+
S2MPG11_METER_ACC_DATA_CH4_1,
332
+
S2MPG11_METER_ACC_DATA_CH4_2,
333
+
S2MPG11_METER_ACC_DATA_CH4_3,
334
+
S2MPG11_METER_ACC_DATA_CH4_4,
335
+
S2MPG11_METER_ACC_DATA_CH4_5,
336
+
S2MPG11_METER_ACC_DATA_CH4_6,
337
+
S2MPG11_METER_ACC_DATA_CH5_1,
338
+
S2MPG11_METER_ACC_DATA_CH5_2,
339
+
S2MPG11_METER_ACC_DATA_CH5_3,
340
+
S2MPG11_METER_ACC_DATA_CH5_4,
341
+
S2MPG11_METER_ACC_DATA_CH5_5,
342
+
S2MPG11_METER_ACC_DATA_CH5_6,
343
+
S2MPG11_METER_ACC_DATA_CH6_1,
344
+
S2MPG11_METER_ACC_DATA_CH6_2,
345
+
S2MPG11_METER_ACC_DATA_CH6_3,
346
+
S2MPG11_METER_ACC_DATA_CH6_4,
347
+
S2MPG11_METER_ACC_DATA_CH6_5,
348
+
S2MPG11_METER_ACC_DATA_CH6_6,
349
+
S2MPG11_METER_ACC_DATA_CH7_1,
350
+
S2MPG11_METER_ACC_DATA_CH7_2,
351
+
S2MPG11_METER_ACC_DATA_CH7_3,
352
+
S2MPG11_METER_ACC_DATA_CH7_4,
353
+
S2MPG11_METER_ACC_DATA_CH7_5,
354
+
S2MPG11_METER_ACC_DATA_CH7_6,
355
+
S2MPG11_METER_ACC_COUNT_1,
356
+
S2MPG11_METER_ACC_COUNT_2,
357
+
S2MPG11_METER_ACC_COUNT_3,
358
+
S2MPG11_METER_LPF_DATA_CH0_1,
359
+
S2MPG11_METER_LPF_DATA_CH0_2,
360
+
S2MPG11_METER_LPF_DATA_CH0_3,
361
+
S2MPG11_METER_LPF_DATA_CH1_1,
362
+
S2MPG11_METER_LPF_DATA_CH1_2,
363
+
S2MPG11_METER_LPF_DATA_CH1_3,
364
+
S2MPG11_METER_LPF_DATA_CH2_1,
365
+
S2MPG11_METER_LPF_DATA_CH2_2,
366
+
S2MPG11_METER_LPF_DATA_CH2_3,
367
+
S2MPG11_METER_LPF_DATA_CH3_1,
368
+
S2MPG11_METER_LPF_DATA_CH3_2,
369
+
S2MPG11_METER_LPF_DATA_CH3_3,
370
+
S2MPG11_METER_LPF_DATA_CH4_1,
371
+
S2MPG11_METER_LPF_DATA_CH4_2,
372
+
S2MPG11_METER_LPF_DATA_CH4_3,
373
+
S2MPG11_METER_LPF_DATA_CH5_1,
374
+
S2MPG11_METER_LPF_DATA_CH5_2,
375
+
S2MPG11_METER_LPF_DATA_CH5_3,
376
+
S2MPG11_METER_LPF_DATA_CH6_1,
377
+
S2MPG11_METER_LPF_DATA_CH6_2,
378
+
S2MPG11_METER_LPF_DATA_CH6_3,
379
+
S2MPG11_METER_LPF_DATA_CH7_1,
380
+
S2MPG11_METER_LPF_DATA_CH7_2,
381
+
S2MPG11_METER_LPF_DATA_CH7_3,
382
+
/* Nothing @ 0x8b 0x8c */
383
+
S2MPG11_METER_LPF_DATA_NTC0_1 = 0x8d,
384
+
S2MPG11_METER_LPF_DATA_NTC0_2,
385
+
S2MPG11_METER_LPF_DATA_NTC1_1,
386
+
S2MPG11_METER_LPF_DATA_NTC1_2,
387
+
S2MPG11_METER_LPF_DATA_NTC2_1,
388
+
S2MPG11_METER_LPF_DATA_NTC2_2,
389
+
S2MPG11_METER_LPF_DATA_NTC3_1,
390
+
S2MPG11_METER_LPF_DATA_NTC3_2,
391
+
S2MPG11_METER_LPF_DATA_NTC4_1,
392
+
S2MPG11_METER_LPF_DATA_NTC4_2,
393
+
S2MPG11_METER_LPF_DATA_NTC5_1,
394
+
S2MPG11_METER_LPF_DATA_NTC5_2,
395
+
S2MPG11_METER_LPF_DATA_NTC6_1,
396
+
S2MPG11_METER_LPF_DATA_NTC6_2,
397
+
S2MPG11_METER_LPF_DATA_NTC7_1,
398
+
S2MPG11_METER_LPF_DATA_NTC7_2,
399
+
};
400
+
401
+
/* S2MPG11 regulator IDs */
402
+
enum s2mpg11_regulators {
403
+
S2MPG11_BUCKBOOST,
404
+
S2MPG11_BUCK1,
405
+
S2MPG11_BUCK2,
406
+
S2MPG11_BUCK3,
407
+
S2MPG11_BUCK4,
408
+
S2MPG11_BUCK5,
409
+
S2MPG11_BUCK6,
410
+
S2MPG11_BUCK7,
411
+
S2MPG11_BUCK8,
412
+
S2MPG11_BUCK9,
413
+
S2MPG11_BUCK10,
414
+
S2MPG11_BUCKD,
415
+
S2MPG11_BUCKA,
416
+
S2MPG11_LDO1,
417
+
S2MPG11_LDO2,
418
+
S2MPG11_LDO3,
419
+
S2MPG11_LDO4,
420
+
S2MPG11_LDO5,
421
+
S2MPG11_LDO6,
422
+
S2MPG11_LDO7,
423
+
S2MPG11_LDO8,
424
+
S2MPG11_LDO9,
425
+
S2MPG11_LDO10,
426
+
S2MPG11_LDO11,
427
+
S2MPG11_LDO12,
428
+
S2MPG11_LDO13,
429
+
S2MPG11_LDO14,
430
+
S2MPG11_LDO15,
431
+
S2MPG11_REGULATOR_MAX,
432
+
};
433
+
434
+
#endif /* __LINUX_MFD_S2MPG11_H */
+7
include/linux/regulator/driver.h
+7
include/linux/regulator/driver.h
···
53
53
#define REGULATOR_LINEAR_RANGE(_min_uV, _min_sel, _max_sel, _step_uV) \
54
54
LINEAR_RANGE(_min_uV, _min_sel, _max_sel, _step_uV)
55
55
56
+
/* Initialize struct linear_range using voltages, not selectors */
57
+
#define REGULATOR_LINEAR_VRANGE(_offs_uV, _min_uV, _max_uV, _step_uV) \
58
+
LINEAR_RANGE(_min_uV, ((_min_uV) - (_offs_uV)) / (_step_uV), \
59
+
((_max_uV) - (_offs_uV)) / (_step_uV), _step_uV)
60
+
56
61
/**
57
62
* struct regulator_ops - regulator operations.
58
63
*
···
640
635
int ref_cnt;
641
636
struct module *owner;
642
637
struct device dev;
638
+
struct device bdev;
643
639
struct regulation_constraints *constraints;
644
640
struct regulator *supply; /* for tree */
645
641
const char *supply_name;
···
655
649
struct regulator_enable_gpio *ena_pin;
656
650
unsigned int ena_gpio_state:1;
657
651
652
+
unsigned int constraints_pending:1;
658
653
unsigned int is_switch:1;
659
654
660
655
/* time when this regulator was disabled last time */
+14
-10
rust/helpers/regulator.c
+14
-10
rust/helpers/regulator.c
···
4
4
5
5
#ifndef CONFIG_REGULATOR
6
6
7
-
void rust_helper_regulator_put(struct regulator *regulator)
7
+
__rust_helper void rust_helper_regulator_put(struct regulator *regulator)
8
8
{
9
9
regulator_put(regulator);
10
10
}
11
11
12
-
int rust_helper_regulator_set_voltage(struct regulator *regulator, int min_uV,
13
-
int max_uV)
12
+
__rust_helper int rust_helper_regulator_set_voltage(struct regulator *regulator,
13
+
int min_uV, int max_uV)
14
14
{
15
15
return regulator_set_voltage(regulator, min_uV, max_uV);
16
16
}
17
17
18
-
int rust_helper_regulator_get_voltage(struct regulator *regulator)
18
+
__rust_helper int rust_helper_regulator_get_voltage(struct regulator *regulator)
19
19
{
20
20
return regulator_get_voltage(regulator);
21
21
}
22
22
23
-
struct regulator *rust_helper_regulator_get(struct device *dev, const char *id)
23
+
__rust_helper struct regulator *rust_helper_regulator_get(struct device *dev,
24
+
const char *id)
24
25
{
25
26
return regulator_get(dev, id);
26
27
}
27
28
28
-
int rust_helper_regulator_enable(struct regulator *regulator)
29
+
__rust_helper int rust_helper_regulator_enable(struct regulator *regulator)
29
30
{
30
31
return regulator_enable(regulator);
31
32
}
32
33
33
-
int rust_helper_regulator_disable(struct regulator *regulator)
34
+
__rust_helper int rust_helper_regulator_disable(struct regulator *regulator)
34
35
{
35
36
return regulator_disable(regulator);
36
37
}
37
38
38
-
int rust_helper_regulator_is_enabled(struct regulator *regulator)
39
+
__rust_helper int rust_helper_regulator_is_enabled(struct regulator *regulator)
39
40
{
40
41
return regulator_is_enabled(regulator);
41
42
}
42
43
43
-
int rust_helper_devm_regulator_get_enable(struct device *dev, const char *id)
44
+
__rust_helper int rust_helper_devm_regulator_get_enable(struct device *dev,
45
+
const char *id)
44
46
{
45
47
return devm_regulator_get_enable(dev, id);
46
48
}
47
49
48
-
int rust_helper_devm_regulator_get_enable_optional(struct device *dev, const char *id)
50
+
__rust_helper int
51
+
rust_helper_devm_regulator_get_enable_optional(struct device *dev,
52
+
const char *id)
49
53
{
50
54
return devm_regulator_get_enable_optional(dev, id);
51
55
}
+3
-6
rust/kernel/regulator.rs
+3
-6
rust/kernel/regulator.rs
···
122
122
///
123
123
/// ```
124
124
/// # use kernel::prelude::*;
125
-
/// # use kernel::c_str;
126
125
/// # use kernel::device::Device;
127
126
/// # use kernel::regulator::{Voltage, Regulator, Disabled, Enabled};
128
127
/// fn enable(dev: &Device, min_voltage: Voltage, max_voltage: Voltage) -> Result {
129
128
/// // Obtain a reference to a (fictitious) regulator.
130
-
/// let regulator: Regulator<Disabled> = Regulator::<Disabled>::get(dev, c_str!("vcc"))?;
129
+
/// let regulator: Regulator<Disabled> = Regulator::<Disabled>::get(dev, c"vcc")?;
131
130
///
132
131
/// // The voltage can be set before enabling the regulator if needed, e.g.:
133
132
/// regulator.set_voltage(min_voltage, max_voltage)?;
···
165
166
///
166
167
/// ```
167
168
/// # use kernel::prelude::*;
168
-
/// # use kernel::c_str;
169
169
/// # use kernel::device::Device;
170
170
/// # use kernel::regulator::{Voltage, Regulator, Enabled};
171
171
/// fn enable(dev: &Device) -> Result {
172
172
/// // Obtain a reference to a (fictitious) regulator and enable it.
173
-
/// let regulator: Regulator<Enabled> = Regulator::<Enabled>::get(dev, c_str!("vcc"))?;
173
+
/// let regulator: Regulator<Enabled> = Regulator::<Enabled>::get(dev, c"vcc")?;
174
174
///
175
175
/// // Dropping an enabled regulator will disable it. The refcount will be
176
176
/// // decremented.
···
191
193
///
192
194
/// ```
193
195
/// # use kernel::prelude::*;
194
-
/// # use kernel::c_str;
195
196
/// # use kernel::device::{Bound, Device};
196
197
/// # use kernel::regulator;
197
198
/// fn enable(dev: &Device<Bound>) -> Result {
198
199
/// // Obtain a reference to a (fictitious) regulator and enable it. This
199
200
/// // call only returns whether the operation succeeded.
200
-
/// regulator::devm_enable(dev, c_str!("vcc"))?;
201
+
/// regulator::devm_enable(dev, c"vcc")?;
201
202
///
202
203
/// // The regulator will be disabled and put when `dev` is unbound.
203
204
/// Ok(())