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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
dt-bindings: pinctrl: realtek: Add RTD1625 pinctrl binding
Add device tree bindings for RTD1625.
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Tzuyi Chang <tychang@realtek.com>
Co-developed-by: Yu-Chun Lin <eleanor.lin@realtek.com>
Signed-off-by: Yu-Chun Lin <eleanor.lin@realtek.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
authored by
Tzuyi Chang
and committed by
Linus Walleij
f6ea7004
56624479
+260
+260
Documentation/devicetree/bindings/pinctrl/realtek,rtd1625-pinctrl.yaml
+260
Documentation/devicetree/bindings/pinctrl/realtek,rtd1625-pinctrl.yaml
···
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2025 Realtek Semiconductor Corporation
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/realtek,rtd1625-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Realtek DHC RTD1625 Pin Controller
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maintainers:
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- Tzuyi Chang <tychang@realtek.com>
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- Yu-Chun Lin <eleanor.lin@realtek.com>
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description:
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The Realtek DHC RTD1625 is a high-definition media processor SoC. The
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RTD1625 pin controller is used to control pin function, pull-up/down
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resistors, drive strength, slew rate, Schmitt trigger, power source
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(I/O output voltage), input threshold domain selection and a higher-VIL mode.
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properties:
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compatible:
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items:
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- enum:
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- realtek,rtd1625-iso-pinctrl
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- realtek,rtd1625-main2-pinctrl
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- realtek,rtd1625-isom-pinctrl
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- realtek,rtd1625-ve4-pinctrl
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reg:
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maxItems: 1
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patternProperties:
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'-pins$':
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type: object
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allOf:
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- $ref: pincfg-node.yaml#
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- $ref: pinmux-node.yaml#
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+
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properties:
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pins:
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items:
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enum: [gpio_0, gpio_1, gpio_2, gpio_3, gpio_4, gpio_5, gpio_6,
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gpio_7, gpio_8, gpio_9, gpio_10, gpio_11, gpio_12, gpio_13,
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gpio_14, gpio_15, gpio_16, gpio_17, gpio_18, gpio_19, gpio_20,
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gpio_21, gpio_22, gpio_23, gpio_24, gpio_25, gpio_28, gpio_29,
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gpio_30, gpio_31, gpio_32, gpio_33, gpio_34, gpio_35, gpio_40,
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gpio_41, gpio_42, gpio_43, gpio_44, gpio_45, gpio_46, gpio_47,
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gpio_48, gpio_49, gpio_50, gpio_51, gpio_52, gpio_53, gpio_54,
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gpio_55, gpio_56, gpio_57, gpio_58, gpio_59, gpio_60, gpio_61,
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gpio_62, gpio_63, gpio_64, gpio_65, gpio_66, gpio_67, gpio_80,
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gpio_81, gpio_82, gpio_83, gpio_84, gpio_85, gpio_86, gpio_87,
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gpio_88, gpio_89, gpio_90, gpio_91, gpio_92, gpio_93, gpio_94,
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gpio_95, gpio_96, gpio_97, gpio_98, gpio_99, gpio_100,
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gpio_101, gpio_102, gpio_103, gpio_104, gpio_105, gpio_106,
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gpio_107, gpio_108, gpio_109, gpio_110, gpio_111, gpio_112,
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gpio_128, gpio_129, gpio_130, gpio_131, gpio_132, gpio_133,
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gpio_134, gpio_135, gpio_136, gpio_137, gpio_138, gpio_139,
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gpio_140, gpio_141, gpio_142, gpio_143, gpio_144, gpio_145,
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gpio_146, gpio_147, gpio_148, gpio_149, gpio_150, gpio_151,
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gpio_152, gpio_153, gpio_154, gpio_155, gpio_156, gpio_157,
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gpio_158, gpio_159, gpio_160, gpio_161, gpio_162, gpio_163,
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gpio_164, gpio_165, ai_i2s1_loc, ao_i2s1_loc, arm_trace_dbg_en,
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csi_vdsel, ejtag_acpu_loc, ejtag_aucpu0_loc, ejtag_aucpu1_loc,
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ejtag_pcpu_loc, ejtag_scpu_loc, ejtag_ve2_loc, emmc_clk,
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emmc_cmd, emmc_data_0, emmc_data_1, emmc_data_2, emmc_data_3,
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emmc_data_4, emmc_data_5, emmc_data_6, emmc_data_7,
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emmc_dd_sb, emmc_rst_n, etn_phy_loc, hif_clk, hif_data,
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hif_en, hif_rdy, hi_width, i2c6_loc, ir_rx_loc, rgmii_vdsel,
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sf_en, spdif_in_mode, spdif_loc, uart0_loc, usb_cc1, usb_cc2,
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ve4_uart_loc]
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function:
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enum: [gpio, ai_i2s0, ai_i2s2, ai_tdm0, ai_tdm1, ai_tdm2, ao_i2s0,
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ao_i2s2, ao_tdm0, ao_tdm1, ao_tdm2, csi0, csi1, csi_1v2, csi_1v8,
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csi_2v5, csi_3v3, dmic0, dmic1, dmic2, dptx_hpd, edptx_hdp, emmc,
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gspi0, gspi1, gspi2, hi_width_1bit, hi_width_disable, i2c0, i2c1,
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i2c3, i2c4, i2c5, i2c7, iso_tristate, pcie0, pcie1, pcm, pctrl,
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pwm4, pwm5, pwm6, rgmii, rgmii_1v2, rgmii_1v8, rgmii_2v5,
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rgmii_3v3, rmii, sd, sdio, sf_disable, sf_enable,
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spdif_in_coaxial, spdif_in_gpio, spdif_out, spi, ts0, ts1, uart1,
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uart2, uart3, uart4, uart5, uart6, uart7, uart8, uart9, uart10,
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usb_cc1, usb_cc2, vi0_dtv, vi1_dtv, vtc_ao_i2s, vtc_dmic,
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vtc_i2s, ai_i2s1_loc0, ai_i2s1_loc1, ao_i2s0_loc0, ao_i2s0_loc1,
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ao_i2s1_loc0, ao_i2s1_loc1, ao_tdm1_loc0, ao_tdm1_loc1,
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etn_led_loc0, etn_led_loc1, etn_phy_loc0, etn_phy_loc1,
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i2c6_loc0, i2c6_loc1, ir_rx_loc0, ir_rx_loc1, pwm0_loc0,
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pwm0_loc1, pwm0_loc2, pwm0_loc3, pwm1_loc0, pwm1_loc1, pwm2_loc0,
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pwm2_loc1, pwm3_loc0, pwm3_loc1, spdif_loc0, spdif_loc1,
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uart0_loc0, uart0_loc1, ve4_uart_loc0, ve4_uart_loc1,
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ve4_uart_loc2, acpu_ejtag_loc0, acpu_ejtag_loc1, acpu_ejtag_loc2,
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aucpu0_ejtag_loc0, aucpu0_ejtag_loc1, aucpu0_ejtag_loc2,
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aucpu1_ejtag_loc0, aucpu1_ejtag_loc1, aucpu1_ejtag_loc2,
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aupu0_ejtag_loc1, aupu1_ejtag_loc1, gpu_ejtag_loc0,
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pcpu_ejtag_loc0, pcpu_ejtag_loc1, pcpu_ejtag_loc2,
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scpu_ejtag_loc0, scpu_ejtag_loc1, scpu_ejtag_loc2,
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ve2_ejtag_loc0, ve2_ejtag_loc1, ve2_ejtag_loc2, pll_test_loc0,
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pll_test_loc1, dbg_out1, isom_dbg_out, arm_trace_debug_disable,
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arm_trace_debug_enable]
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drive-strength:
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enum: [4, 8]
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bias-pull-down: true
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bias-pull-up: true
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bias-disable: true
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input-schmitt-enable: true
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input-schmitt-disable: true
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input-voltage-microvolt:
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description: |
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Select the input receiver voltage domain for the pin.
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Valid arguments are:
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- 1800000: 1.8V input logic level
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- 3300000: 3.3V input logic level
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enum: [1800000, 3300000]
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drive-push-pull: true
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power-source:
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description: |
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Valid arguments are described as below:
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0: power supply of 1.8V
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1: power supply of 3.3V
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enum: [0, 1]
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slew-rate:
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description: |
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Valid arguments are described as below:
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1: ~1ns falling time
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10: ~10ns falling time
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20: ~20ns falling time
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30: ~30ns falling time
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enum: [1, 10, 20, 30]
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realtek,drive-strength-p:
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description: |
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Some of pins can be driven using the P-MOS and N-MOS transistor to
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achieve finer adjustments. The block-diagram representation is as
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follows:
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VDD
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|
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||--+
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+-----o|| P-MOS-FET
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| ||--+
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IN --+ +----- out
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| ||--+
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+------|| N-MOS-FET
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||--+
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|
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GND
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The driving strength of the P-MOS/N-MOS transistors impacts the
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waveform's rise/fall times. Greater driving strength results in
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shorter rise/fall times. Each P-MOS and N-MOS transistor offers
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8 configurable levels (0 to 7), with higher values indicating
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greater driving strength, contributing to achieving the desired
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speed.
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The realtek,drive-strength-p is used to control the driving strength
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of the P-MOS output.
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This value is not a simple count of transistors. Instead, it
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represents a weighted configuration. There is a base driving
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capability (even at value 0), and each bit adds a different weight to
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the total strength. The resulting current is non-linear and varies
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significantly based on the IO voltage (1.8V vs 3.3V) and the specific
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pad group.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 7
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+
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realtek,drive-strength-n:
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description: |
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Similar to the realtek,drive-strength-p, the realtek,drive-strength-n
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is used to control the driving strength of the N-MOS output.
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This property uses the same weighted configuration logic where values
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0-7 represent non-linear strength adjustments rather than a transistor
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count.
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Higher values indicate greater driving strength, resulting in shorter
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fall times.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 7
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+
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realtek,duty-cycle:
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description: |
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An integer describing the level to adjust the output pulse width, it
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provides a fixed nanosecond-level adjustment to the rising/falling
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edges of an existing signal. It is used for Signal Integrity tuning
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(adding/subtracting delay to fine-tune the high/low duration), rather
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than generating a specific PWM frequency.
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Valid arguments are described as below:
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0: 0ns
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2: + 0.25ns
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3: + 0.5ns
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4: -0.25ns
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5: -0.5ns
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 2, 3, 4, 5]
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+
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realtek,high-vil-microvolt:
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description: |
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The threshold value for the input receiver's LOW recognition (VIL).
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This property is used to address specific HDMI I2C compatibility
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issues where some sinks (TVs) have weak pull-down capabilities and
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fail to pull the bus voltage below the standard VIL threshold
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(~0.7V).
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Setting this property to 1100000 (1.1V) enables a specialized input
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receiver mode that raises the effective VIL threshold to improve
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detection.
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enum: [1100000]
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required:
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- pins
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additionalProperties: false
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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pinctrl@4e000 {
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compatible = "realtek,rtd1625-iso-pinctrl";
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reg = <0x4e000 0x130>;
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emmc-hs200-pins {
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pins = "emmc_clk",
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"emmc_cmd",
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"emmc_data_0",
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"emmc_data_1",
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"emmc_data_2",
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"emmc_data_3",
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"emmc_data_4",
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"emmc_data_5",
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"emmc_data_6",
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"emmc_data_7";
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function = "emmc";
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realtek,drive-strength-p = <2>;
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realtek,drive-strength-n = <2>;
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};
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i2c-0-pins {
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pins = "gpio_12",
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"gpio_13";
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function = "i2c0";
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drive-strength = <4>;
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};
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};