tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

dt-bindings: net: add bindings for NETC blocks control

Add bindings for NXP NETC blocks control. Usually, NETC has 2 blocks of
64KB registers, integrated endpoint register block (IERB) and privileged
register block (PRB). IERB is used for pre-boot initialization for all
NETC devices, such as ENETC, Timer, EMDIO and so on. And PRB controls
global reset and global error handling for NETC. Moreover, for the i.MX
platform, there is also a NETCMIX block for link configuration, such as
MII protocol, PCS protocol, etc.

Signed-off-by: Wei Fang <wei.fang@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Wei Fang and committed by
David S. Miller f70384e5 db2fb74c

+104
+104
Documentation/devicetree/bindings/net/nxp,netc-blk-ctrl.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/net/nxp,netc-blk-ctrl.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: NETC Blocks Control 8 + 9 + description: 10 + Usually, NETC has 2 blocks of 64KB registers, integrated endpoint register 11 + block (IERB) and privileged register block (PRB). IERB is used for pre-boot 12 + initialization for all NETC devices, such as ENETC, Timer, EMIDO and so on. 13 + And PRB controls global reset and global error handling for NETC. Moreover, 14 + for the i.MX platform, there is also a NETCMIX block for link configuration, 15 + such as MII protocol, PCS protocol, etc. 16 + 17 + maintainers: 18 + - Wei Fang <wei.fang@nxp.com> 19 + - Clark Wang <xiaoning.wang@nxp.com> 20 + 21 + properties: 22 + compatible: 23 + enum: 24 + - nxp,imx95-netc-blk-ctrl 25 + 26 + reg: 27 + maxItems: 3 28 + 29 + reg-names: 30 + items: 31 + - const: ierb 32 + - const: prb 33 + - const: netcmix 34 + 35 + "#address-cells": 36 + const: 2 37 + 38 + "#size-cells": 39 + const: 2 40 + 41 + ranges: true 42 + 43 + clocks: 44 + maxItems: 1 45 + 46 + clock-names: 47 + items: 48 + - const: ipg 49 + 50 + power-domains: 51 + maxItems: 1 52 + 53 + patternProperties: 54 + "^pcie@[0-9a-f]+$": 55 + $ref: /schemas/pci/host-generic-pci.yaml# 56 + 57 + required: 58 + - compatible 59 + - reg 60 + - reg-names 61 + - "#address-cells" 62 + - "#size-cells" 63 + - ranges 64 + 65 + additionalProperties: false 66 + 67 + examples: 68 + - | 69 + bus { 70 + #address-cells = <2>; 71 + #size-cells = <2>; 72 + 73 + system-controller@4cde0000 { 74 + compatible = "nxp,imx95-netc-blk-ctrl"; 75 + reg = <0x0 0x4cde0000 0x0 0x10000>, 76 + <0x0 0x4cdf0000 0x0 0x10000>, 77 + <0x0 0x4c81000c 0x0 0x18>; 78 + reg-names = "ierb", "prb", "netcmix"; 79 + #address-cells = <2>; 80 + #size-cells = <2>; 81 + ranges; 82 + clocks = <&scmi_clk 98>; 83 + clock-names = "ipg"; 84 + power-domains = <&scmi_devpd 18>; 85 + 86 + pcie@4cb00000 { 87 + compatible = "pci-host-ecam-generic"; 88 + reg = <0x0 0x4cb00000 0x0 0x100000>; 89 + #address-cells = <3>; 90 + #size-cells = <2>; 91 + device_type = "pci"; 92 + bus-range = <0x1 0x1>; 93 + ranges = <0x82000000 0x0 0x4cce0000 0x0 0x4cce0000 0x0 0x20000 94 + 0xc2000000 0x0 0x4cd10000 0x0 0x4cd10000 0x0 0x10000>; 95 + 96 + mdio@0,0 { 97 + compatible = "pci1131,ee00"; 98 + reg = <0x010000 0 0 0 0>; 99 + #address-cells = <1>; 100 + #size-cells = <0>; 101 + }; 102 + }; 103 + }; 104 + };