tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'riscv-for-linus-5.11-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt:
"A handful of fixes for this week:

- A fix to avoid evalating the VA twice in virt_addr_valid, which
fixes some WARNs under DEBUG_VIRTUAL.

- Two fixes related to STRICT_KERNEL_RWX: one that fixes some
permissions when strict is disabled, and one to fix some alignment
issues when strict is enabled.

- A fix to disallow the selection of MAXPHYSMEM_2GB on RV32, which
isn't valid any more but may still show up in some oldconfigs.

We still have the HiFive Unleashed ethernet phy reset regression, so
there will likely be something coming next week"

* tag 'riscv-for-linus-5.11-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
RISC-V: Define MAXPHYSMEM_1GB only for RV32
riscv: Align on L1_CACHE_BYTES when STRICT_KERNEL_RWX
RISC-V: Fix .init section permission update
riscv: virt_addr_valid must check the address belongs to linear mapping

Linus Torvalds f7455e5d f06279ea

+12 -5
+2
arch/riscv/Kconfig
··· 252 252 default MAXPHYSMEM_128GB if 64BIT && CMODEL_MEDANY 253 253 254 254 config MAXPHYSMEM_1GB 255 + depends on 32BIT 255 256 bool "1GiB" 256 257 config MAXPHYSMEM_2GB 258 + depends on 64BIT && CMODEL_MEDLOW 257 259 bool "2GiB" 258 260 config MAXPHYSMEM_128GB 259 261 depends on 64BIT && CMODEL_MEDANY
+4 -1
arch/riscv/include/asm/page.h
··· 135 135 136 136 #endif /* __ASSEMBLY__ */ 137 137 138 - #define virt_addr_valid(vaddr) (pfn_valid(virt_to_pfn(vaddr))) 138 + #define virt_addr_valid(vaddr) ({ \ 139 + unsigned long _addr = (unsigned long)vaddr; \ 140 + (unsigned long)(_addr) >= PAGE_OFFSET && pfn_valid(virt_to_pfn(_addr)); \ 141 + }) 139 142 140 143 #define VM_DATA_DEFAULT_FLAGS VM_DATA_FLAGS_NON_EXEC 141 144
+3 -3
arch/riscv/include/asm/set_memory.h
··· 32 32 33 33 #endif /* __ASSEMBLY__ */ 34 34 35 - #ifdef CONFIG_ARCH_HAS_STRICT_KERNEL_RWX 35 + #ifdef CONFIG_STRICT_KERNEL_RWX 36 36 #ifdef CONFIG_64BIT 37 37 #define SECTION_ALIGN (1 << 21) 38 38 #else 39 39 #define SECTION_ALIGN (1 << 22) 40 40 #endif 41 - #else /* !CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */ 41 + #else /* !CONFIG_STRICT_KERNEL_RWX */ 42 42 #define SECTION_ALIGN L1_CACHE_BYTES 43 - #endif /* CONFIG_ARCH_HAS_STRICT_KERNEL_RWX */ 43 + #endif /* CONFIG_STRICT_KERNEL_RWX */ 44 44 45 45 #endif /* _ASM_RISCV_SET_MEMORY_H */
+3 -1
arch/riscv/kernel/setup.c
··· 293 293 unsigned long init_begin = (unsigned long)__init_begin; 294 294 unsigned long init_end = (unsigned long)__init_end; 295 295 296 - set_memory_rw_nx(init_begin, (init_end - init_begin) >> PAGE_SHIFT); 296 + if (IS_ENABLED(CONFIG_STRICT_KERNEL_RWX)) 297 + set_memory_rw_nx(init_begin, (init_end - init_begin) >> PAGE_SHIFT); 298 + 297 299 free_initmem_default(POISON_FREE_INITMEM); 298 300 }