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drm/i915/dp_mst: Enable fractional link bpps on MST if the bpp is forced

Enable using a fractional (compressed) link bpp on MST links, if this is
supported and the link bpp is forced. Fractional link bpps will be
enabled by default as a follow-up change after testing this
functionality within a set of commonly used MST monitors and docks/hubs
which support it.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/20250509180340.554867-13-imre.deak@intel.com

+8 -2
+5 -1
drivers/gpu/drm/i915/display/intel_dp.c
··· 2103 2103 /* 2104 2104 * Note: for pre-13 display you still need to check the validity of each step. 2105 2105 */ 2106 - static int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector) 2106 + int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector) 2107 2107 { 2108 2108 struct intel_display *display = to_intel_display(connector); 2109 2109 u8 incr = drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd); 2110 2110 2111 2111 if (DISPLAY_VER(display) < 14 || !incr) 2112 + return fxp_q4_from_int(1); 2113 + 2114 + if (connector->mst.dp && 2115 + !connector->link.force_bpp_x16 && !connector->mst.dp->force_dsc_fractional_bpp_en) 2112 2116 return fxp_q4_from_int(1); 2113 2117 2114 2118 /* fxp q4 */
+2
drivers/gpu/drm/i915/display/intel_dp.h
··· 212 212 int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state, 213 213 const struct drm_connector_state *conn_state); 214 214 215 + int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector); 216 + 215 217 #endif /* __INTEL_DP_H__ */
+1 -1
drivers/gpu/drm/i915/display/intel_dp_mst.c
··· 499 499 "DSC Sink supported compressed min bpp " FXP_Q4_FMT " compressed max bpp " FXP_Q4_FMT "\n", 500 500 FXP_Q4_ARGS(min_compressed_bpp_x16), FXP_Q4_ARGS(max_compressed_bpp_x16)); 501 501 502 - bpp_step_x16 = fxp_q4_from_int(1); 502 + bpp_step_x16 = intel_dp_dsc_bpp_step_x16(connector); 503 503 504 504 max_compressed_bpp_x16 = min(max_compressed_bpp_x16, fxp_q4_from_int(crtc_state->pipe_bpp) - bpp_step_x16); 505 505