Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'thermal-v5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux
Pull thermal updates from Daniel Lezcano:
- Add rk3568 sensor support (Finley Xiao)
- Add missing MODULE_DEVICE_TABLE for the Spreadtrum sensor (Chunyan
Zhang)
- Export additionnal attributes for the int340x thermal processor
(Srinivas Pandruvada)
- Add SC7280 compatible for the tsens driver (Rajeshwari Ravindra
Kamble)
- Fix kernel documentation for thermal_zone_device_unregister() and use
devm_platform_get_and_ioremap_resource() (Yang Yingliang)
- Fix coefficient calculations for the rcar_gen3 sensor driver (Niklas
Söderlund)
- Fix shadowing variable rcar_gen3_ths_tj_1 (Geert Uytterhoeven)
- Add missing of_node_put() for the iMX and Spreadtrum sensors
(Krzysztof Kozlowski)
- Add tegra3 thermal sensor DT bindings (Dmitry Osipenko)
- Stop the thermal zone monitoring when unregistering it to prevent a
temperature update without the 'get_temp' callback (Dmitry Osipenko)
- Add rk3568 DT bindings, convert bindings to yaml schemas and add the
corresponding compatible in the Rockchip sensor (Ezequiel Garcia)
- Add the sc8180x compatible for the Qualcomm tsensor (Bjorn Andersson)
- Use the find_first_zero_bit() function instead of custom code (Andy
Shevchenko)
- Fix the kernel doc for the device cooling device (Yang Li)
- Reorg the processor thermal int340x to set the scene for the PCI mmio
driver (Srinivas Pandruvada)
- Add PCI MMIO driver for the int340x processor thermal driver
(Srinivas Pandruvada)
- Add hwmon sensors for the mediatek sensor (Frank Wunderlich)
- Fix warning for return value reported by Smatch for the int340x
thermal processor (Srinivas Pandruvada)
- Fix wrong register access and decoding for the int340x thermal
processor (Srinivas Pandruvada)
* tag 'thermal-v5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux: (23 commits)
thermal/drivers/int340x/processor_thermal: Fix tcc setting
thermal/drivers/int340x/processor_thermal: Fix warning for return value
thermal/drivers/mediatek: Add sensors-support
thermal/drivers/int340x/processor_thermal: Add PCI MMIO based thermal driver
thermal/drivers/int340x/processor_thermal: Split enumeration and processing part
thermal: devfreq_cooling: Fix kernel-doc
thermal/drivers/intel/intel_soc_dts_iosf: Switch to use find_first_zero_bit()
dt-bindings: thermal: tsens: Add sc8180x compatible
dt-bindings: rockchip-thermal: Support the RK3568 SoC compatible
dt-bindings: thermal: convert rockchip-thermal to json-schema
thermal/core/thermal_of: Stop zone device before unregistering it
dt-bindings: thermal: Add binding for Tegra30 thermal sensor
thermal/drivers/sprd: Add missing of_node_put for loop iteration
thermal/drivers/imx_sc: Add missing of_node_put for loop iteration
thermal/drivers/rcar_gen3_thermal: Do not shadow rcar_gen3_ths_tj_1
thermal/drivers/rcar_gen3_thermal: Fix coefficient calculations
thermal/drivers/st: Use devm_platform_get_and_ioremap_resource()
thermal/core: Correct function name thermal_zone_device_unregister()
dt-bindings: thermal: tsens: Add compatible string to TSENS binding for SC7280
thermal/drivers/int340x: processor_thermal: Export additional attributes
...
+1066
-384
+73
Documentation/devicetree/bindings/thermal/nvidia,tegra30-tsensor.yaml
+73
Documentation/devicetree/bindings/thermal/nvidia,tegra30-tsensor.yaml
···
1
+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/thermal/nvidia,tegra30-tsensor.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: NVIDIA Tegra30 Thermal Sensor
8
+
9
+
maintainers:
10
+
- Dmitry Osipenko <digetx@gmail.com>
11
+
- Jon Hunter <jonathanh@nvidia.com>
12
+
- Thierry Reding <thierry.reding@gmail.com>
13
+
14
+
description: |
15
+
TSENSOR provides thermal and voltage sensors which monitor temperature
16
+
and voltage of the chip. Sensors are placed across the die to gauge the
17
+
temperature of the whole chip. The TSENSOR module:
18
+
19
+
Generates an interrupt to SW to lower temperature via DVFS on reaching
20
+
a certain thermal/voltage threshold.
21
+
22
+
Generates a signal to the CAR to reduce CPU frequency by half on reaching
23
+
a certain thermal/voltage threshold.
24
+
25
+
Generates a signal to the PMC when the temperature reaches dangerously high
26
+
levels to reset the chip and sets a flag in the PMC.
27
+
28
+
TSENSOR has two channels which monitor two different spots of the SoC.
29
+
30
+
properties:
31
+
compatible:
32
+
const: nvidia,tegra30-tsensor
33
+
34
+
reg:
35
+
maxItems: 1
36
+
37
+
clocks:
38
+
maxItems: 1
39
+
40
+
resets:
41
+
maxItems: 1
42
+
43
+
interrupts:
44
+
maxItems: 1
45
+
46
+
"#thermal-sensor-cells":
47
+
const: 1
48
+
49
+
assigned-clock-parents: true
50
+
assigned-clock-rates: true
51
+
assigned-clocks: true
52
+
53
+
required:
54
+
- compatible
55
+
- reg
56
+
- clocks
57
+
- resets
58
+
- interrupts
59
+
- "#thermal-sensor-cells"
60
+
61
+
additionalProperties: false
62
+
63
+
examples:
64
+
- |
65
+
thermal-sensor@70014000 {
66
+
compatible = "nvidia,tegra30-tsensor";
67
+
reg = <0x70014000 0x500>;
68
+
interrupts = <0 102 4>;
69
+
clocks = <&clk 100>;
70
+
resets = <&rst 100>;
71
+
72
+
#thermal-sensor-cells = <1>;
73
+
};
+2
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+2
Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
-85
Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
-85
Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
···
1
-
* Temperature Sensor ADC (TSADC) on rockchip SoCs
2
-
3
-
Required properties:
4
-
- compatible : should be "rockchip,<name>-tsadc"
5
-
"rockchip,px30-tsadc": found on PX30 SoCs
6
-
"rockchip,rv1108-tsadc": found on RV1108 SoCs
7
-
"rockchip,rk3228-tsadc": found on RK3228 SoCs
8
-
"rockchip,rk3288-tsadc": found on RK3288 SoCs
9
-
"rockchip,rk3328-tsadc": found on RK3328 SoCs
10
-
"rockchip,rk3368-tsadc": found on RK3368 SoCs
11
-
"rockchip,rk3399-tsadc": found on RK3399 SoCs
12
-
- reg : physical base address of the controller and length of memory mapped
13
-
region.
14
-
- interrupts : The interrupt number to the cpu. The interrupt specifier format
15
-
depends on the interrupt controller.
16
-
- clocks : Must contain an entry for each entry in clock-names.
17
-
- clock-names : Shall be "tsadc" for the converter-clock, and "apb_pclk" for
18
-
the peripheral clock.
19
-
- resets : Must contain an entry for each entry in reset-names.
20
-
See ../reset/reset.txt for details.
21
-
- reset-names : Must include the name "tsadc-apb".
22
-
- pinctrl-names : The pin control state names;
23
-
- pinctrl-0 : The "init" pinctrl state, it will be set before device probe.
24
-
- pinctrl-1 : The "default" pinctrl state, it will be set after reset the
25
-
TSADC controller.
26
-
- pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend.
27
-
- #thermal-sensor-cells : Should be 1. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description.
28
-
29
-
Optional properties:
30
-
- rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value.
31
-
- rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO.
32
-
- rockchip,hw-tshut-polarity : The hardware-controlled active polarity 0:LOW
33
-
1:HIGH.
34
-
- rockchip,grf : The phandle of the syscon node for the general register file.
35
-
36
-
Exiample:
37
-
tsadc: tsadc@ff280000 {
38
-
compatible = "rockchip,rk3288-tsadc";
39
-
reg = <0xff280000 0x100>;
40
-
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
41
-
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
42
-
clock-names = "tsadc", "apb_pclk";
43
-
resets = <&cru SRST_TSADC>;
44
-
reset-names = "tsadc-apb";
45
-
pinctrl-names = "init", "default", "sleep";
46
-
pinctrl-0 = <&otp_gpio>;
47
-
pinctrl-1 = <&otp_out>;
48
-
pinctrl-2 = <&otp_gpio>;
49
-
#thermal-sensor-cells = <1>;
50
-
rockchip,hw-tshut-temp = <95000>;
51
-
rockchip,hw-tshut-mode = <0>;
52
-
rockchip,hw-tshut-polarity = <0>;
53
-
};
54
-
55
-
Example: referring to thermal sensors:
56
-
thermal-zones {
57
-
cpu_thermal: cpu_thermal {
58
-
polling-delay-passive = <1000>; /* milliseconds */
59
-
polling-delay = <5000>; /* milliseconds */
60
-
61
-
/* sensor ID */
62
-
thermal-sensors = <&tsadc 1>;
63
-
64
-
trips {
65
-
cpu_alert0: cpu_alert {
66
-
temperature = <70000>; /* millicelsius */
67
-
hysteresis = <2000>; /* millicelsius */
68
-
type = "passive";
69
-
};
70
-
cpu_crit: cpu_crit {
71
-
temperature = <90000>; /* millicelsius */
72
-
hysteresis = <2000>; /* millicelsius */
73
-
type = "critical";
74
-
};
75
-
};
76
-
77
-
cooling-maps {
78
-
map0 {
79
-
trip = <&cpu_alert0>;
80
-
cooling-device =
81
-
<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
82
-
};
83
-
};
84
-
};
85
-
};
+96
Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
+96
Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml
···
1
+
# SPDX-License-Identifier: GPL-2.0-only
2
+
%YAML 1.2
3
+
---
4
+
$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml#
5
+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6
+
7
+
title: Temperature Sensor ADC (TSADC) on Rockchip SoCs
8
+
9
+
maintainers:
10
+
- Heiko Stuebner <heiko@sntech.de>
11
+
12
+
properties:
13
+
compatible:
14
+
enum:
15
+
- rockchip,px30-tsadc # PX30 SoCs
16
+
- rockchip,rv1108-tsadc # RV1108 SoCs
17
+
- rockchip,rk3228-tsadc # RK3228 SoCs
18
+
- rockchip,rk3288-tsadc # RK3288 SoCs
19
+
- rockchip,rk3328-tsadc # RK3328 SoCs
20
+
- rockchip,rk3368-tsadc # RK3368 SoCs
21
+
- rockchip,rk3399-tsadc # RK3399 SoCs
22
+
- rockchip,rk3568-tsadc # RK3568 SoCs
23
+
24
+
reg:
25
+
maxItems: 1
26
+
27
+
interrupts:
28
+
maxItems: 1
29
+
30
+
clocks:
31
+
minItems: 2
32
+
maxItems: 2
33
+
34
+
clock-names:
35
+
items:
36
+
- const: tsadc
37
+
- const: apb_pclk
38
+
39
+
resets:
40
+
maxItems: 1
41
+
42
+
reset-names:
43
+
items:
44
+
- const: tsadc-apb
45
+
46
+
"#thermal-sensor-cells":
47
+
const: 1
48
+
49
+
rockchip,grf:
50
+
description: The phandle of the syscon node for the general register file.
51
+
$ref: /schemas/types.yaml#/definitions/phandle
52
+
53
+
rockchip,hw-tshut-temp:
54
+
description: The hardware-controlled shutdown temperature value.
55
+
$ref: /schemas/types.yaml#/definitions/uint32
56
+
57
+
rockchip,hw-tshut-mode:
58
+
description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.
59
+
$ref: /schemas/types.yaml#/definitions/uint32
60
+
enum: [0, 1]
61
+
62
+
rockchip,hw-tshut-polarity:
63
+
description: The hardware-controlled active polarity 0:LOW 1:HIGH.
64
+
$ref: /schemas/types.yaml#/definitions/uint32
65
+
enum: [0, 1]
66
+
67
+
required:
68
+
- compatible
69
+
- reg
70
+
- interrupts
71
+
- clocks
72
+
- clock-names
73
+
- resets
74
+
- reset-names
75
+
- "#thermal-sensor-cells"
76
+
77
+
additionalProperties: false
78
+
79
+
examples:
80
+
- |
81
+
#include <dt-bindings/interrupt-controller/arm-gic.h>
82
+
#include <dt-bindings/clock/rk3288-cru.h>
83
+
84
+
tsadc: tsadc@ff280000 {
85
+
compatible = "rockchip,rk3288-tsadc";
86
+
reg = <0xff280000 0x100>;
87
+
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
88
+
clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
89
+
clock-names = "tsadc", "apb_pclk";
90
+
resets = <&cru SRST_TSADC>;
91
+
reset-names = "tsadc-apb";
92
+
#thermal-sensor-cells = <1>;
93
+
rockchip,hw-tshut-temp = <95000>;
94
+
rockchip,hw-tshut-mode = <0>;
95
+
rockchip,hw-tshut-polarity = <0>;
96
+
};
+1
-1
drivers/thermal/devfreq_cooling.c
+1
-1
drivers/thermal/devfreq_cooling.c
···
458
458
EXPORT_SYMBOL_GPL(devfreq_cooling_register);
459
459
460
460
/**
461
-
* devfreq_cooling_em_register_power() - Register devfreq cooling device with
461
+
* devfreq_cooling_em_register() - Register devfreq cooling device with
462
462
* power information and automatically register Energy Model (EM)
463
463
* @df: Pointer to devfreq device.
464
464
* @dfc_power: Pointer to devfreq_cooling_power.
+3
drivers/thermal/imx_sc_thermal.c
+3
drivers/thermal/imx_sc_thermal.c
···
93
93
for_each_available_child_of_node(np, child) {
94
94
sensor = devm_kzalloc(&pdev->dev, sizeof(*sensor), GFP_KERNEL);
95
95
if (!sensor) {
96
+
of_node_put(child);
96
97
of_node_put(sensor_np);
97
98
return -ENOMEM;
98
99
}
···
105
104
dev_err(&pdev->dev,
106
105
"failed to get valid sensor resource id: %d\n",
107
106
ret);
107
+
of_node_put(child);
108
108
break;
109
109
}
110
110
···
116
114
if (IS_ERR(sensor->tzd)) {
117
115
dev_err(&pdev->dev, "failed to register thermal zone\n");
118
116
ret = PTR_ERR(sensor->tzd);
117
+
of_node_put(child);
119
118
break;
120
119
}
121
120
+3
drivers/thermal/intel/int340x_thermal/Makefile
+3
drivers/thermal/intel/int340x_thermal/Makefile
···
4
4
obj-$(CONFIG_INT340X_THERMAL) += int3402_thermal.o
5
5
obj-$(CONFIG_INT340X_THERMAL) += int3403_thermal.o
6
6
obj-$(CONFIG_INT340X_THERMAL) += processor_thermal_device.o
7
+
obj-$(CONFIG_INT340X_THERMAL) += int3401_thermal.o
8
+
obj-$(CONFIG_INT340X_THERMAL) += processor_thermal_device_pci_legacy.o
9
+
obj-$(CONFIG_INT340X_THERMAL) += processor_thermal_device_pci.o
7
10
obj-$(CONFIG_PROC_THERMAL_MMIO_RAPL) += processor_thermal_rapl.o
8
11
obj-$(CONFIG_INT340X_THERMAL) += processor_thermal_rfim.o
9
12
obj-$(CONFIG_INT340X_THERMAL) += processor_thermal_mbox.o
+82
drivers/thermal/intel/int340x_thermal/int3401_thermal.c
+82
drivers/thermal/intel/int340x_thermal/int3401_thermal.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-only
2
+
/*
3
+
* INT3401 processor thermal device
4
+
* Copyright (c) 2020, Intel Corporation.
5
+
*/
6
+
#include <linux/acpi.h>
7
+
#include <linux/kernel.h>
8
+
#include <linux/module.h>
9
+
#include <linux/platform_device.h>
10
+
#include <linux/thermal.h>
11
+
12
+
#include "int340x_thermal_zone.h"
13
+
#include "processor_thermal_device.h"
14
+
15
+
static const struct acpi_device_id int3401_device_ids[] = {
16
+
{"INT3401", 0},
17
+
{"", 0},
18
+
};
19
+
MODULE_DEVICE_TABLE(acpi, int3401_device_ids);
20
+
21
+
static int int3401_add(struct platform_device *pdev)
22
+
{
23
+
struct proc_thermal_device *proc_priv;
24
+
int ret;
25
+
26
+
proc_priv = devm_kzalloc(&pdev->dev, sizeof(*proc_priv), GFP_KERNEL);
27
+
if (!proc_priv)
28
+
return -ENOMEM;
29
+
30
+
ret = proc_thermal_add(&pdev->dev, proc_priv);
31
+
if (ret)
32
+
return ret;
33
+
34
+
platform_set_drvdata(pdev, proc_priv);
35
+
36
+
return ret;
37
+
}
38
+
39
+
static int int3401_remove(struct platform_device *pdev)
40
+
{
41
+
proc_thermal_remove(platform_get_drvdata(pdev));
42
+
43
+
return 0;
44
+
}
45
+
46
+
#ifdef CONFIG_PM_SLEEP
47
+
static int int3401_thermal_resume(struct device *dev)
48
+
{
49
+
return proc_thermal_resume(dev);
50
+
}
51
+
#else
52
+
#define int3401_thermal_resume NULL
53
+
#endif
54
+
55
+
static SIMPLE_DEV_PM_OPS(int3401_proc_thermal_pm, NULL, int3401_thermal_resume);
56
+
57
+
static struct platform_driver int3401_driver = {
58
+
.probe = int3401_add,
59
+
.remove = int3401_remove,
60
+
.driver = {
61
+
.name = "int3401 thermal",
62
+
.acpi_match_table = int3401_device_ids,
63
+
.pm = &int3401_proc_thermal_pm,
64
+
},
65
+
};
66
+
67
+
static int __init proc_thermal_init(void)
68
+
{
69
+
return platform_driver_register(&int3401_driver);
70
+
}
71
+
72
+
static void __exit proc_thermal_exit(void)
73
+
{
74
+
platform_driver_unregister(&int3401_driver);
75
+
}
76
+
77
+
module_init(proc_thermal_init);
78
+
module_exit(proc_thermal_exit);
79
+
80
+
MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
81
+
MODULE_DESCRIPTION("Processor Thermal Reporting Device Driver");
82
+
MODULE_LICENSE("GPL v2");
+43
-266
drivers/thermal/intel/int340x_thermal/processor_thermal_device.c
+43
-266
drivers/thermal/intel/int340x_thermal/processor_thermal_device.c
···
3
3
* processor_thermal_device.c
4
4
* Copyright (c) 2014, Intel Corporation.
5
5
*/
6
+
#include <linux/acpi.h>
6
7
#include <linux/kernel.h>
7
8
#include <linux/module.h>
8
-
#include <linux/init.h>
9
9
#include <linux/pci.h>
10
-
#include <linux/interrupt.h>
11
-
#include <linux/platform_device.h>
12
-
#include <linux/acpi.h>
13
10
#include <linux/thermal.h>
14
-
#include <linux/cpuhotplug.h>
15
11
#include "int340x_thermal_zone.h"
16
12
#include "processor_thermal_device.h"
17
13
#include "../intel_soc_dts_iosf.h"
18
14
19
15
#define DRV_NAME "proc_thermal"
20
-
21
-
enum proc_thermal_emum_mode_type {
22
-
PROC_THERMAL_NONE,
23
-
PROC_THERMAL_PCI,
24
-
PROC_THERMAL_PLATFORM_DEV
25
-
};
26
-
27
-
/*
28
-
* We can have only one type of enumeration, PCI or Platform,
29
-
* not both. So we don't need instance specific data.
30
-
*/
31
-
static enum proc_thermal_emum_mode_type proc_thermal_emum_mode =
32
-
PROC_THERMAL_NONE;
33
16
34
17
#define POWER_LIMIT_SHOW(index, suffix) \
35
18
static ssize_t power_limit_##index##_##suffix##_show(struct device *dev, \
···
20
37
char *buf) \
21
38
{ \
22
39
struct proc_thermal_device *proc_dev = dev_get_drvdata(dev); \
23
-
\
24
-
if (proc_thermal_emum_mode == PROC_THERMAL_NONE) { \
25
-
dev_warn(dev, "Attempted to get power limit before device was initialized!\n"); \
26
-
return 0; \
27
-
} \
28
40
\
29
41
return sprintf(buf, "%lu\n",\
30
42
(unsigned long)proc_dev->power_limits[index].suffix * 1000); \
···
78
100
if (err)
79
101
return err;
80
102
81
-
val = (val >> 24) & 0xff;
103
+
val = (val >> 24) & 0x3f;
82
104
return sprintf(buf, "%d\n", (int)val);
83
105
}
84
106
85
-
static int tcc_offset_update(int tcc)
107
+
static int tcc_offset_update(unsigned int tcc)
86
108
{
87
109
u64 val;
88
110
int err;
89
111
90
-
if (!tcc)
112
+
if (tcc > 63)
91
113
return -EINVAL;
92
114
93
115
err = rdmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, &val);
94
116
if (err)
95
117
return err;
96
118
97
-
val &= ~GENMASK_ULL(31, 24);
98
-
val |= (tcc & 0xff) << 24;
119
+
if (val & BIT(31))
120
+
return -EPERM;
121
+
122
+
val &= ~GENMASK_ULL(29, 24);
123
+
val |= (tcc & 0x3f) << 24;
99
124
100
125
err = wrmsrl_safe(MSR_IA32_TEMPERATURE_TARGET, val);
101
126
if (err)
···
107
126
return 0;
108
127
}
109
128
110
-
static int tcc_offset_save;
129
+
static unsigned int tcc_offset_save;
111
130
112
131
static ssize_t tcc_offset_degree_celsius_store(struct device *dev,
113
132
struct device_attribute *attr, const char *buf,
114
133
size_t count)
115
134
{
135
+
unsigned int tcc;
116
136
u64 val;
117
-
int tcc, err;
137
+
int err;
118
138
119
139
err = rdmsrl_safe(MSR_PLATFORM_INFO, &val);
120
140
if (err)
···
124
142
if (!(val & BIT(30)))
125
143
return -EACCES;
126
144
127
-
if (kstrtoint(buf, 0, &tcc))
145
+
if (kstrtouint(buf, 0, &tcc))
128
146
return -EINVAL;
129
147
130
148
err = tcc_offset_update(tcc);
···
273
291
}
274
292
}
275
293
276
-
277
-
static int proc_thermal_add(struct device *dev,
278
-
struct proc_thermal_device **priv)
294
+
int proc_thermal_add(struct device *dev, struct proc_thermal_device *proc_priv)
279
295
{
280
-
struct proc_thermal_device *proc_priv;
281
296
struct acpi_device *adev;
282
297
acpi_status status;
283
298
unsigned long long tmp;
···
285
306
if (!adev)
286
307
return -ENODEV;
287
308
288
-
proc_priv = devm_kzalloc(dev, sizeof(*proc_priv), GFP_KERNEL);
289
-
if (!proc_priv)
290
-
return -ENOMEM;
291
-
292
309
proc_priv->dev = dev;
293
310
proc_priv->adev = adev;
294
-
*priv = proc_priv;
295
311
296
312
ret = proc_thermal_read_ppcc(proc_priv);
297
313
if (ret)
···
312
338
if (ret)
313
339
goto remove_zone;
314
340
341
+
ret = sysfs_create_file(&dev->kobj, &dev_attr_tcc_offset_degree_celsius.attr);
342
+
if (ret)
343
+
goto remove_notify;
344
+
345
+
ret = sysfs_create_group(&dev->kobj, &power_limit_attribute_group);
346
+
if (ret) {
347
+
sysfs_remove_file(&dev->kobj, &dev_attr_tcc_offset_degree_celsius.attr);
348
+
goto remove_notify;
349
+
}
350
+
315
351
return 0;
316
352
353
+
remove_notify:
354
+
acpi_remove_notify_handler(adev->handle,
355
+
ACPI_DEVICE_NOTIFY, proc_thermal_notify);
317
356
remove_zone:
318
357
int340x_thermal_zone_remove(proc_priv->int340x_zone);
319
358
320
359
return ret;
321
360
}
361
+
EXPORT_SYMBOL_GPL(proc_thermal_add);
322
362
323
-
static void proc_thermal_remove(struct proc_thermal_device *proc_priv)
363
+
void proc_thermal_remove(struct proc_thermal_device *proc_priv)
324
364
{
325
365
acpi_remove_notify_handler(proc_priv->adev->handle,
326
366
ACPI_DEVICE_NOTIFY, proc_thermal_notify);
···
343
355
sysfs_remove_group(&proc_priv->dev->kobj,
344
356
&power_limit_attribute_group);
345
357
}
358
+
EXPORT_SYMBOL_GPL(proc_thermal_remove);
346
359
347
-
static int int3401_add(struct platform_device *pdev)
360
+
int proc_thermal_resume(struct device *dev)
348
361
{
349
-
struct proc_thermal_device *proc_priv;
350
-
int ret;
362
+
struct proc_thermal_device *proc_dev;
351
363
352
-
if (proc_thermal_emum_mode == PROC_THERMAL_PCI) {
353
-
dev_err(&pdev->dev, "error: enumerated as PCI dev\n");
354
-
return -ENODEV;
355
-
}
364
+
proc_dev = dev_get_drvdata(dev);
365
+
proc_thermal_read_ppcc(proc_dev);
356
366
357
-
ret = proc_thermal_add(&pdev->dev, &proc_priv);
358
-
if (ret)
359
-
return ret;
360
-
361
-
platform_set_drvdata(pdev, proc_priv);
362
-
proc_thermal_emum_mode = PROC_THERMAL_PLATFORM_DEV;
363
-
364
-
dev_info(&pdev->dev, "Creating sysfs group for PROC_THERMAL_PLATFORM_DEV\n");
365
-
366
-
ret = sysfs_create_file(&pdev->dev.kobj, &dev_attr_tcc_offset_degree_celsius.attr);
367
-
if (ret)
368
-
return ret;
369
-
370
-
ret = sysfs_create_group(&pdev->dev.kobj, &power_limit_attribute_group);
371
-
if (ret)
372
-
sysfs_remove_file(&pdev->dev.kobj, &dev_attr_tcc_offset_degree_celsius.attr);
373
-
374
-
return ret;
375
-
}
376
-
377
-
static int int3401_remove(struct platform_device *pdev)
378
-
{
379
-
proc_thermal_remove(platform_get_drvdata(pdev));
367
+
tcc_offset_update(tcc_offset_save);
380
368
381
369
return 0;
382
370
}
383
-
384
-
static irqreturn_t proc_thermal_pci_msi_irq(int irq, void *devid)
385
-
{
386
-
struct proc_thermal_device *proc_priv;
387
-
struct pci_dev *pdev = devid;
388
-
389
-
proc_priv = pci_get_drvdata(pdev);
390
-
391
-
intel_soc_dts_iosf_interrupt_handler(proc_priv->soc_dts);
392
-
393
-
return IRQ_HANDLED;
394
-
}
371
+
EXPORT_SYMBOL_GPL(proc_thermal_resume);
395
372
396
373
#define MCHBAR 0
397
374
398
-
static int proc_thermal_set_mmio_base(struct pci_dev *pdev,
399
-
struct proc_thermal_device *proc_priv)
375
+
static int proc_thermal_set_mmio_base(struct pci_dev *pdev, struct proc_thermal_device *proc_priv)
400
376
{
401
377
int ret;
402
378
···
375
423
return 0;
376
424
}
377
425
378
-
static int proc_thermal_mmio_add(struct pci_dev *pdev,
379
-
struct proc_thermal_device *proc_priv,
380
-
kernel_ulong_t feature_mask)
426
+
int proc_thermal_mmio_add(struct pci_dev *pdev,
427
+
struct proc_thermal_device *proc_priv,
428
+
kernel_ulong_t feature_mask)
381
429
{
382
430
int ret;
383
431
···
423
471
424
472
return ret;
425
473
}
474
+
EXPORT_SYMBOL_GPL(proc_thermal_mmio_add);
426
475
427
-
static void proc_thermal_mmio_remove(struct pci_dev *pdev)
476
+
void proc_thermal_mmio_remove(struct pci_dev *pdev, struct proc_thermal_device *proc_priv)
428
477
{
429
-
struct proc_thermal_device *proc_priv = pci_get_drvdata(pdev);
430
-
431
478
if (proc_priv->mmio_feature_mask & PROC_THERMAL_FEATURE_RAPL)
432
479
proc_thermal_rapl_remove();
433
480
···
437
486
if (proc_priv->mmio_feature_mask & PROC_THERMAL_FEATURE_MBOX)
438
487
proc_thermal_mbox_remove(pdev);
439
488
}
440
-
441
-
static int proc_thermal_pci_probe(struct pci_dev *pdev,
442
-
const struct pci_device_id *id)
443
-
{
444
-
struct proc_thermal_device *proc_priv;
445
-
int ret;
446
-
447
-
if (proc_thermal_emum_mode == PROC_THERMAL_PLATFORM_DEV) {
448
-
dev_err(&pdev->dev, "error: enumerated as platform dev\n");
449
-
return -ENODEV;
450
-
}
451
-
452
-
ret = pcim_enable_device(pdev);
453
-
if (ret < 0) {
454
-
dev_err(&pdev->dev, "error: could not enable device\n");
455
-
return ret;
456
-
}
457
-
458
-
ret = proc_thermal_add(&pdev->dev, &proc_priv);
459
-
if (ret)
460
-
return ret;
461
-
462
-
pci_set_drvdata(pdev, proc_priv);
463
-
proc_thermal_emum_mode = PROC_THERMAL_PCI;
464
-
465
-
if (pdev->device == PCI_DEVICE_ID_INTEL_BSW_THERMAL) {
466
-
/*
467
-
* Enumerate additional DTS sensors available via IOSF.
468
-
* But we are not treating as a failure condition, if
469
-
* there are no aux DTSs enabled or fails. This driver
470
-
* already exposes sensors, which can be accessed via
471
-
* ACPI/MSR. So we don't want to fail for auxiliary DTSs.
472
-
*/
473
-
proc_priv->soc_dts = intel_soc_dts_iosf_init(
474
-
INTEL_SOC_DTS_INTERRUPT_MSI, 2, 0);
475
-
476
-
if (!IS_ERR(proc_priv->soc_dts) && pdev->irq) {
477
-
ret = pci_enable_msi(pdev);
478
-
if (!ret) {
479
-
ret = request_threaded_irq(pdev->irq, NULL,
480
-
proc_thermal_pci_msi_irq,
481
-
IRQF_ONESHOT, "proc_thermal",
482
-
pdev);
483
-
if (ret) {
484
-
intel_soc_dts_iosf_exit(
485
-
proc_priv->soc_dts);
486
-
pci_disable_msi(pdev);
487
-
proc_priv->soc_dts = NULL;
488
-
}
489
-
}
490
-
} else
491
-
dev_err(&pdev->dev, "No auxiliary DTSs enabled\n");
492
-
}
493
-
494
-
dev_info(&pdev->dev, "Creating sysfs group for PROC_THERMAL_PCI\n");
495
-
496
-
ret = sysfs_create_file(&pdev->dev.kobj, &dev_attr_tcc_offset_degree_celsius.attr);
497
-
if (ret)
498
-
return ret;
499
-
500
-
ret = sysfs_create_group(&pdev->dev.kobj, &power_limit_attribute_group);
501
-
if (ret) {
502
-
sysfs_remove_file(&pdev->dev.kobj, &dev_attr_tcc_offset_degree_celsius.attr);
503
-
return ret;
504
-
}
505
-
506
-
ret = proc_thermal_mmio_add(pdev, proc_priv, id->driver_data);
507
-
if (ret) {
508
-
proc_thermal_remove(proc_priv);
509
-
return ret;
510
-
}
511
-
512
-
return 0;
513
-
}
514
-
515
-
static void proc_thermal_pci_remove(struct pci_dev *pdev)
516
-
{
517
-
struct proc_thermal_device *proc_priv = pci_get_drvdata(pdev);
518
-
519
-
if (proc_priv->soc_dts) {
520
-
intel_soc_dts_iosf_exit(proc_priv->soc_dts);
521
-
if (pdev->irq) {
522
-
free_irq(pdev->irq, pdev);
523
-
pci_disable_msi(pdev);
524
-
}
525
-
}
526
-
527
-
proc_thermal_mmio_remove(pdev);
528
-
proc_thermal_remove(proc_priv);
529
-
}
530
-
531
-
#ifdef CONFIG_PM_SLEEP
532
-
static int proc_thermal_resume(struct device *dev)
533
-
{
534
-
struct proc_thermal_device *proc_dev;
535
-
536
-
proc_dev = dev_get_drvdata(dev);
537
-
proc_thermal_read_ppcc(proc_dev);
538
-
539
-
tcc_offset_update(tcc_offset_save);
540
-
541
-
return 0;
542
-
}
543
-
#else
544
-
#define proc_thermal_resume NULL
545
-
#endif
546
-
547
-
static SIMPLE_DEV_PM_OPS(proc_thermal_pm, NULL, proc_thermal_resume);
548
-
549
-
static const struct pci_device_id proc_thermal_pci_ids[] = {
550
-
{ PCI_DEVICE_DATA(INTEL, ADL_THERMAL, PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_FIVR | PROC_THERMAL_FEATURE_DVFS | PROC_THERMAL_FEATURE_MBOX) },
551
-
{ PCI_DEVICE_DATA(INTEL, BDW_THERMAL, 0) },
552
-
{ PCI_DEVICE_DATA(INTEL, BSW_THERMAL, 0) },
553
-
{ PCI_DEVICE_DATA(INTEL, BXT0_THERMAL, 0) },
554
-
{ PCI_DEVICE_DATA(INTEL, BXT1_THERMAL, 0) },
555
-
{ PCI_DEVICE_DATA(INTEL, BXTX_THERMAL, 0) },
556
-
{ PCI_DEVICE_DATA(INTEL, BXTP_THERMAL, 0) },
557
-
{ PCI_DEVICE_DATA(INTEL, CNL_THERMAL, 0) },
558
-
{ PCI_DEVICE_DATA(INTEL, CFL_THERMAL, 0) },
559
-
{ PCI_DEVICE_DATA(INTEL, GLK_THERMAL, 0) },
560
-
{ PCI_DEVICE_DATA(INTEL, HSB_THERMAL, 0) },
561
-
{ PCI_DEVICE_DATA(INTEL, ICL_THERMAL, PROC_THERMAL_FEATURE_RAPL) },
562
-
{ PCI_DEVICE_DATA(INTEL, JSL_THERMAL, 0) },
563
-
{ PCI_DEVICE_DATA(INTEL, SKL_THERMAL, PROC_THERMAL_FEATURE_RAPL) },
564
-
{ PCI_DEVICE_DATA(INTEL, TGL_THERMAL, PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_FIVR | PROC_THERMAL_FEATURE_MBOX) },
565
-
{ },
566
-
};
567
-
568
-
MODULE_DEVICE_TABLE(pci, proc_thermal_pci_ids);
569
-
570
-
static struct pci_driver proc_thermal_pci_driver = {
571
-
.name = DRV_NAME,
572
-
.probe = proc_thermal_pci_probe,
573
-
.remove = proc_thermal_pci_remove,
574
-
.id_table = proc_thermal_pci_ids,
575
-
.driver.pm = &proc_thermal_pm,
576
-
};
577
-
578
-
static const struct acpi_device_id int3401_device_ids[] = {
579
-
{"INT3401", 0},
580
-
{"", 0},
581
-
};
582
-
MODULE_DEVICE_TABLE(acpi, int3401_device_ids);
583
-
584
-
static struct platform_driver int3401_driver = {
585
-
.probe = int3401_add,
586
-
.remove = int3401_remove,
587
-
.driver = {
588
-
.name = "int3401 thermal",
589
-
.acpi_match_table = int3401_device_ids,
590
-
.pm = &proc_thermal_pm,
591
-
},
592
-
};
593
-
594
-
static int __init proc_thermal_init(void)
595
-
{
596
-
int ret;
597
-
598
-
ret = platform_driver_register(&int3401_driver);
599
-
if (ret)
600
-
return ret;
601
-
602
-
ret = pci_register_driver(&proc_thermal_pci_driver);
603
-
604
-
return ret;
605
-
}
606
-
607
-
static void __exit proc_thermal_exit(void)
608
-
{
609
-
platform_driver_unregister(&int3401_driver);
610
-
pci_unregister_driver(&proc_thermal_pci_driver);
611
-
}
612
-
613
-
module_init(proc_thermal_init);
614
-
module_exit(proc_thermal_exit);
489
+
EXPORT_SYMBOL_GPL(proc_thermal_mmio_remove);
615
490
616
491
MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
617
492
MODULE_DESCRIPTION("Processor Thermal Reporting Device Driver");
+9
drivers/thermal/intel/int340x_thermal/processor_thermal_device.h
+9
drivers/thermal/intel/int340x_thermal/processor_thermal_device.h
···
44
44
struct intel_soc_dts_sensors *soc_dts;
45
45
u32 mmio_feature_mask;
46
46
void __iomem *mmio_base;
47
+
void *priv_data;
47
48
};
48
49
49
50
struct rapl_mmio_regs {
···
80
79
int proc_thermal_mbox_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
81
80
void proc_thermal_mbox_remove(struct pci_dev *pdev);
82
81
82
+
int processor_thermal_send_mbox_cmd(struct pci_dev *pdev, u16 cmd_id, u32 cmd_data, u32 *cmd_resp);
83
+
int proc_thermal_add(struct device *dev, struct proc_thermal_device *priv);
84
+
void proc_thermal_remove(struct proc_thermal_device *proc_priv);
85
+
int proc_thermal_resume(struct device *dev);
86
+
int proc_thermal_mmio_add(struct pci_dev *pdev,
87
+
struct proc_thermal_device *proc_priv,
88
+
kernel_ulong_t feature_mask);
89
+
void proc_thermal_mmio_remove(struct pci_dev *pdev, struct proc_thermal_device *proc_priv);
83
90
#endif
+373
drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c
+373
drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-only
2
+
/*
3
+
* Processor thermal device for newer processors
4
+
* Copyright (c) 2020, Intel Corporation.
5
+
*/
6
+
7
+
#include <linux/acpi.h>
8
+
#include <linux/kernel.h>
9
+
#include <linux/module.h>
10
+
#include <linux/pci.h>
11
+
#include <linux/thermal.h>
12
+
13
+
#include "int340x_thermal_zone.h"
14
+
#include "processor_thermal_device.h"
15
+
16
+
#define DRV_NAME "proc_thermal_pci"
17
+
18
+
struct proc_thermal_pci {
19
+
struct pci_dev *pdev;
20
+
struct proc_thermal_device *proc_priv;
21
+
struct thermal_zone_device *tzone;
22
+
struct delayed_work work;
23
+
int stored_thres;
24
+
int no_legacy;
25
+
};
26
+
27
+
enum proc_thermal_mmio_type {
28
+
PROC_THERMAL_MMIO_TJMAX,
29
+
PROC_THERMAL_MMIO_PP0_TEMP,
30
+
PROC_THERMAL_MMIO_PP1_TEMP,
31
+
PROC_THERMAL_MMIO_PKG_TEMP,
32
+
PROC_THERMAL_MMIO_THRES_0,
33
+
PROC_THERMAL_MMIO_THRES_1,
34
+
PROC_THERMAL_MMIO_INT_ENABLE_0,
35
+
PROC_THERMAL_MMIO_INT_ENABLE_1,
36
+
PROC_THERMAL_MMIO_INT_STATUS_0,
37
+
PROC_THERMAL_MMIO_INT_STATUS_1,
38
+
PROC_THERMAL_MMIO_MAX
39
+
};
40
+
41
+
struct proc_thermal_mmio_info {
42
+
enum proc_thermal_mmio_type mmio_type;
43
+
u64 mmio_addr;
44
+
u64 shift;
45
+
u64 mask;
46
+
};
47
+
48
+
static struct proc_thermal_mmio_info proc_thermal_mmio_info[] = {
49
+
{ PROC_THERMAL_MMIO_TJMAX, 0x599c, 16, 0xff },
50
+
{ PROC_THERMAL_MMIO_PP0_TEMP, 0x597c, 0, 0xff },
51
+
{ PROC_THERMAL_MMIO_PP1_TEMP, 0x5980, 0, 0xff },
52
+
{ PROC_THERMAL_MMIO_PKG_TEMP, 0x5978, 0, 0xff },
53
+
{ PROC_THERMAL_MMIO_THRES_0, 0x5820, 8, 0x7F },
54
+
{ PROC_THERMAL_MMIO_THRES_1, 0x5820, 16, 0x7F },
55
+
{ PROC_THERMAL_MMIO_INT_ENABLE_0, 0x5820, 15, 0x01 },
56
+
{ PROC_THERMAL_MMIO_INT_ENABLE_1, 0x5820, 23, 0x01 },
57
+
{ PROC_THERMAL_MMIO_INT_STATUS_0, 0x7200, 6, 0x01 },
58
+
{ PROC_THERMAL_MMIO_INT_STATUS_1, 0x7200, 8, 0x01 },
59
+
};
60
+
61
+
#define B0D4_THERMAL_NOTIFY_DELAY 1000
62
+
static int notify_delay_ms = B0D4_THERMAL_NOTIFY_DELAY;
63
+
64
+
static void proc_thermal_mmio_read(struct proc_thermal_pci *pci_info,
65
+
enum proc_thermal_mmio_type type,
66
+
u32 *value)
67
+
{
68
+
*value = ioread32(((u8 __iomem *)pci_info->proc_priv->mmio_base +
69
+
proc_thermal_mmio_info[type].mmio_addr));
70
+
*value >>= proc_thermal_mmio_info[type].shift;
71
+
*value &= proc_thermal_mmio_info[type].mask;
72
+
}
73
+
74
+
static void proc_thermal_mmio_write(struct proc_thermal_pci *pci_info,
75
+
enum proc_thermal_mmio_type type,
76
+
u32 value)
77
+
{
78
+
u32 current_val;
79
+
u32 mask;
80
+
81
+
current_val = ioread32(((u8 __iomem *)pci_info->proc_priv->mmio_base +
82
+
proc_thermal_mmio_info[type].mmio_addr));
83
+
mask = proc_thermal_mmio_info[type].mask << proc_thermal_mmio_info[type].shift;
84
+
current_val &= ~mask;
85
+
86
+
value &= proc_thermal_mmio_info[type].mask;
87
+
value <<= proc_thermal_mmio_info[type].shift;
88
+
89
+
current_val |= value;
90
+
iowrite32(current_val, ((u8 __iomem *)pci_info->proc_priv->mmio_base +
91
+
proc_thermal_mmio_info[type].mmio_addr));
92
+
}
93
+
94
+
/*
95
+
* To avoid sending two many messages to user space, we have 1 second delay.
96
+
* On interrupt we are disabling interrupt and enabling after 1 second.
97
+
* This workload function is delayed by 1 second.
98
+
*/
99
+
static void proc_thermal_threshold_work_fn(struct work_struct *work)
100
+
{
101
+
struct delayed_work *delayed_work = to_delayed_work(work);
102
+
struct proc_thermal_pci *pci_info = container_of(delayed_work,
103
+
struct proc_thermal_pci, work);
104
+
struct thermal_zone_device *tzone = pci_info->tzone;
105
+
106
+
if (tzone)
107
+
thermal_zone_device_update(tzone, THERMAL_TRIP_VIOLATED);
108
+
109
+
/* Enable interrupt flag */
110
+
proc_thermal_mmio_write(pci_info, PROC_THERMAL_MMIO_INT_ENABLE_0, 1);
111
+
}
112
+
113
+
static void pkg_thermal_schedule_work(struct delayed_work *work)
114
+
{
115
+
unsigned long ms = msecs_to_jiffies(notify_delay_ms);
116
+
117
+
schedule_delayed_work(work, ms);
118
+
}
119
+
120
+
static irqreturn_t proc_thermal_irq_handler(int irq, void *devid)
121
+
{
122
+
struct proc_thermal_pci *pci_info = devid;
123
+
u32 status;
124
+
125
+
proc_thermal_mmio_read(pci_info, PROC_THERMAL_MMIO_INT_STATUS_0, &status);
126
+
127
+
/* Disable enable interrupt flag */
128
+
proc_thermal_mmio_write(pci_info, PROC_THERMAL_MMIO_INT_ENABLE_0, 0);
129
+
pci_write_config_byte(pci_info->pdev, 0xdc, 0x01);
130
+
131
+
pkg_thermal_schedule_work(&pci_info->work);
132
+
133
+
return IRQ_HANDLED;
134
+
}
135
+
136
+
static int sys_get_curr_temp(struct thermal_zone_device *tzd, int *temp)
137
+
{
138
+
struct proc_thermal_pci *pci_info = tzd->devdata;
139
+
u32 _temp;
140
+
141
+
proc_thermal_mmio_read(pci_info, PROC_THERMAL_MMIO_PKG_TEMP, &_temp);
142
+
*temp = (unsigned long)_temp * 1000;
143
+
144
+
return 0;
145
+
}
146
+
147
+
static int sys_get_trip_temp(struct thermal_zone_device *tzd,
148
+
int trip, int *temp)
149
+
{
150
+
struct proc_thermal_pci *pci_info = tzd->devdata;
151
+
u32 _temp;
152
+
153
+
proc_thermal_mmio_read(pci_info, PROC_THERMAL_MMIO_THRES_0, &_temp);
154
+
if (!_temp) {
155
+
*temp = THERMAL_TEMP_INVALID;
156
+
} else {
157
+
int tjmax;
158
+
159
+
proc_thermal_mmio_read(pci_info, PROC_THERMAL_MMIO_TJMAX, &tjmax);
160
+
_temp = tjmax - _temp;
161
+
*temp = (unsigned long)_temp * 1000;
162
+
}
163
+
164
+
return 0;
165
+
}
166
+
167
+
static int sys_get_trip_type(struct thermal_zone_device *tzd, int trip,
168
+
enum thermal_trip_type *type)
169
+
{
170
+
*type = THERMAL_TRIP_PASSIVE;
171
+
172
+
return 0;
173
+
}
174
+
175
+
static int sys_set_trip_temp(struct thermal_zone_device *tzd, int trip, int temp)
176
+
{
177
+
struct proc_thermal_pci *pci_info = tzd->devdata;
178
+
int tjmax, _temp;
179
+
180
+
if (temp <= 0) {
181
+
cancel_delayed_work_sync(&pci_info->work);
182
+
proc_thermal_mmio_write(pci_info, PROC_THERMAL_MMIO_INT_ENABLE_0, 0);
183
+
proc_thermal_mmio_write(pci_info, PROC_THERMAL_MMIO_THRES_0, 0);
184
+
thermal_zone_device_disable(tzd);
185
+
pci_info->stored_thres = 0;
186
+
return 0;
187
+
}
188
+
189
+
proc_thermal_mmio_read(pci_info, PROC_THERMAL_MMIO_TJMAX, &tjmax);
190
+
_temp = tjmax - (temp / 1000);
191
+
if (_temp < 0)
192
+
return -EINVAL;
193
+
194
+
proc_thermal_mmio_write(pci_info, PROC_THERMAL_MMIO_THRES_0, _temp);
195
+
proc_thermal_mmio_write(pci_info, PROC_THERMAL_MMIO_INT_ENABLE_0, 1);
196
+
197
+
thermal_zone_device_enable(tzd);
198
+
pci_info->stored_thres = temp;
199
+
200
+
return 0;
201
+
}
202
+
203
+
static struct thermal_zone_device_ops tzone_ops = {
204
+
.get_temp = sys_get_curr_temp,
205
+
.get_trip_temp = sys_get_trip_temp,
206
+
.get_trip_type = sys_get_trip_type,
207
+
.set_trip_temp = sys_set_trip_temp,
208
+
};
209
+
210
+
static struct thermal_zone_params tzone_params = {
211
+
.governor_name = "user_space",
212
+
.no_hwmon = true,
213
+
};
214
+
215
+
static int proc_thermal_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
216
+
{
217
+
struct proc_thermal_device *proc_priv;
218
+
struct proc_thermal_pci *pci_info;
219
+
int irq_flag = 0, irq, ret;
220
+
221
+
proc_priv = devm_kzalloc(&pdev->dev, sizeof(*proc_priv), GFP_KERNEL);
222
+
if (!proc_priv)
223
+
return -ENOMEM;
224
+
225
+
pci_info = devm_kzalloc(&pdev->dev, sizeof(*pci_info), GFP_KERNEL);
226
+
if (!pci_info)
227
+
return -ENOMEM;
228
+
229
+
pci_info->pdev = pdev;
230
+
ret = pcim_enable_device(pdev);
231
+
if (ret < 0) {
232
+
dev_err(&pdev->dev, "error: could not enable device\n");
233
+
return ret;
234
+
}
235
+
236
+
pci_set_master(pdev);
237
+
238
+
INIT_DELAYED_WORK(&pci_info->work, proc_thermal_threshold_work_fn);
239
+
240
+
ret = proc_thermal_add(&pdev->dev, proc_priv);
241
+
if (ret) {
242
+
dev_err(&pdev->dev, "error: proc_thermal_add, will continue\n");
243
+
pci_info->no_legacy = 1;
244
+
}
245
+
246
+
proc_priv->priv_data = pci_info;
247
+
pci_info->proc_priv = proc_priv;
248
+
pci_set_drvdata(pdev, proc_priv);
249
+
250
+
ret = proc_thermal_mmio_add(pdev, proc_priv, id->driver_data);
251
+
if (ret)
252
+
goto err_ret_thermal;
253
+
254
+
pci_info->tzone = thermal_zone_device_register("TCPU_PCI", 1, 1, pci_info,
255
+
&tzone_ops,
256
+
&tzone_params, 0, 0);
257
+
if (IS_ERR(pci_info->tzone)) {
258
+
ret = PTR_ERR(pci_info->tzone);
259
+
goto err_ret_mmio;
260
+
}
261
+
262
+
/* request and enable interrupt */
263
+
ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
264
+
if (ret < 0) {
265
+
dev_err(&pdev->dev, "Failed to allocate vectors!\n");
266
+
goto err_ret_tzone;
267
+
}
268
+
if (!pdev->msi_enabled && !pdev->msix_enabled)
269
+
irq_flag = IRQF_SHARED;
270
+
271
+
irq = pci_irq_vector(pdev, 0);
272
+
ret = devm_request_threaded_irq(&pdev->dev, irq,
273
+
proc_thermal_irq_handler, NULL,
274
+
irq_flag, KBUILD_MODNAME, pci_info);
275
+
if (ret) {
276
+
dev_err(&pdev->dev, "Request IRQ %d failed\n", pdev->irq);
277
+
goto err_free_vectors;
278
+
}
279
+
280
+
return 0;
281
+
282
+
err_free_vectors:
283
+
pci_free_irq_vectors(pdev);
284
+
err_ret_tzone:
285
+
thermal_zone_device_unregister(pci_info->tzone);
286
+
err_ret_mmio:
287
+
proc_thermal_mmio_remove(pdev, proc_priv);
288
+
err_ret_thermal:
289
+
if (!pci_info->no_legacy)
290
+
proc_thermal_remove(proc_priv);
291
+
pci_disable_device(pdev);
292
+
293
+
return ret;
294
+
}
295
+
296
+
static void proc_thermal_pci_remove(struct pci_dev *pdev)
297
+
{
298
+
struct proc_thermal_device *proc_priv = pci_get_drvdata(pdev);
299
+
struct proc_thermal_pci *pci_info = proc_priv->priv_data;
300
+
301
+
cancel_delayed_work_sync(&pci_info->work);
302
+
303
+
proc_thermal_mmio_write(pci_info, PROC_THERMAL_MMIO_THRES_0, 0);
304
+
proc_thermal_mmio_write(pci_info, PROC_THERMAL_MMIO_INT_ENABLE_0, 0);
305
+
306
+
devm_free_irq(&pdev->dev, pdev->irq, pci_info);
307
+
pci_free_irq_vectors(pdev);
308
+
309
+
thermal_zone_device_unregister(pci_info->tzone);
310
+
proc_thermal_mmio_remove(pdev, pci_info->proc_priv);
311
+
if (!pci_info->no_legacy)
312
+
proc_thermal_remove(proc_priv);
313
+
pci_disable_device(pdev);
314
+
}
315
+
316
+
#ifdef CONFIG_PM_SLEEP
317
+
static int proc_thermal_pci_resume(struct device *dev)
318
+
{
319
+
struct pci_dev *pdev = to_pci_dev(dev);
320
+
struct proc_thermal_device *proc_priv;
321
+
struct proc_thermal_pci *pci_info;
322
+
323
+
proc_priv = pci_get_drvdata(pdev);
324
+
pci_info = proc_priv->priv_data;
325
+
326
+
if (pci_info->stored_thres) {
327
+
proc_thermal_mmio_write(pci_info, PROC_THERMAL_MMIO_THRES_0,
328
+
pci_info->stored_thres / 1000);
329
+
proc_thermal_mmio_write(pci_info, PROC_THERMAL_MMIO_INT_ENABLE_0, 1);
330
+
}
331
+
332
+
if (!pci_info->no_legacy)
333
+
return proc_thermal_resume(dev);
334
+
335
+
return 0;
336
+
}
337
+
#else
338
+
#define proc_thermal_pci_resume NULL
339
+
#endif
340
+
341
+
static SIMPLE_DEV_PM_OPS(proc_thermal_pci_pm, NULL, proc_thermal_pci_resume);
342
+
343
+
static const struct pci_device_id proc_thermal_pci_ids[] = {
344
+
{ PCI_DEVICE_DATA(INTEL, ADL_THERMAL, PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_FIVR | PROC_THERMAL_FEATURE_DVFS | PROC_THERMAL_FEATURE_MBOX) },
345
+
{ },
346
+
};
347
+
348
+
MODULE_DEVICE_TABLE(pci, proc_thermal_pci_ids);
349
+
350
+
static struct pci_driver proc_thermal_pci_driver = {
351
+
.name = DRV_NAME,
352
+
.probe = proc_thermal_pci_probe,
353
+
.remove = proc_thermal_pci_remove,
354
+
.id_table = proc_thermal_pci_ids,
355
+
.driver.pm = &proc_thermal_pci_pm,
356
+
};
357
+
358
+
static int __init proc_thermal_init(void)
359
+
{
360
+
return pci_register_driver(&proc_thermal_pci_driver);
361
+
}
362
+
363
+
static void __exit proc_thermal_exit(void)
364
+
{
365
+
pci_unregister_driver(&proc_thermal_pci_driver);
366
+
}
367
+
368
+
module_init(proc_thermal_init);
369
+
module_exit(proc_thermal_exit);
370
+
371
+
MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
372
+
MODULE_DESCRIPTION("Processor Thermal Reporting Device Driver");
373
+
MODULE_LICENSE("GPL v2");
+163
drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci_legacy.c
+163
drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci_legacy.c
···
1
+
// SPDX-License-Identifier: GPL-2.0-only
2
+
/*
3
+
* B0D4 processor thermal device
4
+
* Copyright (c) 2020, Intel Corporation.
5
+
*/
6
+
7
+
#include <linux/acpi.h>
8
+
#include <linux/kernel.h>
9
+
#include <linux/module.h>
10
+
#include <linux/pci.h>
11
+
#include <linux/thermal.h>
12
+
13
+
#include "int340x_thermal_zone.h"
14
+
#include "processor_thermal_device.h"
15
+
#include "../intel_soc_dts_iosf.h"
16
+
17
+
#define DRV_NAME "proc_thermal"
18
+
19
+
static irqreturn_t proc_thermal_pci_msi_irq(int irq, void *devid)
20
+
{
21
+
struct proc_thermal_device *proc_priv;
22
+
struct pci_dev *pdev = devid;
23
+
24
+
proc_priv = pci_get_drvdata(pdev);
25
+
26
+
intel_soc_dts_iosf_interrupt_handler(proc_priv->soc_dts);
27
+
28
+
return IRQ_HANDLED;
29
+
}
30
+
31
+
static int proc_thermal_pci_probe(struct pci_dev *pdev,
32
+
const struct pci_device_id *id)
33
+
{
34
+
struct proc_thermal_device *proc_priv;
35
+
int ret;
36
+
37
+
ret = pcim_enable_device(pdev);
38
+
if (ret < 0) {
39
+
dev_err(&pdev->dev, "error: could not enable device\n");
40
+
return ret;
41
+
}
42
+
43
+
proc_priv = devm_kzalloc(&pdev->dev, sizeof(*proc_priv), GFP_KERNEL);
44
+
if (!proc_priv)
45
+
return -ENOMEM;
46
+
47
+
ret = proc_thermal_add(&pdev->dev, proc_priv);
48
+
if (ret)
49
+
return ret;
50
+
51
+
pci_set_drvdata(pdev, proc_priv);
52
+
53
+
if (pdev->device == PCI_DEVICE_ID_INTEL_BSW_THERMAL) {
54
+
/*
55
+
* Enumerate additional DTS sensors available via IOSF.
56
+
* But we are not treating as a failure condition, if
57
+
* there are no aux DTSs enabled or fails. This driver
58
+
* already exposes sensors, which can be accessed via
59
+
* ACPI/MSR. So we don't want to fail for auxiliary DTSs.
60
+
*/
61
+
proc_priv->soc_dts = intel_soc_dts_iosf_init(
62
+
INTEL_SOC_DTS_INTERRUPT_MSI, 2, 0);
63
+
64
+
if (!IS_ERR(proc_priv->soc_dts) && pdev->irq) {
65
+
ret = pci_enable_msi(pdev);
66
+
if (!ret) {
67
+
ret = request_threaded_irq(pdev->irq, NULL,
68
+
proc_thermal_pci_msi_irq,
69
+
IRQF_ONESHOT, "proc_thermal",
70
+
pdev);
71
+
if (ret) {
72
+
intel_soc_dts_iosf_exit(
73
+
proc_priv->soc_dts);
74
+
pci_disable_msi(pdev);
75
+
proc_priv->soc_dts = NULL;
76
+
}
77
+
}
78
+
} else
79
+
dev_err(&pdev->dev, "No auxiliary DTSs enabled\n");
80
+
} else {
81
+
82
+
}
83
+
84
+
ret = proc_thermal_mmio_add(pdev, proc_priv, id->driver_data);
85
+
if (ret) {
86
+
proc_thermal_remove(proc_priv);
87
+
return ret;
88
+
}
89
+
90
+
return 0;
91
+
}
92
+
93
+
static void proc_thermal_pci_remove(struct pci_dev *pdev)
94
+
{
95
+
struct proc_thermal_device *proc_priv = pci_get_drvdata(pdev);
96
+
97
+
if (proc_priv->soc_dts) {
98
+
intel_soc_dts_iosf_exit(proc_priv->soc_dts);
99
+
if (pdev->irq) {
100
+
free_irq(pdev->irq, pdev);
101
+
pci_disable_msi(pdev);
102
+
}
103
+
}
104
+
105
+
proc_thermal_mmio_remove(pdev, proc_priv);
106
+
proc_thermal_remove(proc_priv);
107
+
}
108
+
109
+
#ifdef CONFIG_PM_SLEEP
110
+
static int proc_thermal_pci_resume(struct device *dev)
111
+
{
112
+
return proc_thermal_resume(dev);
113
+
}
114
+
#else
115
+
#define proc_thermal_pci_resume NULL
116
+
#endif
117
+
118
+
static SIMPLE_DEV_PM_OPS(proc_thermal_pci_pm, NULL, proc_thermal_pci_resume);
119
+
120
+
static const struct pci_device_id proc_thermal_pci_ids[] = {
121
+
{ PCI_DEVICE_DATA(INTEL, BDW_THERMAL, 0) },
122
+
{ PCI_DEVICE_DATA(INTEL, BSW_THERMAL, 0) },
123
+
{ PCI_DEVICE_DATA(INTEL, BXT0_THERMAL, 0) },
124
+
{ PCI_DEVICE_DATA(INTEL, BXT1_THERMAL, 0) },
125
+
{ PCI_DEVICE_DATA(INTEL, BXTX_THERMAL, 0) },
126
+
{ PCI_DEVICE_DATA(INTEL, BXTP_THERMAL, 0) },
127
+
{ PCI_DEVICE_DATA(INTEL, CNL_THERMAL, 0) },
128
+
{ PCI_DEVICE_DATA(INTEL, CFL_THERMAL, 0) },
129
+
{ PCI_DEVICE_DATA(INTEL, GLK_THERMAL, 0) },
130
+
{ PCI_DEVICE_DATA(INTEL, HSB_THERMAL, 0) },
131
+
{ PCI_DEVICE_DATA(INTEL, ICL_THERMAL, PROC_THERMAL_FEATURE_RAPL) },
132
+
{ PCI_DEVICE_DATA(INTEL, JSL_THERMAL, 0) },
133
+
{ PCI_DEVICE_DATA(INTEL, SKL_THERMAL, PROC_THERMAL_FEATURE_RAPL) },
134
+
{ PCI_DEVICE_DATA(INTEL, TGL_THERMAL, PROC_THERMAL_FEATURE_RAPL | PROC_THERMAL_FEATURE_FIVR | PROC_THERMAL_FEATURE_MBOX) },
135
+
{ },
136
+
};
137
+
138
+
MODULE_DEVICE_TABLE(pci, proc_thermal_pci_ids);
139
+
140
+
static struct pci_driver proc_thermal_pci_driver = {
141
+
.name = DRV_NAME,
142
+
.probe = proc_thermal_pci_probe,
143
+
.remove = proc_thermal_pci_remove,
144
+
.id_table = proc_thermal_pci_ids,
145
+
.driver.pm = &proc_thermal_pci_pm,
146
+
};
147
+
148
+
static int __init proc_thermal_init(void)
149
+
{
150
+
return pci_register_driver(&proc_thermal_pci_driver);
151
+
}
152
+
153
+
static void __exit proc_thermal_exit(void)
154
+
{
155
+
pci_unregister_driver(&proc_thermal_pci_driver);
156
+
}
157
+
158
+
module_init(proc_thermal_init);
159
+
module_exit(proc_thermal_exit);
160
+
161
+
MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
162
+
MODULE_DESCRIPTION("Processor Thermal Reporting Device Driver");
163
+
MODULE_LICENSE("GPL v2");
+9
-3
drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c
+9
-3
drivers/thermal/intel/int340x_thermal/processor_thermal_mbox.c
···
23
23
24
24
static DEFINE_MUTEX(mbox_lock);
25
25
26
-
static int send_mbox_cmd(struct pci_dev *pdev, u8 cmd_id, u32 cmd_data, u8 *cmd_resp)
26
+
static int send_mbox_cmd(struct pci_dev *pdev, u16 cmd_id, u32 cmd_data, u32 *cmd_resp)
27
27
{
28
28
struct proc_thermal_device *proc_priv;
29
29
u32 retries, data;
···
81
81
mutex_unlock(&mbox_lock);
82
82
return ret;
83
83
}
84
+
85
+
int processor_thermal_send_mbox_cmd(struct pci_dev *pdev, u16 cmd_id, u32 cmd_data, u32 *cmd_resp)
86
+
{
87
+
return send_mbox_cmd(pdev, cmd_id, cmd_data, cmd_resp);
88
+
}
89
+
EXPORT_SYMBOL_GPL(processor_thermal_send_mbox_cmd);
84
90
85
91
/* List of workload types */
86
92
static const char * const workload_types[] = {
···
153
147
char *buf)
154
148
{
155
149
struct pci_dev *pdev = to_pci_dev(dev);
156
-
u8 cmd_resp;
150
+
u32 cmd_resp;
157
151
int ret;
158
152
159
153
ret = send_mbox_cmd(pdev, MBOX_CMD_WORKLOAD_TYPE_READ, 0, &cmd_resp);
···
187
181
188
182
int proc_thermal_mbox_add(struct pci_dev *pdev, struct proc_thermal_device *proc_priv)
189
183
{
190
-
u8 cmd_resp;
184
+
u32 cmd_resp;
191
185
int ret;
192
186
193
187
/* Check if there is a mailbox support, if fails return success */
+55
drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c
+55
drivers/thermal/intel/int340x_thermal/processor_thermal_rfim.c
···
190
190
static DEVICE_ATTR_RO(ddr_data_rate_point_3);
191
191
static DEVICE_ATTR_RW(rfi_disable);
192
192
193
+
static ssize_t rfi_restriction_store(struct device *dev,
194
+
struct device_attribute *attr,
195
+
const char *buf, size_t count)
196
+
{
197
+
u16 cmd_id = 0x0008;
198
+
u32 cmd_resp;
199
+
u32 input;
200
+
int ret;
201
+
202
+
ret = kstrtou32(buf, 10, &input);
203
+
if (ret)
204
+
return ret;
205
+
206
+
ret = processor_thermal_send_mbox_cmd(to_pci_dev(dev), cmd_id, input, &cmd_resp);
207
+
if (ret)
208
+
return ret;
209
+
210
+
return count;
211
+
}
212
+
213
+
static ssize_t rfi_restriction_show(struct device *dev,
214
+
struct device_attribute *attr,
215
+
char *buf)
216
+
{
217
+
u16 cmd_id = 0x0007;
218
+
u32 cmd_resp;
219
+
int ret;
220
+
221
+
ret = processor_thermal_send_mbox_cmd(to_pci_dev(dev), cmd_id, 0, &cmd_resp);
222
+
if (ret)
223
+
return ret;
224
+
225
+
return sprintf(buf, "%u\n", cmd_resp);
226
+
}
227
+
228
+
static ssize_t ddr_data_rate_show(struct device *dev,
229
+
struct device_attribute *attr,
230
+
char *buf)
231
+
{
232
+
u16 cmd_id = 0x0107;
233
+
u32 cmd_resp;
234
+
int ret;
235
+
236
+
ret = processor_thermal_send_mbox_cmd(to_pci_dev(dev), cmd_id, 0, &cmd_resp);
237
+
if (ret)
238
+
return ret;
239
+
240
+
return sprintf(buf, "%u\n", cmd_resp);
241
+
}
242
+
243
+
static DEVICE_ATTR_RW(rfi_restriction);
244
+
static DEVICE_ATTR_RO(ddr_data_rate);
245
+
193
246
static struct attribute *dvfs_attrs[] = {
194
247
&dev_attr_rfi_restriction_run_busy.attr,
195
248
&dev_attr_rfi_restriction_err_code.attr,
···
252
199
&dev_attr_ddr_data_rate_point_2.attr,
253
200
&dev_attr_ddr_data_rate_point_3.attr,
254
201
&dev_attr_rfi_disable.attr,
202
+
&dev_attr_ddr_data_rate.attr,
203
+
&dev_attr_rfi_restriction.attr,
255
204
NULL
256
205
};
257
206
+8
-7
drivers/thermal/intel/intel_soc_dts_iosf.c
+8
-7
drivers/thermal/intel/intel_soc_dts_iosf.c
···
350
350
int i, j;
351
351
352
352
for (i = 0; i < SOC_MAX_DTS_SENSORS; ++i) {
353
-
for (j = 0; j < sensors->soc_dts[i].trip_count; ++j) {
354
-
if (!(sensors->soc_dts[i].trip_mask & BIT(j))) {
355
-
return update_trip_temp(&sensors->soc_dts[i], j,
356
-
sensors->tj_max - critical_offset,
357
-
THERMAL_TRIP_CRITICAL);
358
-
}
359
-
}
353
+
struct intel_soc_dts_sensor_entry *entry = &sensors->soc_dts[i];
354
+
int temp = sensors->tj_max - critical_offset;
355
+
unsigned long count = entry->trip_count;
356
+
unsigned long mask = entry->trip_mask;
357
+
358
+
j = find_first_zero_bit(&mask, count);
359
+
if (j < count)
360
+
return update_trip_temp(entry, j, temp, THERMAL_TRIP_CRITICAL);
360
361
}
361
362
362
363
return -EINVAL;
+6
drivers/thermal/mtk_thermal.c
+6
drivers/thermal/mtk_thermal.c
···
23
23
#include <linux/reset.h>
24
24
#include <linux/types.h>
25
25
26
+
#include "thermal_hwmon.h"
27
+
26
28
/* AUXADC Registers */
27
29
#define AUXADC_CON1_SET_V 0x008
28
30
#define AUXADC_CON1_CLR_V 0x00c
···
1088
1086
ret = PTR_ERR(tzdev);
1089
1087
goto err_disable_clk_peri_therm;
1090
1088
}
1089
+
1090
+
ret = devm_thermal_add_hwmon_sysfs(tzdev);
1091
+
if (ret)
1092
+
dev_warn(&pdev->dev, "error in thermal_add_hwmon_sysfs");
1091
1093
1092
1094
return 0;
1093
1095
+3
-4
drivers/thermal/rcar_gen3_thermal.c
+3
-4
drivers/thermal/rcar_gen3_thermal.c
···
143
143
* Division is not scaled in BSP and if scaled it might overflow
144
144
* the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
145
145
*/
146
-
tsc->tj_t = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
146
+
tsc->tj_t = (FIXPT_INT((ptat[1] - ptat[2]) * (ths_tj_1 - TJ_3))
147
147
/ (ptat[0] - ptat[2])) + FIXPT_INT(TJ_3);
148
148
149
149
tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
···
307
307
{
308
308
struct rcar_gen3_thermal_priv *priv;
309
309
struct device *dev = &pdev->dev;
310
-
const int *rcar_gen3_ths_tj_1 = of_device_get_match_data(dev);
310
+
const int *ths_tj_1 = of_device_get_match_data(dev);
311
311
struct resource *res;
312
312
struct thermal_zone_device *zone;
313
313
int ret, i;
···
352
352
priv->tscs[i] = tsc;
353
353
354
354
priv->thermal_init(tsc);
355
-
rcar_gen3_thermal_calc_coefs(tsc, ptat, thcodes[i],
356
-
*rcar_gen3_ths_tj_1);
355
+
rcar_gen3_thermal_calc_coefs(tsc, ptat, thcodes[i], *ths_tj_1);
357
356
358
357
zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
359
358
&rcar_gen3_tz_of_ops);
+121
drivers/thermal/rockchip_thermal.c
+121
drivers/thermal/rockchip_thermal.c
···
211
211
#define TSADCV3_AUTO_PERIOD_TIME 1875 /* 2.5ms */
212
212
#define TSADCV3_AUTO_PERIOD_HT_TIME 1875 /* 2.5ms */
213
213
214
+
#define TSADCV5_AUTO_PERIOD_TIME 1622 /* 2.5ms */
215
+
#define TSADCV5_AUTO_PERIOD_HT_TIME 1622 /* 2.5ms */
216
+
214
217
#define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
218
+
#define TSADCV5_USER_INTER_PD_SOC 0xfc0 /* 97us, at least 90us */
215
219
216
220
#define GRF_SARADC_TESTBIT 0x0e644
217
221
#define GRF_TSADC_TESTBIT_L 0x0e648
218
222
#define GRF_TSADC_TESTBIT_H 0x0e64c
219
223
220
224
#define PX30_GRF_SOC_CON2 0x0408
225
+
226
+
#define RK3568_GRF_TSADC_CON 0x0600
227
+
#define RK3568_GRF_TSADC_ANA_REG0 (0x10001 << 0)
228
+
#define RK3568_GRF_TSADC_ANA_REG1 (0x10001 << 1)
229
+
#define RK3568_GRF_TSADC_ANA_REG2 (0x10001 << 2)
230
+
#define RK3568_GRF_TSADC_TSEN (0x10001 << 8)
221
231
222
232
#define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
223
233
#define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
···
484
474
{TSADCV3_DATA_MASK, 125000},
485
475
};
486
476
477
+
static const struct tsadc_table rk3568_code_table[] = {
478
+
{0, -40000},
479
+
{1584, -40000},
480
+
{1620, -35000},
481
+
{1652, -30000},
482
+
{1688, -25000},
483
+
{1720, -20000},
484
+
{1756, -15000},
485
+
{1788, -10000},
486
+
{1824, -5000},
487
+
{1856, 0},
488
+
{1892, 5000},
489
+
{1924, 10000},
490
+
{1956, 15000},
491
+
{1992, 20000},
492
+
{2024, 25000},
493
+
{2060, 30000},
494
+
{2092, 35000},
495
+
{2128, 40000},
496
+
{2160, 45000},
497
+
{2196, 50000},
498
+
{2228, 55000},
499
+
{2264, 60000},
500
+
{2300, 65000},
501
+
{2332, 70000},
502
+
{2368, 75000},
503
+
{2400, 80000},
504
+
{2436, 85000},
505
+
{2468, 90000},
506
+
{2500, 95000},
507
+
{2536, 100000},
508
+
{2572, 105000},
509
+
{2604, 110000},
510
+
{2636, 115000},
511
+
{2672, 120000},
512
+
{2704, 125000},
513
+
{TSADCV2_DATA_MASK, 125000},
514
+
};
515
+
487
516
static u32 rk_tsadcv2_temp_to_code(const struct chip_tsadc_table *table,
488
517
int temp)
489
518
{
···
748
699
{
749
700
rk_tsadcv2_initialize(grf, regs, tshut_polarity);
750
701
regmap_write(grf, PX30_GRF_SOC_CON2, GRF_CON_TSADC_CH_INV);
702
+
}
703
+
704
+
static void rk_tsadcv7_initialize(struct regmap *grf, void __iomem *regs,
705
+
enum tshut_polarity tshut_polarity)
706
+
{
707
+
writel_relaxed(TSADCV5_USER_INTER_PD_SOC, regs + TSADCV2_USER_CON);
708
+
writel_relaxed(TSADCV5_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
709
+
writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
710
+
regs + TSADCV2_HIGHT_INT_DEBOUNCE);
711
+
writel_relaxed(TSADCV5_AUTO_PERIOD_HT_TIME,
712
+
regs + TSADCV2_AUTO_PERIOD_HT);
713
+
writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
714
+
regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
715
+
716
+
if (tshut_polarity == TSHUT_HIGH_ACTIVE)
717
+
writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
718
+
regs + TSADCV2_AUTO_CON);
719
+
else
720
+
writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
721
+
regs + TSADCV2_AUTO_CON);
722
+
723
+
/*
724
+
* The general register file will is optional
725
+
* and might not be available.
726
+
*/
727
+
if (!IS_ERR(grf)) {
728
+
regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_TSEN);
729
+
/*
730
+
* RK3568 TRM, section 18.5. requires a delay no less
731
+
* than 10us between the rising edge of tsadc_tsen_en
732
+
* and the rising edge of tsadc_ana_reg_0/1/2.
733
+
*/
734
+
udelay(15);
735
+
regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG0);
736
+
regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG1);
737
+
regmap_write(grf, RK3568_GRF_TSADC_CON, RK3568_GRF_TSADC_ANA_REG2);
738
+
739
+
/*
740
+
* RK3568 TRM, section 18.5. requires a delay no less
741
+
* than 90us after the rising edge of tsadc_ana_reg_0/1/2.
742
+
*/
743
+
usleep_range(100, 200);
744
+
}
751
745
}
752
746
753
747
static void rk_tsadcv2_irq_ack(void __iomem *regs)
···
1119
1027
},
1120
1028
};
1121
1029
1030
+
static const struct rockchip_tsadc_chip rk3568_tsadc_data = {
1031
+
.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
1032
+
.chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
1033
+
.chn_num = 2, /* two channels for tsadc */
1034
+
1035
+
.tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
1036
+
.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
1037
+
.tshut_temp = 95000,
1038
+
1039
+
.initialize = rk_tsadcv7_initialize,
1040
+
.irq_ack = rk_tsadcv3_irq_ack,
1041
+
.control = rk_tsadcv3_control,
1042
+
.get_temp = rk_tsadcv2_get_temp,
1043
+
.set_alarm_temp = rk_tsadcv2_alarm_temp,
1044
+
.set_tshut_temp = rk_tsadcv2_tshut_temp,
1045
+
.set_tshut_mode = rk_tsadcv2_tshut_mode,
1046
+
1047
+
.table = {
1048
+
.id = rk3568_code_table,
1049
+
.length = ARRAY_SIZE(rk3568_code_table),
1050
+
.data_mask = TSADCV2_DATA_MASK,
1051
+
.mode = ADC_INCREMENT,
1052
+
},
1053
+
};
1054
+
1122
1055
static const struct of_device_id of_rockchip_thermal_match[] = {
1123
1056
{ .compatible = "rockchip,px30-tsadc",
1124
1057
.data = (void *)&px30_tsadc_data,
···
1175
1058
{
1176
1059
.compatible = "rockchip,rk3399-tsadc",
1177
1060
.data = (void *)&rk3399_tsadc_data,
1061
+
},
1062
+
{
1063
+
.compatible = "rockchip,rk3568-tsadc",
1064
+
.data = (void *)&rk3568_tsadc_data,
1178
1065
},
1179
1066
{ /* end */ },
1180
1067
};
+10
-6
drivers/thermal/sprd_thermal.c
+10
-6
drivers/thermal/sprd_thermal.c
···
388
388
sen = devm_kzalloc(&pdev->dev, sizeof(*sen), GFP_KERNEL);
389
389
if (!sen) {
390
390
ret = -ENOMEM;
391
-
goto disable_clk;
391
+
goto of_put;
392
392
}
393
393
394
394
sen->data = thm;
···
397
397
ret = of_property_read_u32(sen_child, "reg", &sen->id);
398
398
if (ret) {
399
399
dev_err(&pdev->dev, "get sensor reg failed");
400
-
goto disable_clk;
400
+
goto of_put;
401
401
}
402
402
403
403
ret = sprd_thm_sensor_calibration(sen_child, thm, sen);
404
404
if (ret) {
405
405
dev_err(&pdev->dev, "efuse cal analysis failed");
406
-
goto disable_clk;
406
+
goto of_put;
407
407
}
408
408
409
409
sprd_thm_sensor_init(thm, sen);
···
416
416
dev_err(&pdev->dev, "register thermal zone failed %d\n",
417
417
sen->id);
418
418
ret = PTR_ERR(sen->tzd);
419
-
goto disable_clk;
419
+
goto of_put;
420
420
}
421
421
422
422
thm->sensor[sen->id] = sen;
423
423
}
424
+
/* sen_child set to NULL at this point */
424
425
425
426
ret = sprd_thm_set_ready(thm);
426
427
if (ret)
427
-
goto disable_clk;
428
+
goto of_put;
428
429
429
430
ret = sprd_thm_wait_temp_ready(thm);
430
431
if (ret)
431
-
goto disable_clk;
432
+
goto of_put;
432
433
433
434
for (i = 0; i < thm->nr_sensors; i++)
434
435
sprd_thm_toggle_sensor(thm->sensor[i], true);
···
437
436
platform_set_drvdata(pdev, thm);
438
437
return 0;
439
438
439
+
of_put:
440
+
of_node_put(sen_child);
440
441
disable_clk:
441
442
clk_disable_unprepare(thm->clk);
442
443
return ret;
···
535
532
{ .compatible = "sprd,ums512-thermal", .data = &ums512_data },
536
533
{ },
537
534
};
535
+
MODULE_DEVICE_TABLE(of, sprd_thermal_of_match);
538
536
539
537
static const struct dev_pm_ops sprd_thermal_pm_ops = {
540
538
SET_SYSTEM_SLEEP_PM_OPS(sprd_thm_suspend, sprd_thm_resume)
+2
-11
drivers/thermal/st/st_thermal_memmap.c
+2
-11
drivers/thermal/st/st_thermal_memmap.c
···
119
119
{
120
120
struct device *dev = sensor->dev;
121
121
struct platform_device *pdev = to_platform_device(dev);
122
-
struct resource *res;
123
122
124
-
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
125
-
if (!res) {
126
-
dev_err(dev, "no memory resources defined\n");
127
-
return -ENODEV;
128
-
}
129
-
130
-
sensor->mmio_base = devm_ioremap_resource(dev, res);
131
-
if (IS_ERR(sensor->mmio_base)) {
132
-
dev_err(dev, "failed to remap IO\n");
123
+
sensor->mmio_base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
124
+
if (IS_ERR(sensor->mmio_base))
133
125
return PTR_ERR(sensor->mmio_base);
134
-
}
135
126
136
127
sensor->regmap = devm_regmap_init_mmio(dev, sensor->mmio_base,
137
128
&st_416mpe_regmap_config);
+1
-1
drivers/thermal/thermal_core.c
+1
-1
drivers/thermal/thermal_core.c
···
1315
1315
EXPORT_SYMBOL_GPL(thermal_zone_device_register);
1316
1316
1317
1317
/**
1318
-
* thermal_device_unregister - removes the registered thermal zone device
1318
+
* thermal_zone_device_unregister - removes the registered thermal zone device
1319
1319
* @tz: the thermal zone device to remove
1320
1320
*/
1321
1321
void thermal_zone_device_unregister(struct thermal_zone_device *tz)