Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/amdgpu: Do not implement mode_set_base_atomic callback
Remove all implementations of the CRTC helper mode_set_base_atomic
from amdgpu. It pretends to provide mode setting for kdb debugging,
but has been broken for some time.
Kdb output has been supported only for non-atomic mode setting since
commit 9c79e0b1d096 ("drm/fb-helper: Give up on kgdb for atomic drivers")
from 2017.
While amdgpu provides non-atomic mode setting for some devices, kdb
assumes that the GEM buffer object is at a fixed location in video
memory. This has not been the case since commit 087451f372bf ("drm/amdgpu:
use generic fb helpers instead of setting up AMD own's.") from 2021.
Fbdev-ttm helpers use a shadow buffer with a movable GEM buffer object.
Triggering kdb does not update the display.
Hence remove the whole kdb support from amdgpu.
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Simona Vetter <simona.vetter@ffwll.ch>
Acked-by: Daniel Thompson (RISCstar) <danielt@kernel.org>
Link: https://patch.msgid.link/20251125130634.1080966-2-tzimmermann@suse.de
+33
-72
+11
-24
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+11
-24
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
···
1838
1838
1839
1839
static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,
1840
1840
struct drm_framebuffer *fb,
1841
-
int x, int y, int atomic)
1841
+
int x, int y)
1842
1842
{
1843
1843
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
1844
1844
struct drm_device *dev = crtc->dev;
···
1855
1855
bool bypass_lut = false;
1856
1856
1857
1857
/* no fb bound */
1858
-
if (!atomic && !crtc->primary->fb) {
1858
+
if (!crtc->primary->fb) {
1859
1859
DRM_DEBUG_KMS("No FB bound\n");
1860
1860
return 0;
1861
1861
}
1862
1862
1863
-
if (atomic)
1864
-
target_fb = fb;
1865
-
else
1866
-
target_fb = crtc->primary->fb;
1863
+
target_fb = crtc->primary->fb;
1867
1864
1868
1865
/* If atomic, assume fb object is pinned & idle & fenced and
1869
1866
* just update base pointers
···
1871
1874
if (unlikely(r != 0))
1872
1875
return r;
1873
1876
1874
-
if (!atomic) {
1875
-
abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
1876
-
r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM);
1877
-
if (unlikely(r != 0)) {
1878
-
amdgpu_bo_unreserve(abo);
1879
-
return -EINVAL;
1880
-
}
1877
+
abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
1878
+
r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM);
1879
+
if (unlikely(r != 0)) {
1880
+
amdgpu_bo_unreserve(abo);
1881
+
return -EINVAL;
1881
1882
}
1882
1883
fb_location = amdgpu_bo_gpu_offset(abo);
1883
1884
···
2063
2068
/* set pageflip to happen anywhere in vblank interval */
2064
2069
WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);
2065
2070
2066
-
if (!atomic && fb && fb != crtc->primary->fb) {
2071
+
if (fb && fb != crtc->primary->fb) {
2067
2072
abo = gem_to_amdgpu_bo(fb->obj[0]);
2068
2073
r = amdgpu_bo_reserve(abo, true);
2069
2074
if (unlikely(r != 0))
···
2606
2611
2607
2612
amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode);
2608
2613
amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode);
2609
-
dce_v10_0_crtc_do_set_base(crtc, old_fb, x, y, 0);
2614
+
dce_v10_0_crtc_do_set_base(crtc, old_fb, x, y);
2610
2615
amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode);
2611
2616
amdgpu_atombios_crtc_scaler_setup(crtc);
2612
2617
dce_v10_0_cursor_reset(crtc);
···
2654
2659
static int dce_v10_0_crtc_set_base(struct drm_crtc *crtc, int x, int y,
2655
2660
struct drm_framebuffer *old_fb)
2656
2661
{
2657
-
return dce_v10_0_crtc_do_set_base(crtc, old_fb, x, y, 0);
2658
-
}
2659
-
2660
-
static int dce_v10_0_crtc_set_base_atomic(struct drm_crtc *crtc,
2661
-
struct drm_framebuffer *fb,
2662
-
int x, int y, enum mode_set_atomic state)
2663
-
{
2664
-
return dce_v10_0_crtc_do_set_base(crtc, fb, x, y, 1);
2662
+
return dce_v10_0_crtc_do_set_base(crtc, old_fb, x, y);
2665
2663
}
2666
2664
2667
2665
static const struct drm_crtc_helper_funcs dce_v10_0_crtc_helper_funcs = {
···
2662
2674
.mode_fixup = dce_v10_0_crtc_mode_fixup,
2663
2675
.mode_set = dce_v10_0_crtc_mode_set,
2664
2676
.mode_set_base = dce_v10_0_crtc_set_base,
2665
-
.mode_set_base_atomic = dce_v10_0_crtc_set_base_atomic,
2666
2677
.prepare = dce_v10_0_crtc_prepare,
2667
2678
.commit = dce_v10_0_crtc_commit,
2668
2679
.disable = dce_v10_0_crtc_disable,
+11
-24
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+11
-24
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
···
1876
1876
1877
1877
static int dce_v6_0_crtc_do_set_base(struct drm_crtc *crtc,
1878
1878
struct drm_framebuffer *fb,
1879
-
int x, int y, int atomic)
1879
+
int x, int y)
1880
1880
{
1881
1881
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
1882
1882
struct drm_device *dev = crtc->dev;
···
1892
1892
bool bypass_lut = false;
1893
1893
1894
1894
/* no fb bound */
1895
-
if (!atomic && !crtc->primary->fb) {
1895
+
if (!crtc->primary->fb) {
1896
1896
DRM_DEBUG_KMS("No FB bound\n");
1897
1897
return 0;
1898
1898
}
1899
1899
1900
-
if (atomic)
1901
-
target_fb = fb;
1902
-
else
1903
-
target_fb = crtc->primary->fb;
1900
+
target_fb = crtc->primary->fb;
1904
1901
1905
1902
/* If atomic, assume fb object is pinned & idle & fenced and
1906
1903
* just update base pointers
···
1908
1911
if (unlikely(r != 0))
1909
1912
return r;
1910
1913
1911
-
if (!atomic) {
1912
-
abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
1913
-
r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM);
1914
-
if (unlikely(r != 0)) {
1915
-
amdgpu_bo_unreserve(abo);
1916
-
return -EINVAL;
1917
-
}
1914
+
abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
1915
+
r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM);
1916
+
if (unlikely(r != 0)) {
1917
+
amdgpu_bo_unreserve(abo);
1918
+
return -EINVAL;
1918
1919
}
1919
1920
fb_location = amdgpu_bo_gpu_offset(abo);
1920
1921
···
2078
2083
/* set pageflip to happen anywhere in vblank interval */
2079
2084
WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);
2080
2085
2081
-
if (!atomic && fb && fb != crtc->primary->fb) {
2086
+
if (fb && fb != crtc->primary->fb) {
2082
2087
abo = gem_to_amdgpu_bo(fb->obj[0]);
2083
2088
r = amdgpu_bo_reserve(abo, true);
2084
2089
if (unlikely(r != 0))
···
2573
2578
2574
2579
amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode);
2575
2580
amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode);
2576
-
dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y, 0);
2581
+
dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y);
2577
2582
amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode);
2578
2583
amdgpu_atombios_crtc_scaler_setup(crtc);
2579
2584
dce_v6_0_cursor_reset(crtc);
···
2621
2626
static int dce_v6_0_crtc_set_base(struct drm_crtc *crtc, int x, int y,
2622
2627
struct drm_framebuffer *old_fb)
2623
2628
{
2624
-
return dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y, 0);
2625
-
}
2626
-
2627
-
static int dce_v6_0_crtc_set_base_atomic(struct drm_crtc *crtc,
2628
-
struct drm_framebuffer *fb,
2629
-
int x, int y, enum mode_set_atomic state)
2630
-
{
2631
-
return dce_v6_0_crtc_do_set_base(crtc, fb, x, y, 1);
2629
+
return dce_v6_0_crtc_do_set_base(crtc, old_fb, x, y);
2632
2630
}
2633
2631
2634
2632
static const struct drm_crtc_helper_funcs dce_v6_0_crtc_helper_funcs = {
···
2629
2641
.mode_fixup = dce_v6_0_crtc_mode_fixup,
2630
2642
.mode_set = dce_v6_0_crtc_mode_set,
2631
2643
.mode_set_base = dce_v6_0_crtc_set_base,
2632
-
.mode_set_base_atomic = dce_v6_0_crtc_set_base_atomic,
2633
2644
.prepare = dce_v6_0_crtc_prepare,
2634
2645
.commit = dce_v6_0_crtc_commit,
2635
2646
.disable = dce_v6_0_crtc_disable,
+11
-24
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+11
-24
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
···
1785
1785
1786
1786
static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,
1787
1787
struct drm_framebuffer *fb,
1788
-
int x, int y, int atomic)
1788
+
int x, int y)
1789
1789
{
1790
1790
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
1791
1791
struct drm_device *dev = crtc->dev;
···
1802
1802
bool bypass_lut = false;
1803
1803
1804
1804
/* no fb bound */
1805
-
if (!atomic && !crtc->primary->fb) {
1805
+
if (!crtc->primary->fb) {
1806
1806
DRM_DEBUG_KMS("No FB bound\n");
1807
1807
return 0;
1808
1808
}
1809
1809
1810
-
if (atomic)
1811
-
target_fb = fb;
1812
-
else
1813
-
target_fb = crtc->primary->fb;
1810
+
target_fb = crtc->primary->fb;
1814
1811
1815
1812
/* If atomic, assume fb object is pinned & idle & fenced and
1816
1813
* just update base pointers
···
1818
1821
if (unlikely(r != 0))
1819
1822
return r;
1820
1823
1821
-
if (!atomic) {
1822
-
abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
1823
-
r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM);
1824
-
if (unlikely(r != 0)) {
1825
-
amdgpu_bo_unreserve(abo);
1826
-
return -EINVAL;
1827
-
}
1824
+
abo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
1825
+
r = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM);
1826
+
if (unlikely(r != 0)) {
1827
+
amdgpu_bo_unreserve(abo);
1828
+
return -EINVAL;
1828
1829
}
1829
1830
fb_location = amdgpu_bo_gpu_offset(abo);
1830
1831
···
1990
1995
/* set pageflip to happen anywhere in vblank interval */
1991
1996
WREG32(mmMASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0);
1992
1997
1993
-
if (!atomic && fb && fb != crtc->primary->fb) {
1998
+
if (fb && fb != crtc->primary->fb) {
1994
1999
abo = gem_to_amdgpu_bo(fb->obj[0]);
1995
2000
r = amdgpu_bo_reserve(abo, true);
1996
2001
if (unlikely(r != 0))
···
2532
2537
2533
2538
amdgpu_atombios_crtc_set_pll(crtc, adjusted_mode);
2534
2539
amdgpu_atombios_crtc_set_dtd_timing(crtc, adjusted_mode);
2535
-
dce_v8_0_crtc_do_set_base(crtc, old_fb, x, y, 0);
2540
+
dce_v8_0_crtc_do_set_base(crtc, old_fb, x, y);
2536
2541
amdgpu_atombios_crtc_overscan_setup(crtc, mode, adjusted_mode);
2537
2542
amdgpu_atombios_crtc_scaler_setup(crtc);
2538
2543
dce_v8_0_cursor_reset(crtc);
···
2580
2585
static int dce_v8_0_crtc_set_base(struct drm_crtc *crtc, int x, int y,
2581
2586
struct drm_framebuffer *old_fb)
2582
2587
{
2583
-
return dce_v8_0_crtc_do_set_base(crtc, old_fb, x, y, 0);
2584
-
}
2585
-
2586
-
static int dce_v8_0_crtc_set_base_atomic(struct drm_crtc *crtc,
2587
-
struct drm_framebuffer *fb,
2588
-
int x, int y, enum mode_set_atomic state)
2589
-
{
2590
-
return dce_v8_0_crtc_do_set_base(crtc, fb, x, y, 1);
2588
+
return dce_v8_0_crtc_do_set_base(crtc, old_fb, x, y);
2591
2589
}
2592
2590
2593
2591
static const struct drm_crtc_helper_funcs dce_v8_0_crtc_helper_funcs = {
···
2588
2600
.mode_fixup = dce_v8_0_crtc_mode_fixup,
2589
2601
.mode_set = dce_v8_0_crtc_mode_set,
2590
2602
.mode_set_base = dce_v8_0_crtc_set_base,
2591
-
.mode_set_base_atomic = dce_v8_0_crtc_set_base_atomic,
2592
2603
.prepare = dce_v8_0_crtc_prepare,
2593
2604
.commit = dce_v8_0_crtc_commit,
2594
2605
.disable = dce_v8_0_crtc_disable,