Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'gpio-fixes-for-v6.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
Pull gpio fixes from Bartosz Golaszewski:
- fix a potential race condition and always set GPIOs used as interrupt
source to input in gpio-mxc
- fix a GPIO ACPI-related issue with system suspend on Clevo NL5xRU
* tag 'gpio-fixes-for-v6.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux:
gpiolib: acpi: Add a ignore wakeup quirk for Clevo NL5xRU
gpiolib: acpi: Allow ignoring wake capability on pins that aren't in _AEI
gpio: mxc: Always set GPIOs used as interrupt source to INPUT mode
gpio: mxc: Protect GPIO irqchip RMW with bgpio spinlock
+27
-3
+12
-1
drivers/gpio/gpio-mxc.c
+12
-1
drivers/gpio/gpio-mxc.c
···
18
18
#include <linux/module.h>
19
19
#include <linux/platform_device.h>
20
20
#include <linux/slab.h>
21
+
#include <linux/spinlock.h>
21
22
#include <linux/syscore_ops.h>
22
23
#include <linux/gpio/driver.h>
23
24
#include <linux/of.h>
···
160
159
{
161
160
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
162
161
struct mxc_gpio_port *port = gc->private;
162
+
unsigned long flags;
163
163
u32 bit, val;
164
164
u32 gpio_idx = d->hwirq;
165
165
int edge;
···
199
197
return -EINVAL;
200
198
}
201
199
200
+
raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags);
201
+
202
202
if (GPIO_EDGE_SEL >= 0) {
203
203
val = readl(port->base + GPIO_EDGE_SEL);
204
204
if (edge == GPIO_INT_BOTH_EDGES)
···
221
217
writel(1 << gpio_idx, port->base + GPIO_ISR);
222
218
port->pad_type[gpio_idx] = type;
223
219
224
-
return 0;
220
+
raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags);
221
+
222
+
return port->gc.direction_input(&port->gc, gpio_idx);
225
223
}
226
224
227
225
static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)
228
226
{
229
227
void __iomem *reg = port->base;
228
+
unsigned long flags;
230
229
u32 bit, val;
231
230
int edge;
231
+
232
+
raw_spin_lock_irqsave(&port->gc.bgpio_lock, flags);
232
233
233
234
reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */
234
235
bit = gpio & 0xf;
···
252
243
return;
253
244
}
254
245
writel(val | (edge << (bit << 1)), reg);
246
+
247
+
raw_spin_unlock_irqrestore(&port->gc.bgpio_lock, flags);
255
248
}
256
249
257
250
/* handle 32 interrupts in one status register */
+15
-2
drivers/gpio/gpiolib-acpi.c
+15
-2
drivers/gpio/gpiolib-acpi.c
···
385
385
}
386
386
387
387
static bool acpi_gpio_irq_is_wake(struct device *parent,
388
-
struct acpi_resource_gpio *agpio)
388
+
const struct acpi_resource_gpio *agpio)
389
389
{
390
390
unsigned int pin = agpio->pin_table[0];
391
391
···
778
778
lookup->info.pin_config = agpio->pin_config;
779
779
lookup->info.debounce = agpio->debounce_timeout;
780
780
lookup->info.gpioint = gpioint;
781
-
lookup->info.wake_capable = agpio->wake_capable == ACPI_WAKE_CAPABLE;
781
+
lookup->info.wake_capable = acpi_gpio_irq_is_wake(&lookup->info.adev->dev, agpio);
782
782
783
783
/*
784
784
* Polarity and triggering are only specified for GpioInt
···
1621
1621
},
1622
1622
.driver_data = &(struct acpi_gpiolib_dmi_quirk) {
1623
1623
.ignore_interrupt = "AMDI0030:00@18",
1624
+
},
1625
+
},
1626
+
{
1627
+
/*
1628
+
* Spurious wakeups from TP_ATTN# pin
1629
+
* Found in BIOS 1.7.8
1630
+
* https://gitlab.freedesktop.org/drm/amd/-/issues/1722#note_1720627
1631
+
*/
1632
+
.matches = {
1633
+
DMI_MATCH(DMI_BOARD_NAME, "NL5xRU"),
1634
+
},
1635
+
.driver_data = &(struct acpi_gpiolib_dmi_quirk) {
1636
+
.ignore_wake = "ELAN0415:00@9",
1624
1637
},
1625
1638
},
1626
1639
{} /* Terminating entry */