tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

net/mlx5: Add IFC bits for shared headroom pool PBMC support

Add hardware interface definitions for shared headroom pool (SHP) in
port buffer management:

- shp_pbmc_pbsr_support: capability bit in PCAM enhanced features
indicating device support for shared headroom pool in PBMC/PBSR.
- shared_headroom_pool: buffer entry in PBMC register (pbmc_reg_bits)
for the shared headroom pool configuration, reusing the bufferx
layout; reduce trailing reserved region accordingly.

Signed-off-by: Alexei Lazar <alazar@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260309093435.1850724-2-tariqt@nvidia.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>

authored by

Alexei Lazar and committed by
Leon Romanovsky f8e76165 385a06f7

+5 -2
+5 -2
include/linux/mlx5/mlx5_ifc.h
··· 10845 10845 u8 fec_200G_per_lane_in_pplm[0x1]; 10846 10846 u8 reserved_at_1e[0x2a]; 10847 10847 u8 fec_100G_per_lane_in_pplm[0x1]; 10848 - u8 reserved_at_49[0xa]; 10848 + u8 reserved_at_49[0x2]; 10849 + u8 shp_pbmc_pbsr_support[0x1]; 10850 + u8 reserved_at_4c[0x7]; 10849 10851 u8 buffer_ownership[0x1]; 10850 10852 u8 resereved_at_54[0x14]; 10851 10853 u8 fec_50G_per_lane_in_pplm[0x1]; ··· 12092 12090 u8 port_buffer_size[0x10]; 12093 12091 12094 12092 struct mlx5_ifc_bufferx_reg_bits buffer[10]; 12093 + struct mlx5_ifc_bufferx_reg_bits shared_headroom_pool; 12095 12094 12096 - u8 reserved_at_2e0[0x80]; 12095 + u8 reserved_at_320[0x40]; 12097 12096 }; 12098 12097 12099 12098 struct mlx5_ifc_sbpr_reg_bits {