tjh.dev / kernel
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Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue

Tony Nguyen says:

====================
Intel Wired LAN Driver Updates 2025-10-28 (ice, ixgbe, igb, igc)

For ice, Grzegorz fixes setting of PHY lane number and logical PF ID for
E82x devices. He also corrects access of CGU (Clock Generation Unit) on
dual complex devices.

Kohei Enju resolves issues with error path cleanup for probe when in
recovery mode on ixgbe and ensures PHY is powered on for link testing
on igc. Lastly, he converts incorrect use of -ENOTSUPP to -EOPNOTSUPP
on igb, igc, and ixgbe.

* '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue:
ixgbe: use EOPNOTSUPP instead of ENOTSUPP in ixgbe_ptp_feature_enable()
igc: use EOPNOTSUPP instead of ENOTSUPP in igc_ethtool_get_sset_count()
igb: use EOPNOTSUPP instead of ENOTSUPP in igb_get_sset_count()
igc: power up the PHY before the link test
ixgbe: fix memory leak and use-after-free in ixgbe_recovery_probe()
ice: fix usage of logical PF id
ice: fix destination CGU for dual complex E825
ice: fix lane number calculation
====================

Link: https://patch.msgid.link/20251028202515.675129-1-anthony.l.nguyen@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

Jakub Kicinski f99c5792 8df206f7

+42 -7
+33 -2
drivers/net/ethernet/intel/ice/ice_common.c
··· 4382 4382 unsigned int lane; 4383 4383 int err; 4384 4384 4385 + /* E82X does not have sequential IDs, lane number is PF ID. 4386 + * For E825 device, the exception is the variant with external 4387 + * PHY (0x579F), in which there is also 1:1 pf_id -> lane_number 4388 + * mapping. 4389 + */ 4390 + if (hw->mac_type == ICE_MAC_GENERIC || 4391 + hw->device_id == ICE_DEV_ID_E825C_SGMII) 4392 + return hw->pf_id; 4393 + 4385 4394 options = kcalloc(ICE_AQC_PORT_OPT_MAX, sizeof(*options), GFP_KERNEL); 4386 4395 if (!options) 4387 4396 return -ENOMEM; ··· 6506 6497 } 6507 6498 6508 6499 /** 6500 + * ice_get_dest_cgu - get destination CGU dev for given HW 6501 + * @hw: pointer to the HW struct 6502 + * 6503 + * Get CGU client id for CGU register read/write operations. 6504 + * 6505 + * Return: CGU device id to use in SBQ transactions. 6506 + */ 6507 + static enum ice_sbq_dev_id ice_get_dest_cgu(struct ice_hw *hw) 6508 + { 6509 + /* On dual complex E825 only complex 0 has functional CGU powering all 6510 + * the PHYs. 6511 + * SBQ destination device cgu points to CGU on a current complex and to 6512 + * access primary CGU from the secondary complex, the driver should use 6513 + * cgu_peer as a destination device. 6514 + */ 6515 + if (hw->mac_type == ICE_MAC_GENERIC_3K_E825 && ice_is_dual(hw) && 6516 + !ice_is_primary(hw)) 6517 + return ice_sbq_dev_cgu_peer; 6518 + return ice_sbq_dev_cgu; 6519 + } 6520 + 6521 + /** 6509 6522 * ice_read_cgu_reg - Read a CGU register 6510 6523 * @hw: Pointer to the HW struct 6511 6524 * @addr: Register address to read ··· 6541 6510 int ice_read_cgu_reg(struct ice_hw *hw, u32 addr, u32 *val) 6542 6511 { 6543 6512 struct ice_sbq_msg_input cgu_msg = { 6513 + .dest_dev = ice_get_dest_cgu(hw), 6544 6514 .opcode = ice_sbq_msg_rd, 6545 - .dest_dev = ice_sbq_dev_cgu, 6546 6515 .msg_addr_low = addr 6547 6516 }; 6548 6517 int err; ··· 6573 6542 int ice_write_cgu_reg(struct ice_hw *hw, u32 addr, u32 val) 6574 6543 { 6575 6544 struct ice_sbq_msg_input cgu_msg = { 6545 + .dest_dev = ice_get_dest_cgu(hw), 6576 6546 .opcode = ice_sbq_msg_wr, 6577 - .dest_dev = ice_sbq_dev_cgu, 6578 6547 .msg_addr_low = addr, 6579 6548 .data = val 6580 6549 };
+1 -1
drivers/net/ethernet/intel/ice/ice_flex_pipe.c
··· 1479 1479 per_pf = ICE_PROF_MASK_COUNT / hw->dev_caps.num_funcs; 1480 1480 1481 1481 hw->blk[blk].masks.count = per_pf; 1482 - hw->blk[blk].masks.first = hw->pf_id * per_pf; 1482 + hw->blk[blk].masks.first = hw->logical_pf_id * per_pf; 1483 1483 1484 1484 memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks)); 1485 1485
+1
drivers/net/ethernet/intel/ice/ice_sbq_cmd.h
··· 50 50 ice_sbq_dev_phy_0 = 0x02, 51 51 ice_sbq_dev_cgu = 0x06, 52 52 ice_sbq_dev_phy_0_peer = 0x0D, 53 + ice_sbq_dev_cgu_peer = 0x0F, 53 54 }; 54 55 55 56 enum ice_sbq_msg_opcode {
+1 -1
drivers/net/ethernet/intel/igb/igb_ethtool.c
··· 2281 2281 case ETH_SS_PRIV_FLAGS: 2282 2282 return IGB_PRIV_FLAGS_STR_LEN; 2283 2283 default: 2284 - return -ENOTSUPP; 2284 + return -EOPNOTSUPP; 2285 2285 } 2286 2286 } 2287 2287
+4 -1
drivers/net/ethernet/intel/igc/igc_ethtool.c
··· 810 810 case ETH_SS_PRIV_FLAGS: 811 811 return IGC_PRIV_FLAGS_STR_LEN; 812 812 default: 813 - return -ENOTSUPP; 813 + return -EOPNOTSUPP; 814 814 } 815 815 } 816 816 ··· 2093 2093 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2094 2094 netdev_info(adapter->netdev, "Offline testing starting"); 2095 2095 set_bit(__IGC_TESTING, &adapter->state); 2096 + 2097 + /* power up PHY for link test */ 2098 + igc_power_up_phy_copper(&adapter->hw); 2096 2099 2097 2100 /* Link test performed before hardware reset so autoneg doesn't 2098 2101 * interfere with test result
+1 -1
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
··· 11507 11507 shutdown_aci: 11508 11508 mutex_destroy(&adapter->hw.aci.lock); 11509 11509 ixgbe_release_hw_control(adapter); 11510 - devlink_free(adapter->devlink); 11511 11510 clean_up_probe: 11512 11511 disable_dev = !test_and_set_bit(__IXGBE_DISABLED, &adapter->state); 11513 11512 free_netdev(netdev); 11513 + devlink_free(adapter->devlink); 11514 11514 pci_release_mem_regions(pdev); 11515 11515 if (disable_dev) 11516 11516 pci_disable_device(pdev);
+1 -1
drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
··· 641 641 * disabled 642 642 */ 643 643 if (rq->type != PTP_CLK_REQ_PPS || !adapter->ptp_setup_sdp) 644 - return -ENOTSUPP; 644 + return -EOPNOTSUPP; 645 645 646 646 if (on) 647 647 adapter->flags2 |= IXGBE_FLAG2_PTP_PPS_ENABLED;