Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'usb-3.14-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB fixes from Greg KH:
"Here are a number of USB fixes for reported issues for 3.14-rc4
The majority of these are for USB gadget, phy, and musb driver issues.
And there's a few new device ids thrown in for good measure"
* tag 'usb-3.14-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb:
usb: chipidea: need to mask when writting endptflush and endptprime
usb: musb: correct use of schedule_delayed_work()
usb: phy: msm: fix compilation errors when !CONFIG_PM_SLEEP
usb: gadget: fix NULL pointer dereference
usb: gadget: printer: using gadget_is_otg to check otg support at runtime
phy: let phy_provider_register be the last step in registering PHY
phy-core: Don't allow building phy-core as a module
phy-core: Don't propagate -ENOSUPP from phy_pm_runtime_get_sync to caller
phy-core: phy_get: Leave error logging to the caller
phy,phy-bcm-kona-usb2.c: Add dependency on HAS_IOMEM
usb: musb: correct use of schedule_delayed_work()
usb: musb: do not sleep in atomic context
USB: serial: option: blacklist interface 4 for Cinterion PHS8 and PXS8
USB: EHCI: add delay during suspend to prevent erroneous wakeups
usb: gadget: bcm63xx_udc: fix build failure on DMA channel code
usb: musb: do not sleep in atomic context
usb: gadget: s3c2410_udc: Fix build error
usb: musb: core: Fix remote-wakeup resume
usb: musb: host: Fix SuperSpeed hub enumeration
usb: musb: fix obex in g_nokia.ko causing kernel panic
+159
-111
+2
-1
drivers/phy/Kconfig
+2
-1
drivers/phy/Kconfig
···
5
5
menu "PHY Subsystem"
6
6
7
7
config GENERIC_PHY
8
-
tristate "PHY Core"
8
+
bool "PHY Core"
9
9
help
10
10
Generic PHY support.
11
11
···
61
61
config BCM_KONA_USB2_PHY
62
62
tristate "Broadcom Kona USB2 PHY Driver"
63
63
depends on GENERIC_PHY
64
+
depends on HAS_IOMEM
64
65
help
65
66
Enable this to support the Broadcom Kona USB 2.0 PHY.
66
67
+6
-8
drivers/phy/phy-core.c
+6
-8
drivers/phy/phy-core.c
···
176
176
dev_err(&phy->dev, "phy init failed --> %d\n", ret);
177
177
goto out;
178
178
}
179
+
} else {
180
+
ret = 0; /* Override possible ret == -ENOTSUPP */
179
181
}
180
182
++phy->init_count;
181
183
···
234
232
dev_err(&phy->dev, "phy poweron failed --> %d\n", ret);
235
233
goto out;
236
234
}
235
+
} else {
236
+
ret = 0; /* Override possible ret == -ENOTSUPP */
237
237
}
238
238
++phy->power_count;
239
239
mutex_unlock(&phy->mutex);
···
408
404
index = of_property_match_string(dev->of_node, "phy-names",
409
405
string);
410
406
phy = of_phy_get(dev, index);
411
-
if (IS_ERR(phy)) {
412
-
dev_err(dev, "unable to find phy\n");
413
-
return phy;
414
-
}
415
407
} else {
416
408
phy = phy_lookup(dev, string);
417
-
if (IS_ERR(phy)) {
418
-
dev_err(dev, "unable to find phy\n");
419
-
return phy;
420
-
}
421
409
}
410
+
if (IS_ERR(phy))
411
+
return phy;
422
412
423
413
if (!try_module_get(phy->ops->owner))
424
414
return ERR_PTR(-EPROBE_DEFER);
+4
-4
drivers/phy/phy-exynos-dp-video.c
+4
-4
drivers/phy/phy-exynos-dp-video.c
···
76
76
if (IS_ERR(state->regs))
77
77
return PTR_ERR(state->regs);
78
78
79
-
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
80
-
if (IS_ERR(phy_provider))
81
-
return PTR_ERR(phy_provider);
82
-
83
79
phy = devm_phy_create(dev, &exynos_dp_video_phy_ops, NULL);
84
80
if (IS_ERR(phy)) {
85
81
dev_err(dev, "failed to create Display Port PHY\n");
86
82
return PTR_ERR(phy);
87
83
}
88
84
phy_set_drvdata(phy, state);
85
+
86
+
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
87
+
if (IS_ERR(phy_provider))
88
+
return PTR_ERR(phy_provider);
89
89
90
90
return 0;
91
91
}
+5
-5
drivers/phy/phy-exynos-mipi-video.c
+5
-5
drivers/phy/phy-exynos-mipi-video.c
···
134
134
dev_set_drvdata(dev, state);
135
135
spin_lock_init(&state->slock);
136
136
137
-
phy_provider = devm_of_phy_provider_register(dev,
138
-
exynos_mipi_video_phy_xlate);
139
-
if (IS_ERR(phy_provider))
140
-
return PTR_ERR(phy_provider);
141
-
142
137
for (i = 0; i < EXYNOS_MIPI_PHYS_NUM; i++) {
143
138
struct phy *phy = devm_phy_create(dev,
144
139
&exynos_mipi_video_phy_ops, NULL);
···
146
151
state->phys[i].index = i;
147
152
phy_set_drvdata(phy, &state->phys[i]);
148
153
}
154
+
155
+
phy_provider = devm_of_phy_provider_register(dev,
156
+
exynos_mipi_video_phy_xlate);
157
+
if (IS_ERR(phy_provider))
158
+
return PTR_ERR(phy_provider);
149
159
150
160
return 0;
151
161
}
+5
-5
drivers/phy/phy-mvebu-sata.c
+5
-5
drivers/phy/phy-mvebu-sata.c
···
99
99
if (IS_ERR(priv->clk))
100
100
return PTR_ERR(priv->clk);
101
101
102
-
phy_provider = devm_of_phy_provider_register(&pdev->dev,
103
-
of_phy_simple_xlate);
104
-
if (IS_ERR(phy_provider))
105
-
return PTR_ERR(phy_provider);
106
-
107
102
phy = devm_phy_create(&pdev->dev, &phy_mvebu_sata_ops, NULL);
108
103
if (IS_ERR(phy))
109
104
return PTR_ERR(phy);
110
105
111
106
phy_set_drvdata(phy, priv);
107
+
108
+
phy_provider = devm_of_phy_provider_register(&pdev->dev,
109
+
of_phy_simple_xlate);
110
+
if (IS_ERR(phy_provider))
111
+
return PTR_ERR(phy_provider);
112
112
113
113
/* The boot loader may of left it on. Turn it off. */
114
114
phy_mvebu_sata_power_off(phy);
+5
-5
drivers/phy/phy-omap-usb2.c
+5
-5
drivers/phy/phy-omap-usb2.c
···
177
177
phy->phy.otg = otg;
178
178
phy->phy.type = USB_PHY_TYPE_USB2;
179
179
180
-
phy_provider = devm_of_phy_provider_register(phy->dev,
181
-
of_phy_simple_xlate);
182
-
if (IS_ERR(phy_provider))
183
-
return PTR_ERR(phy_provider);
184
-
185
180
control_node = of_parse_phandle(node, "ctrl-module", 0);
186
181
if (!control_node) {
187
182
dev_err(&pdev->dev, "Failed to get control device phandle\n");
···
208
213
return PTR_ERR(generic_phy);
209
214
210
215
phy_set_drvdata(generic_phy, phy);
216
+
217
+
phy_provider = devm_of_phy_provider_register(phy->dev,
218
+
of_phy_simple_xlate);
219
+
if (IS_ERR(phy_provider))
220
+
return PTR_ERR(phy_provider);
211
221
212
222
phy->wkupclk = devm_clk_get(phy->dev, "usb_phy_cm_clk32k");
213
223
if (IS_ERR(phy->wkupclk)) {
+5
-5
drivers/phy/phy-twl4030-usb.c
+5
-5
drivers/phy/phy-twl4030-usb.c
···
695
695
otg->set_host = twl4030_set_host;
696
696
otg->set_peripheral = twl4030_set_peripheral;
697
697
698
-
phy_provider = devm_of_phy_provider_register(twl->dev,
699
-
of_phy_simple_xlate);
700
-
if (IS_ERR(phy_provider))
701
-
return PTR_ERR(phy_provider);
702
-
703
698
phy = devm_phy_create(twl->dev, &ops, init_data);
704
699
if (IS_ERR(phy)) {
705
700
dev_dbg(&pdev->dev, "Failed to create PHY\n");
···
702
707
}
703
708
704
709
phy_set_drvdata(phy, twl);
710
+
711
+
phy_provider = devm_of_phy_provider_register(twl->dev,
712
+
of_phy_simple_xlate);
713
+
if (IS_ERR(phy_provider))
714
+
return PTR_ERR(phy_provider);
705
715
706
716
/* init spinlock for workqueue */
707
717
spin_lock_init(&twl->lock);
+2
-2
drivers/usb/chipidea/udc.c
+2
-2
drivers/usb/chipidea/udc.c
···
105
105
106
106
do {
107
107
/* flush any pending transfer */
108
-
hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n));
108
+
hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
109
109
while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
110
110
cpu_relax();
111
111
} while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
···
205
205
if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
206
206
return -EAGAIN;
207
207
208
-
hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n));
208
+
hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
209
209
210
210
while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
211
211
cpu_relax();
+32
-26
drivers/usb/gadget/bcm63xx_udc.c
+32
-26
drivers/usb/gadget/bcm63xx_udc.c
···
360
360
bcm_writel(val, udc->iudma_regs + off);
361
361
}
362
362
363
-
static inline u32 usb_dmac_readl(struct bcm63xx_udc *udc, u32 off)
363
+
static inline u32 usb_dmac_readl(struct bcm63xx_udc *udc, u32 off, int chan)
364
364
{
365
-
return bcm_readl(udc->iudma_regs + IUDMA_DMAC_OFFSET + off);
365
+
return bcm_readl(udc->iudma_regs + IUDMA_DMAC_OFFSET + off +
366
+
(ENETDMA_CHAN_WIDTH * chan));
366
367
}
367
368
368
-
static inline void usb_dmac_writel(struct bcm63xx_udc *udc, u32 val, u32 off)
369
+
static inline void usb_dmac_writel(struct bcm63xx_udc *udc, u32 val, u32 off,
370
+
int chan)
369
371
{
370
-
bcm_writel(val, udc->iudma_regs + IUDMA_DMAC_OFFSET + off);
372
+
bcm_writel(val, udc->iudma_regs + IUDMA_DMAC_OFFSET + off +
373
+
(ENETDMA_CHAN_WIDTH * chan));
371
374
}
372
375
373
-
static inline u32 usb_dmas_readl(struct bcm63xx_udc *udc, u32 off)
376
+
static inline u32 usb_dmas_readl(struct bcm63xx_udc *udc, u32 off, int chan)
374
377
{
375
-
return bcm_readl(udc->iudma_regs + IUDMA_DMAS_OFFSET + off);
378
+
return bcm_readl(udc->iudma_regs + IUDMA_DMAS_OFFSET + off +
379
+
(ENETDMA_CHAN_WIDTH * chan));
376
380
}
377
381
378
-
static inline void usb_dmas_writel(struct bcm63xx_udc *udc, u32 val, u32 off)
382
+
static inline void usb_dmas_writel(struct bcm63xx_udc *udc, u32 val, u32 off,
383
+
int chan)
379
384
{
380
-
bcm_writel(val, udc->iudma_regs + IUDMA_DMAS_OFFSET + off);
385
+
bcm_writel(val, udc->iudma_regs + IUDMA_DMAS_OFFSET + off +
386
+
(ENETDMA_CHAN_WIDTH * chan));
381
387
}
382
388
383
389
static inline void set_clocks(struct bcm63xx_udc *udc, bool is_enabled)
···
644
638
} while (!last_bd);
645
639
646
640
usb_dmac_writel(udc, ENETDMAC_CHANCFG_EN_MASK,
647
-
ENETDMAC_CHANCFG_REG(iudma->ch_idx));
641
+
ENETDMAC_CHANCFG_REG, iudma->ch_idx);
648
642
}
649
643
650
644
/**
···
700
694
bcm63xx_fifo_reset_ep(udc, max(0, iudma->ep_num));
701
695
702
696
/* stop DMA, then wait for the hardware to wrap up */
703
-
usb_dmac_writel(udc, 0, ENETDMAC_CHANCFG_REG(ch_idx));
697
+
usb_dmac_writel(udc, 0, ENETDMAC_CHANCFG_REG, ch_idx);
704
698
705
-
while (usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG(ch_idx)) &
699
+
while (usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG, ch_idx) &
706
700
ENETDMAC_CHANCFG_EN_MASK) {
707
701
udelay(1);
708
702
···
719
713
dev_warn(udc->dev, "forcibly halting IUDMA channel %d\n",
720
714
ch_idx);
721
715
usb_dmac_writel(udc, ENETDMAC_CHANCFG_BUFHALT_MASK,
722
-
ENETDMAC_CHANCFG_REG(ch_idx));
716
+
ENETDMAC_CHANCFG_REG, ch_idx);
723
717
}
724
718
}
725
-
usb_dmac_writel(udc, ~0, ENETDMAC_IR_REG(ch_idx));
719
+
usb_dmac_writel(udc, ~0, ENETDMAC_IR_REG, ch_idx);
726
720
727
721
/* don't leave "live" HW-owned entries for the next guy to step on */
728
722
for (d = iudma->bd_ring; d <= iudma->end_bd; d++)
···
734
728
735
729
/* set up IRQs, UBUS burst size, and BD base for this channel */
736
730
usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK,
737
-
ENETDMAC_IRMASK_REG(ch_idx));
738
-
usb_dmac_writel(udc, 8, ENETDMAC_MAXBURST_REG(ch_idx));
731
+
ENETDMAC_IRMASK_REG, ch_idx);
732
+
usb_dmac_writel(udc, 8, ENETDMAC_MAXBURST_REG, ch_idx);
739
733
740
-
usb_dmas_writel(udc, iudma->bd_ring_dma, ENETDMAS_RSTART_REG(ch_idx));
741
-
usb_dmas_writel(udc, 0, ENETDMAS_SRAM2_REG(ch_idx));
734
+
usb_dmas_writel(udc, iudma->bd_ring_dma, ENETDMAS_RSTART_REG, ch_idx);
735
+
usb_dmas_writel(udc, 0, ENETDMAS_SRAM2_REG, ch_idx);
742
736
}
743
737
744
738
/**
···
2041
2035
spin_lock(&udc->lock);
2042
2036
2043
2037
usb_dmac_writel(udc, ENETDMAC_IR_BUFDONE_MASK,
2044
-
ENETDMAC_IR_REG(iudma->ch_idx));
2038
+
ENETDMAC_IR_REG, iudma->ch_idx);
2045
2039
bep = iudma->bep;
2046
2040
rc = iudma_read(udc, iudma);
2047
2041
···
2181
2175
seq_printf(s, " [ep%d]:\n",
2182
2176
max_t(int, iudma_defaults[ch_idx].ep_num, 0));
2183
2177
seq_printf(s, " cfg: %08x; irqstat: %08x; irqmask: %08x; maxburst: %08x\n",
2184
-
usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG(ch_idx)),
2185
-
usb_dmac_readl(udc, ENETDMAC_IR_REG(ch_idx)),
2186
-
usb_dmac_readl(udc, ENETDMAC_IRMASK_REG(ch_idx)),
2187
-
usb_dmac_readl(udc, ENETDMAC_MAXBURST_REG(ch_idx)));
2178
+
usb_dmac_readl(udc, ENETDMAC_CHANCFG_REG, ch_idx),
2179
+
usb_dmac_readl(udc, ENETDMAC_IR_REG, ch_idx),
2180
+
usb_dmac_readl(udc, ENETDMAC_IRMASK_REG, ch_idx),
2181
+
usb_dmac_readl(udc, ENETDMAC_MAXBURST_REG, ch_idx));
2188
2182
2189
-
sram2 = usb_dmas_readl(udc, ENETDMAS_SRAM2_REG(ch_idx));
2190
-
sram3 = usb_dmas_readl(udc, ENETDMAS_SRAM3_REG(ch_idx));
2183
+
sram2 = usb_dmas_readl(udc, ENETDMAS_SRAM2_REG, ch_idx);
2184
+
sram3 = usb_dmas_readl(udc, ENETDMAS_SRAM3_REG, ch_idx);
2191
2185
seq_printf(s, " base: %08x; index: %04x_%04x; desc: %04x_%04x %08x\n",
2192
-
usb_dmas_readl(udc, ENETDMAS_RSTART_REG(ch_idx)),
2186
+
usb_dmas_readl(udc, ENETDMAS_RSTART_REG, ch_idx),
2193
2187
sram2 >> 16, sram2 & 0xffff,
2194
2188
sram3 >> 16, sram3 & 0xffff,
2195
-
usb_dmas_readl(udc, ENETDMAS_SRAM4_REG(ch_idx)));
2189
+
usb_dmas_readl(udc, ENETDMAS_SRAM4_REG, ch_idx));
2196
2190
seq_printf(s, " desc: %d/%d used", iudma->n_bds_used,
2197
2191
iudma->n_bds);
2198
2192
+6
-1
drivers/usb/gadget/f_fs.c
+6
-1
drivers/usb/gadget/f_fs.c
···
585
585
char __user *buf, size_t len, int read)
586
586
{
587
587
struct ffs_epfile *epfile = file->private_data;
588
-
struct usb_gadget *gadget = epfile->ffs->gadget;
589
588
struct ffs_ep *ep;
590
589
char *data = NULL;
591
590
ssize_t ret, data_len;
···
620
621
621
622
/* Allocate & copy */
622
623
if (!halt) {
624
+
/*
625
+
* if we _do_ wait above, the epfile->ffs->gadget might be NULL
626
+
* before the waiting completes, so do not assign to 'gadget' earlier
627
+
*/
628
+
struct usb_gadget *gadget = epfile->ffs->gadget;
629
+
623
630
/*
624
631
* Controller may require buffer size to be aligned to
625
632
* maxpacketsize of an out endpoint.
+1
-1
drivers/usb/gadget/printer.c
+1
-1
drivers/usb/gadget/printer.c
···
1157
1157
1158
1158
usb_gadget_set_selfpowered(gadget);
1159
1159
1160
-
if (gadget->is_otg) {
1160
+
if (gadget_is_otg(gadget)) {
1161
1161
otg_descriptor.bmAttributes |= USB_OTG_HNP;
1162
1162
printer_cfg_driver.descriptors = otg_desc;
1163
1163
printer_cfg_driver.bmAttributes |= USB_CONFIG_ATT_WAKEUP;
+1
-1
drivers/usb/gadget/s3c2410_udc.c
+1
-1
drivers/usb/gadget/s3c2410_udc.c
+22
-4
drivers/usb/host/ehci-hub.c
+22
-4
drivers/usb/host/ehci-hub.c
···
238
238
int port;
239
239
int mask;
240
240
int changed;
241
+
bool fs_idle_delay;
241
242
242
243
ehci_dbg(ehci, "suspend root hub\n");
243
244
···
273
272
ehci->bus_suspended = 0;
274
273
ehci->owned_ports = 0;
275
274
changed = 0;
275
+
fs_idle_delay = false;
276
276
port = HCS_N_PORTS(ehci->hcs_params);
277
277
while (port--) {
278
278
u32 __iomem *reg = &ehci->regs->port_status [port];
···
302
300
}
303
301
304
302
if (t1 != t2) {
303
+
/*
304
+
* On some controllers, Wake-On-Disconnect will
305
+
* generate false wakeup signals until the bus
306
+
* switches over to full-speed idle. For their
307
+
* sake, add a delay if we need one.
308
+
*/
309
+
if ((t2 & PORT_WKDISC_E) &&
310
+
ehci_port_speed(ehci, t2) ==
311
+
USB_PORT_STAT_HIGH_SPEED)
312
+
fs_idle_delay = true;
305
313
ehci_writel(ehci, t2, reg);
306
314
changed = 1;
307
315
}
308
316
}
317
+
spin_unlock_irq(&ehci->lock);
318
+
319
+
if ((changed && ehci->has_tdi_phy_lpm) || fs_idle_delay) {
320
+
/*
321
+
* Wait for HCD to enter low-power mode or for the bus
322
+
* to switch to full-speed idle.
323
+
*/
324
+
usleep_range(5000, 5500);
325
+
}
309
326
310
327
if (changed && ehci->has_tdi_phy_lpm) {
311
-
spin_unlock_irq(&ehci->lock);
312
-
msleep(5); /* 5 ms for HCD to enter low-power mode */
313
328
spin_lock_irq(&ehci->lock);
314
-
315
329
port = HCS_N_PORTS(ehci->hcs_params);
316
330
while (port--) {
317
331
u32 __iomem *hostpc_reg = &ehci->regs->hostpc[port];
···
340
322
port, (t3 & HOSTPC_PHCD) ?
341
323
"succeeded" : "failed");
342
324
}
325
+
spin_unlock_irq(&ehci->lock);
343
326
}
344
-
spin_unlock_irq(&ehci->lock);
345
327
346
328
/* Apparently some devices need a >= 1-uframe delay here */
347
329
if (ehci->bus_suspended)
+13
-2
drivers/usb/musb/musb_core.c
+13
-2
drivers/usb/musb/musb_core.c
···
477
477
musb->port1_status |=
478
478
(USB_PORT_STAT_C_SUSPEND << 16)
479
479
| MUSB_PORT_STAT_RESUME;
480
+
musb->rh_timer = jiffies
481
+
+ msecs_to_jiffies(20);
480
482
schedule_delayed_work(
481
-
&musb->finish_resume_work, 20);
483
+
&musb->finish_resume_work,
484
+
msecs_to_jiffies(20));
482
485
483
486
musb->xceiv->state = OTG_STATE_A_HOST;
484
487
musb->is_active = 1;
···
2160
2157
void __iomem *musb_base = musb->mregs;
2161
2158
void __iomem *ep_target_regs;
2162
2159
void __iomem *epio;
2160
+
u8 power;
2163
2161
2164
2162
musb_writew(musb_base, MUSB_FRAME, musb->context.frame);
2165
2163
musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode);
2166
2164
musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl);
2167
-
musb_writeb(musb_base, MUSB_POWER, musb->context.power);
2165
+
2166
+
/* Don't affect SUSPENDM/RESUME bits in POWER reg */
2167
+
power = musb_readb(musb_base, MUSB_POWER);
2168
+
power &= MUSB_POWER_SUSPENDM | MUSB_POWER_RESUME;
2169
+
musb->context.power &= ~(MUSB_POWER_SUSPENDM | MUSB_POWER_RESUME);
2170
+
power |= musb->context.power;
2171
+
musb_writeb(musb_base, MUSB_POWER, power);
2172
+
2168
2173
musb_writew(musb_base, MUSB_INTRTXE, musb->intrtxe);
2169
2174
musb_writew(musb_base, MUSB_INTRRXE, musb->intrrxe);
2170
2175
musb_writeb(musb_base, MUSB_INTRUSBE, musb->context.intrusbe);
+3
drivers/usb/musb/musb_host.c
+3
drivers/usb/musb/musb_host.c
+19
-7
drivers/usb/musb/musb_virthub.c
+19
-7
drivers/usb/musb/musb_virthub.c
···
135
135
136
136
/* later, GetPortStatus will stop RESUME signaling */
137
137
musb->port1_status |= MUSB_PORT_STAT_RESUME;
138
-
schedule_delayed_work(&musb->finish_resume_work, 20);
138
+
schedule_delayed_work(&musb->finish_resume_work,
139
+
msecs_to_jiffies(20));
139
140
}
140
141
}
141
142
···
159
158
*/
160
159
power = musb_readb(mbase, MUSB_POWER);
161
160
if (do_reset) {
162
-
163
161
/*
164
162
* If RESUME is set, we must make sure it stays minimum 20 ms.
165
163
* Then we must clear RESUME and wait a bit to let musb start
···
167
167
* detected".
168
168
*/
169
169
if (power & MUSB_POWER_RESUME) {
170
-
while (time_before(jiffies, musb->rh_timer))
171
-
msleep(1);
170
+
long remain = (unsigned long) musb->rh_timer - jiffies;
171
+
172
+
if (musb->rh_timer > 0 && remain > 0) {
173
+
/* take into account the minimum delay after resume */
174
+
schedule_delayed_work(
175
+
&musb->deassert_reset_work, remain);
176
+
return;
177
+
}
178
+
172
179
musb_writeb(mbase, MUSB_POWER,
173
-
power & ~MUSB_POWER_RESUME);
174
-
msleep(1);
180
+
power & ~MUSB_POWER_RESUME);
181
+
182
+
/* Give the core 1 ms to clear MUSB_POWER_RESUME */
183
+
schedule_delayed_work(&musb->deassert_reset_work,
184
+
msecs_to_jiffies(1));
185
+
return;
175
186
}
176
187
177
188
power &= 0xf0;
···
191
180
192
181
musb->port1_status |= USB_PORT_STAT_RESET;
193
182
musb->port1_status &= ~USB_PORT_STAT_ENABLE;
194
-
schedule_delayed_work(&musb->deassert_reset_work, 50);
183
+
schedule_delayed_work(&musb->deassert_reset_work,
184
+
msecs_to_jiffies(50));
195
185
} else {
196
186
dev_dbg(musb->controller, "root port reset stopped\n");
197
187
musb_writeb(mbase, MUSB_POWER,
-2
drivers/usb/musb/omap2430.c
-2
drivers/usb/musb/omap2430.c
···
659
659
OTG_INTERFSEL);
660
660
661
661
omap2430_low_level_exit(musb);
662
-
phy_power_off(musb->phy);
663
662
}
664
663
665
664
return 0;
···
673
674
omap2430_low_level_init(musb);
674
675
musb_writel(musb->mregs, OTG_INTERFSEL,
675
676
musb->context.otg_interfsel);
676
-
phy_power_on(musb->phy);
677
677
}
678
678
679
679
return 0;
+26
-31
drivers/usb/phy/phy-msm-usb.c
+26
-31
drivers/usb/phy/phy-msm-usb.c
···
159
159
return rc;
160
160
}
161
161
162
-
#ifdef CONFIG_PM_SLEEP
163
-
#define USB_PHY_SUSP_DIG_VOL 500000
164
-
static int msm_hsusb_config_vddcx(int high)
165
-
{
166
-
int max_vol = USB_PHY_VDD_DIG_VOL_MAX;
167
-
int min_vol;
168
-
int ret;
169
-
170
-
if (high)
171
-
min_vol = USB_PHY_VDD_DIG_VOL_MIN;
172
-
else
173
-
min_vol = USB_PHY_SUSP_DIG_VOL;
174
-
175
-
ret = regulator_set_voltage(hsusb_vddcx, min_vol, max_vol);
176
-
if (ret) {
177
-
pr_err("%s: unable to set the voltage for regulator "
178
-
"HSUSB_VDDCX\n", __func__);
179
-
return ret;
180
-
}
181
-
182
-
pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
183
-
184
-
return ret;
185
-
}
186
-
#endif
187
-
188
162
static int msm_hsusb_ldo_set_mode(int on)
189
163
{
190
164
int ret = 0;
···
414
440
#define PHY_SUSPEND_TIMEOUT_USEC (500 * 1000)
415
441
#define PHY_RESUME_TIMEOUT_USEC (100 * 1000)
416
442
417
-
#ifdef CONFIG_PM_SLEEP
443
+
#ifdef CONFIG_PM
444
+
445
+
#define USB_PHY_SUSP_DIG_VOL 500000
446
+
static int msm_hsusb_config_vddcx(int high)
447
+
{
448
+
int max_vol = USB_PHY_VDD_DIG_VOL_MAX;
449
+
int min_vol;
450
+
int ret;
451
+
452
+
if (high)
453
+
min_vol = USB_PHY_VDD_DIG_VOL_MIN;
454
+
else
455
+
min_vol = USB_PHY_SUSP_DIG_VOL;
456
+
457
+
ret = regulator_set_voltage(hsusb_vddcx, min_vol, max_vol);
458
+
if (ret) {
459
+
pr_err("%s: unable to set the voltage for regulator "
460
+
"HSUSB_VDDCX\n", __func__);
461
+
return ret;
462
+
}
463
+
464
+
pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
465
+
466
+
return ret;
467
+
}
468
+
418
469
static int msm_otg_suspend(struct msm_otg *motg)
419
470
{
420
471
struct usb_phy *phy = &motg->phy;
···
1732
1733
}
1733
1734
#endif
1734
1735
1735
-
#ifdef CONFIG_PM
1736
1736
static const struct dev_pm_ops msm_otg_dev_pm_ops = {
1737
1737
SET_SYSTEM_SLEEP_PM_OPS(msm_otg_pm_suspend, msm_otg_pm_resume)
1738
1738
SET_RUNTIME_PM_OPS(msm_otg_runtime_suspend, msm_otg_runtime_resume,
1739
1739
msm_otg_runtime_idle)
1740
1740
};
1741
-
#endif
1742
1741
1743
1742
static struct platform_driver msm_otg_driver = {
1744
1743
.remove = msm_otg_remove,
1745
1744
.driver = {
1746
1745
.name = DRIVER_NAME,
1747
1746
.owner = THIS_MODULE,
1748
-
#ifdef CONFIG_PM
1749
1747
.pm = &msm_otg_dev_pm_ops,
1750
-
#endif
1751
1748
},
1752
1749
};
1753
1750
+2
-1
drivers/usb/serial/option.c
+2
-1
drivers/usb/serial/option.c
···
1526
1526
/* Cinterion */
1527
1527
{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_EU3_E) },
1528
1528
{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_EU3_P) },
1529
-
{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_PH8) },
1529
+
{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_PH8),
1530
+
.driver_info = (kernel_ulong_t)&net_intf4_blacklist },
1530
1531
{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_AHXX) },
1531
1532
{ USB_DEVICE(CINTERION_VENDOR_ID, CINTERION_PRODUCT_PLXX),
1532
1533
.driver_info = (kernel_ulong_t)&net_intf4_blacklist },