ASoC: microchip: some cleanups for AT91 sound drivers

+7 -2

MAINTAINERS

··· 13618 13618 F: drivers/spi/spi-at91-usart.c 13619 13619 13620 13620 MICROCHIP AUDIO ASOC DRIVERS 13621 - M: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> 13621 + M: Claudiu Beznea <claudiu.beznea@microchip.com> 13622 13622 L: alsa-devel@alsa-project.org (moderated for non-subscribers) 13623 13623 S: Supported 13624 + F: Documentation/devicetree/bindings/sound/atmel* 13625 + F: Documentation/devicetree/bindings/sound/axentia,tse850-pcm5142.txt 13626 + F: Documentation/devicetree/bindings/sound/microchip,sama7g5-* 13627 + F: Documentation/devicetree/bindings/sound/mikroe,mikroe-proto.txt 13624 13628 F: sound/soc/atmel 13625 13629 13626 13630 MICROCHIP CSI2DC DRIVER ··· 13797 13793 F: drivers/spi/spi-atmel.* 13798 13794 13799 13795 MICROCHIP SSC DRIVER 13800 - M: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> 13796 + M: Claudiu Beznea <claudiu.beznea@microchip.com> 13801 13797 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 13802 13798 S: Supported 13799 + F: Documentation/devicetree/bindings/misc/atmel-ssc.txt 13803 13800 F: drivers/misc/atmel-ssc.c 13804 13801 F: include/linux/atmel-ssc.h 13805 13802

+7 -12

sound/soc/atmel/mchp-pdmc.c

··· 8 8 9 9 #include <dt-bindings/sound/microchip,pdmc.h> 10 10 11 + #include <linux/bitfield.h> 11 12 #include <linux/clk.h> 12 13 #include <linux/module.h> 13 14 #include <linux/of.h> ··· 50 49 #define MCHP_PDMC_MR_OSR256 (3 << 16) 51 50 52 51 #define MCHP_PDMC_MR_SINCORDER_MASK GENMASK(23, 20) 53 - #define MCHP_PDMC_MR_SINCORDER(order) (((order) << 20) & \ 54 - MCHP_PDMC_MR_SINCORDER_MASK) 55 52 56 53 #define MCHP_PDMC_MR_SINC_OSR_MASK GENMASK(27, 24) 57 54 #define MCHP_PDMC_MR_SINC_OSR_DIS (0 << 24) ··· 61 62 #define MCHP_PDMC_MR_SINC_OSR_256 (6 << 24) 62 63 63 64 #define MCHP_PDMC_MR_CHUNK_MASK GENMASK(31, 28) 64 - #define MCHP_PDMC_MR_CHUNK(chunk) (((chunk) << 28) & \ 65 - MCHP_PDMC_MR_CHUNK_MASK) 66 65 67 66 /* 68 67 * ---- Configuration Register (Read/Write) ---- ··· 614 617 615 618 mr_val |= mchp_pdmc_mr_set_osr(dd->audio_filter_en, osr); 616 619 617 - mr_val |= MCHP_PDMC_MR_SINCORDER(dd->sinc_order); 620 + mr_val |= FIELD_PREP(MCHP_PDMC_MR_SINCORDER_MASK, dd->sinc_order); 618 621 619 622 dd->addr.maxburst = mchp_pdmc_period_to_maxburst(snd_pcm_lib_period_bytes(substream)); 620 - mr_val |= MCHP_PDMC_MR_CHUNK(dd->addr.maxburst); 623 + mr_val |= FIELD_PREP(MCHP_PDMC_MR_CHUNK_MASK, dd->addr.maxburst); 621 624 dev_dbg(comp->dev, "maxburst set to %d\n", dd->addr.maxburst); 622 625 623 626 snd_soc_component_update_bits(comp, MCHP_PDMC_MR, ··· 759 762 int ret; 760 763 761 764 ret = mchp_pdmc_add_chmap_ctls(rtd->pcm, dd); 762 - if (ret < 0) { 765 + if (ret < 0) 763 766 dev_err(dd->dev, "failed to add channel map controls: %d\n", ret); 764 - return ret; 765 - } 766 767 767 - return 0; 768 + return ret; 768 769 } 769 770 770 771 static struct snd_soc_dai_driver mchp_pdmc_dai = { ··· 783 788 /* PDMC interrupt handler */ 784 789 static irqreturn_t mchp_pdmc_interrupt(int irq, void *dev_id) 785 790 { 786 - struct mchp_pdmc *dd = (struct mchp_pdmc *)dev_id; 791 + struct mchp_pdmc *dd = dev_id; 787 792 u32 isr, msr, pending; 788 793 irqreturn_t ret = IRQ_NONE; 789 794 ··· 1077 1082 } 1078 1083 1079 1084 ret = devm_request_irq(dev, irq, mchp_pdmc_interrupt, 0, 1080 - dev_name(&pdev->dev), (void *)dd); 1085 + dev_name(&pdev->dev), dd); 1081 1086 if (ret < 0) { 1082 1087 dev_err(dev, "can't register ISR for IRQ %u (ret=%i)\n", 1083 1088 irq, ret);

+15 -30

sound/soc/atmel/mchp-spdiftx.c

··· 72 72 73 73 /* Valid Bits per Sample */ 74 74 #define SPDIFTX_MR_VBPS_MASK GENMASK(13, 8) 75 - #define SPDIFTX_MR_VBPS(bps) FIELD_PREP(SPDIFTX_MR_VBPS_MASK, bps) 76 75 77 76 /* Chunk Size */ 78 77 #define SPDIFTX_MR_CHUNK_MASK GENMASK(19, 16) 79 - #define SPDIFTX_MR_CHUNK(size) FIELD_PREP(SPDIFTX_MR_CHUNK_MASK, size) 80 78 81 79 /* Validity Bits for Channels 1 and 2 */ 82 80 #define SPDIFTX_MR_VALID1 BIT(24) ··· 87 89 88 90 /* Bytes per Sample */ 89 91 #define SPDIFTX_MR_BPS_MASK GENMASK(29, 28) 90 - #define SPDIFTX_MR_BPS(bytes) FIELD_PREP(SPDIFTX_MR_BPS_MASK, (bytes - 1)) 91 92 92 93 /* 93 94 * ---- Interrupt Enable/Disable/Mask/Status Register (Write/Read-only) ---- ··· 306 309 { 307 310 struct mchp_spdiftx_dev *dev = snd_soc_dai_get_drvdata(dai); 308 311 struct mchp_spdiftx_mixer_control *ctrl = &dev->control; 309 - u32 mr; 310 - int running; 311 312 int ret; 312 313 313 314 /* do not start/stop while channel status or user data is updated */ 314 315 spin_lock(&ctrl->lock); 315 - regmap_read(dev->regmap, SPDIFTX_MR, &mr); 316 - running = !!(mr & SPDIFTX_MR_TXEN_ENABLE); 317 - 318 316 switch (cmd) { 319 317 case SNDRV_PCM_TRIGGER_RESUME: 320 318 case SNDRV_PCM_TRIGGER_START: ··· 318 326 dev->suspend_irq = 0; 319 327 fallthrough; 320 328 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 321 - if (!running) { 322 - mr &= ~SPDIFTX_MR_TXEN_MASK; 323 - mr |= SPDIFTX_MR_TXEN_ENABLE; 324 - } 329 + ret = regmap_update_bits(dev->regmap, SPDIFTX_MR, SPDIFTX_MR_TXEN_MASK, 330 + SPDIFTX_MR_TXEN_ENABLE); 325 331 break; 326 332 case SNDRV_PCM_TRIGGER_SUSPEND: 327 333 regmap_read(dev->regmap, SPDIFTX_IMR, &dev->suspend_irq); ··· 329 339 SPDIFTX_IR_TXUDR | SPDIFTX_IR_TXOVR); 330 340 fallthrough; 331 341 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 332 - if (running) { 333 - mr &= ~SPDIFTX_MR_TXEN_MASK; 334 - mr |= SPDIFTX_MR_TXEN_DISABLE; 335 - } 342 + ret = regmap_update_bits(dev->regmap, SPDIFTX_MR, SPDIFTX_MR_TXEN_MASK, 343 + SPDIFTX_MR_TXEN_DISABLE); 336 344 break; 337 345 default: 338 - spin_unlock(&ctrl->lock); 339 - return -EINVAL; 346 + ret = -EINVAL; 340 347 } 341 - 342 - ret = regmap_write(dev->regmap, SPDIFTX_MR, mr); 343 348 spin_unlock(&ctrl->lock); 344 349 if (ret) 345 - dev_err(dev->dev, "unable to disable TX: %d\n", ret); 350 + dev_err(dev->dev, "unable to start/stop TX: %d\n", ret); 346 351 347 352 return ret; 348 353 } ··· 387 402 params_channels(params)); 388 403 return -EINVAL; 389 404 } 390 - mr |= SPDIFTX_MR_CHUNK(dev->playback.maxburst); 405 + mr |= FIELD_PREP(SPDIFTX_MR_CHUNK_MASK, dev->playback.maxburst); 391 406 392 407 switch (params_format(params)) { 393 408 case SNDRV_PCM_FORMAT_S8: 394 - mr |= SPDIFTX_MR_VBPS(8); 409 + mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 8); 395 410 break; 396 411 case SNDRV_PCM_FORMAT_S16_BE: 397 412 mr |= SPDIFTX_MR_ENDIAN_BIG; 398 413 fallthrough; 399 414 case SNDRV_PCM_FORMAT_S16_LE: 400 - mr |= SPDIFTX_MR_VBPS(16); 415 + mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 16); 401 416 break; 402 417 case SNDRV_PCM_FORMAT_S18_3BE: 403 418 mr |= SPDIFTX_MR_ENDIAN_BIG; 404 419 fallthrough; 405 420 case SNDRV_PCM_FORMAT_S18_3LE: 406 - mr |= SPDIFTX_MR_VBPS(18); 421 + mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 18); 407 422 break; 408 423 case SNDRV_PCM_FORMAT_S20_3BE: 409 424 mr |= SPDIFTX_MR_ENDIAN_BIG; 410 425 fallthrough; 411 426 case SNDRV_PCM_FORMAT_S20_3LE: 412 - mr |= SPDIFTX_MR_VBPS(20); 427 + mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 20); 413 428 break; 414 429 case SNDRV_PCM_FORMAT_S24_3BE: 415 430 mr |= SPDIFTX_MR_ENDIAN_BIG; 416 431 fallthrough; 417 432 case SNDRV_PCM_FORMAT_S24_3LE: 418 - mr |= SPDIFTX_MR_VBPS(24); 433 + mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 24); 419 434 break; 420 435 case SNDRV_PCM_FORMAT_S24_BE: 421 436 mr |= SPDIFTX_MR_ENDIAN_BIG; 422 437 fallthrough; 423 438 case SNDRV_PCM_FORMAT_S24_LE: 424 - mr |= SPDIFTX_MR_VBPS(24); 439 + mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 24); 425 440 break; 426 441 case SNDRV_PCM_FORMAT_S32_BE: 427 442 mr |= SPDIFTX_MR_ENDIAN_BIG; 428 443 fallthrough; 429 444 case SNDRV_PCM_FORMAT_S32_LE: 430 - mr |= SPDIFTX_MR_VBPS(32); 445 + mr |= FIELD_PREP(SPDIFTX_MR_VBPS_MASK, 32); 431 446 break; 432 447 default: 433 448 dev_err(dev->dev, "unsupported PCM format: %d\n", ··· 435 450 return -EINVAL; 436 451 } 437 452 438 - mr |= SPDIFTX_MR_BPS(bps); 453 + mr |= FIELD_PREP(SPDIFTX_MR_BPS_MASK, bps - 1); 439 454 440 455 switch (params_rate(params)) { 441 456 case 22050:

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