Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'for-4.5-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata
Pull libata fixes from Tejun Heo:
"Assorted fixes for libata drivers.
- Turns out HDIO_GET_32BIT ioctl was subtly broken all along.
- Recent update to ahci external port handling was incorrectly
marking hotpluggable ports as external making userland handle
devices connected to those ports incorrectly.
- ahci_xgene needs its own irq handler to work around a hardware
erratum. libahci updated to allow irq handler override.
- Misc driver specific updates"
* 'for-4.5-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata:
ata: ahci: don't mark HotPlugCapable Ports as external/removable
ahci: Workaround for ThunderX Errata#22536
libata: Align ata_device's id on a cacheline
Adding Intel Lewisburg device IDs for SATA
pata-rb532-cf: get rid of the irq_to_gpio() call
libata: fix HDIO_GET_32BIT ioctl
ahci_xgene: Implement the workaround to fix the missing of the edge interrupt for the HOST_IRQ_STAT.
ata: Remove the AHCI_HFLAG_EDGE_IRQ support from libahci.
libahci: Implement the capability to override the generic ahci interrupt handler.
+171
-59
+49
drivers/ata/ahci.c
+49
drivers/ata/ahci.c
···
367
367
{ PCI_VDEVICE(INTEL, 0xa107), board_ahci }, /* Sunrise Point-H RAID */
368
368
{ PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */
369
369
{ PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* Lewisburg RAID*/
370
+
{ PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Lewisburg AHCI*/
370
371
{ PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* Lewisburg RAID*/
372
+
{ PCI_VDEVICE(INTEL, 0x2827), board_ahci }, /* Lewisburg RAID*/
371
373
{ PCI_VDEVICE(INTEL, 0xa182), board_ahci }, /* Lewisburg AHCI*/
372
374
{ PCI_VDEVICE(INTEL, 0xa184), board_ahci }, /* Lewisburg RAID*/
373
375
{ PCI_VDEVICE(INTEL, 0xa186), board_ahci }, /* Lewisburg RAID*/
374
376
{ PCI_VDEVICE(INTEL, 0xa18e), board_ahci }, /* Lewisburg RAID*/
377
+
{ PCI_VDEVICE(INTEL, 0xa1d2), board_ahci }, /* Lewisburg RAID*/
378
+
{ PCI_VDEVICE(INTEL, 0xa1d6), board_ahci }, /* Lewisburg RAID*/
375
379
{ PCI_VDEVICE(INTEL, 0xa202), board_ahci }, /* Lewisburg AHCI*/
376
380
{ PCI_VDEVICE(INTEL, 0xa204), board_ahci }, /* Lewisburg RAID*/
377
381
{ PCI_VDEVICE(INTEL, 0xa206), board_ahci }, /* Lewisburg RAID*/
378
382
{ PCI_VDEVICE(INTEL, 0xa20e), board_ahci }, /* Lewisburg RAID*/
383
+
{ PCI_VDEVICE(INTEL, 0xa252), board_ahci }, /* Lewisburg RAID*/
384
+
{ PCI_VDEVICE(INTEL, 0xa256), board_ahci }, /* Lewisburg RAID*/
379
385
380
386
/* JMicron 360/1/3/5/6, match class to avoid IDE function */
381
387
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
···
1331
1325
{}
1332
1326
#endif
1333
1327
1328
+
#ifdef CONFIG_ARM64
1329
+
/*
1330
+
* Due to ERRATA#22536, ThunderX needs to handle HOST_IRQ_STAT differently.
1331
+
* Workaround is to make sure all pending IRQs are served before leaving
1332
+
* handler.
1333
+
*/
1334
+
static irqreturn_t ahci_thunderx_irq_handler(int irq, void *dev_instance)
1335
+
{
1336
+
struct ata_host *host = dev_instance;
1337
+
struct ahci_host_priv *hpriv;
1338
+
unsigned int rc = 0;
1339
+
void __iomem *mmio;
1340
+
u32 irq_stat, irq_masked;
1341
+
unsigned int handled = 1;
1342
+
1343
+
VPRINTK("ENTER\n");
1344
+
hpriv = host->private_data;
1345
+
mmio = hpriv->mmio;
1346
+
irq_stat = readl(mmio + HOST_IRQ_STAT);
1347
+
if (!irq_stat)
1348
+
return IRQ_NONE;
1349
+
1350
+
do {
1351
+
irq_masked = irq_stat & hpriv->port_map;
1352
+
spin_lock(&host->lock);
1353
+
rc = ahci_handle_port_intr(host, irq_masked);
1354
+
if (!rc)
1355
+
handled = 0;
1356
+
writel(irq_stat, mmio + HOST_IRQ_STAT);
1357
+
irq_stat = readl(mmio + HOST_IRQ_STAT);
1358
+
spin_unlock(&host->lock);
1359
+
} while (irq_stat);
1360
+
VPRINTK("EXIT\n");
1361
+
1362
+
return IRQ_RETVAL(handled);
1363
+
}
1364
+
#endif
1365
+
1334
1366
/*
1335
1367
* ahci_init_msix() - optionally enable per-port MSI-X otherwise defer
1336
1368
* to single msi.
···
1603
1559
/* must set flag prior to save config in order to take effect */
1604
1560
if (ahci_broken_devslp(pdev))
1605
1561
hpriv->flags |= AHCI_HFLAG_NO_DEVSLP;
1562
+
1563
+
#ifdef CONFIG_ARM64
1564
+
if (pdev->vendor == 0x177d && pdev->device == 0xa01c)
1565
+
hpriv->irq_handler = ahci_thunderx_irq_handler;
1566
+
#endif
1606
1567
1607
1568
/* save initial config */
1608
1569
ahci_pci_save_initial_config(pdev, hpriv);
+3
-2
drivers/ata/ahci.h
+3
-2
drivers/ata/ahci.h
···
240
240
error-handling stage) */
241
241
AHCI_HFLAG_NO_DEVSLP = (1 << 17), /* no device sleep */
242
242
AHCI_HFLAG_NO_FBS = (1 << 18), /* no FBS */
243
-
AHCI_HFLAG_EDGE_IRQ = (1 << 19), /* HOST_IRQ_STAT behaves as
244
-
Edge Triggered */
243
+
245
244
#ifdef CONFIG_PCI_MSI
246
245
AHCI_HFLAG_MULTI_MSI = (1 << 20), /* multiple PCI MSIs */
247
246
AHCI_HFLAG_MULTI_MSIX = (1 << 21), /* per-port MSI-X */
···
360
361
* be overridden anytime before the host is activated.
361
362
*/
362
363
void (*start_engine)(struct ata_port *ap);
364
+
irqreturn_t (*irq_handler)(int irq, void *dev_instance);
363
365
};
364
366
365
367
#ifdef CONFIG_PCI_MSI
···
424
424
void ahci_print_info(struct ata_host *host, const char *scc_s);
425
425
int ahci_host_activate(struct ata_host *host, struct scsi_host_template *sht);
426
426
void ahci_error_handler(struct ata_port *ap);
427
+
u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked);
427
428
428
429
static inline void __iomem *__ahci_port_base(struct ata_host *host,
429
430
unsigned int port_no)
+84
-1
drivers/ata/ahci_xgene.c
+84
-1
drivers/ata/ahci_xgene.c
···
548
548
return rc;
549
549
}
550
550
551
+
/**
552
+
* xgene_ahci_handle_broken_edge_irq - Handle the broken irq.
553
+
* @ata_host: Host that recieved the irq
554
+
* @irq_masked: HOST_IRQ_STAT value
555
+
*
556
+
* For hardware with broken edge trigger latch
557
+
* the HOST_IRQ_STAT register misses the edge interrupt
558
+
* when clearing of HOST_IRQ_STAT register and hardware
559
+
* reporting the PORT_IRQ_STAT register at the
560
+
* same clock cycle.
561
+
* As such, the algorithm below outlines the workaround.
562
+
*
563
+
* 1. Read HOST_IRQ_STAT register and save the state.
564
+
* 2. Clear the HOST_IRQ_STAT register.
565
+
* 3. Read back the HOST_IRQ_STAT register.
566
+
* 4. If HOST_IRQ_STAT register equals to zero, then
567
+
* traverse the rest of port's PORT_IRQ_STAT register
568
+
* to check if an interrupt is triggered at that point else
569
+
* go to step 6.
570
+
* 5. If PORT_IRQ_STAT register of rest ports is not equal to zero
571
+
* then update the state of HOST_IRQ_STAT saved in step 1.
572
+
* 6. Handle port interrupts.
573
+
* 7. Exit
574
+
*/
575
+
static int xgene_ahci_handle_broken_edge_irq(struct ata_host *host,
576
+
u32 irq_masked)
577
+
{
578
+
struct ahci_host_priv *hpriv = host->private_data;
579
+
void __iomem *port_mmio;
580
+
int i;
581
+
582
+
if (!readl(hpriv->mmio + HOST_IRQ_STAT)) {
583
+
for (i = 0; i < host->n_ports; i++) {
584
+
if (irq_masked & (1 << i))
585
+
continue;
586
+
587
+
port_mmio = ahci_port_base(host->ports[i]);
588
+
if (readl(port_mmio + PORT_IRQ_STAT))
589
+
irq_masked |= (1 << i);
590
+
}
591
+
}
592
+
593
+
return ahci_handle_port_intr(host, irq_masked);
594
+
}
595
+
596
+
static irqreturn_t xgene_ahci_irq_intr(int irq, void *dev_instance)
597
+
{
598
+
struct ata_host *host = dev_instance;
599
+
struct ahci_host_priv *hpriv;
600
+
unsigned int rc = 0;
601
+
void __iomem *mmio;
602
+
u32 irq_stat, irq_masked;
603
+
604
+
VPRINTK("ENTER\n");
605
+
606
+
hpriv = host->private_data;
607
+
mmio = hpriv->mmio;
608
+
609
+
/* sigh. 0xffffffff is a valid return from h/w */
610
+
irq_stat = readl(mmio + HOST_IRQ_STAT);
611
+
if (!irq_stat)
612
+
return IRQ_NONE;
613
+
614
+
irq_masked = irq_stat & hpriv->port_map;
615
+
616
+
spin_lock(&host->lock);
617
+
618
+
/*
619
+
* HOST_IRQ_STAT behaves as edge triggered latch meaning that
620
+
* it should be cleared before all the port events are cleared.
621
+
*/
622
+
writel(irq_stat, mmio + HOST_IRQ_STAT);
623
+
624
+
rc = xgene_ahci_handle_broken_edge_irq(host, irq_masked);
625
+
626
+
spin_unlock(&host->lock);
627
+
628
+
VPRINTK("EXIT\n");
629
+
630
+
return IRQ_RETVAL(rc);
631
+
}
632
+
551
633
static struct ata_port_operations xgene_ahci_v1_ops = {
552
634
.inherits = &ahci_ops,
553
635
.host_stop = xgene_ahci_host_stop,
···
861
779
hpriv->flags = AHCI_HFLAG_NO_NCQ;
862
780
break;
863
781
case XGENE_AHCI_V2:
864
-
hpriv->flags |= AHCI_HFLAG_YES_FBS | AHCI_HFLAG_EDGE_IRQ;
782
+
hpriv->flags |= AHCI_HFLAG_YES_FBS;
783
+
hpriv->irq_handler = xgene_ahci_irq_intr;
865
784
break;
866
785
default:
867
786
break;
+17
-46
drivers/ata/libahci.c
+17
-46
drivers/ata/libahci.c
···
113
113
const char *buf, size_t size);
114
114
static ssize_t ahci_show_em_supported(struct device *dev,
115
115
struct device_attribute *attr, char *buf);
116
+
static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance);
116
117
117
118
static DEVICE_ATTR(ahci_host_caps, S_IRUGO, ahci_show_host_caps, NULL);
118
119
static DEVICE_ATTR(ahci_host_cap2, S_IRUGO, ahci_show_host_cap2, NULL);
···
513
512
514
513
if (!hpriv->start_engine)
515
514
hpriv->start_engine = ahci_start_engine;
515
+
516
+
if (!hpriv->irq_handler)
517
+
hpriv->irq_handler = ahci_single_level_irq_intr;
516
518
}
517
519
EXPORT_SYMBOL_GPL(ahci_save_initial_config);
518
520
···
1168
1164
1169
1165
/* mark esata ports */
1170
1166
tmp = readl(port_mmio + PORT_CMD);
1171
-
if ((tmp & PORT_CMD_HPCP) ||
1172
-
((tmp & PORT_CMD_ESP) && (hpriv->cap & HOST_CAP_SXS)))
1167
+
if ((tmp & PORT_CMD_ESP) && (hpriv->cap & HOST_CAP_SXS))
1173
1168
ap->pflags |= ATA_PFLAG_EXTERNAL;
1174
1169
}
1175
1170
···
1849
1846
return IRQ_HANDLED;
1850
1847
}
1851
1848
1852
-
static u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked)
1849
+
u32 ahci_handle_port_intr(struct ata_host *host, u32 irq_masked)
1853
1850
{
1854
1851
unsigned int i, handled = 0;
1855
1852
···
1875
1872
1876
1873
return handled;
1877
1874
}
1878
-
1879
-
static irqreturn_t ahci_single_edge_irq_intr(int irq, void *dev_instance)
1880
-
{
1881
-
struct ata_host *host = dev_instance;
1882
-
struct ahci_host_priv *hpriv;
1883
-
unsigned int rc = 0;
1884
-
void __iomem *mmio;
1885
-
u32 irq_stat, irq_masked;
1886
-
1887
-
VPRINTK("ENTER\n");
1888
-
1889
-
hpriv = host->private_data;
1890
-
mmio = hpriv->mmio;
1891
-
1892
-
/* sigh. 0xffffffff is a valid return from h/w */
1893
-
irq_stat = readl(mmio + HOST_IRQ_STAT);
1894
-
if (!irq_stat)
1895
-
return IRQ_NONE;
1896
-
1897
-
irq_masked = irq_stat & hpriv->port_map;
1898
-
1899
-
spin_lock(&host->lock);
1900
-
1901
-
/*
1902
-
* HOST_IRQ_STAT behaves as edge triggered latch meaning that
1903
-
* it should be cleared before all the port events are cleared.
1904
-
*/
1905
-
writel(irq_stat, mmio + HOST_IRQ_STAT);
1906
-
1907
-
rc = ahci_handle_port_intr(host, irq_masked);
1908
-
1909
-
spin_unlock(&host->lock);
1910
-
1911
-
VPRINTK("EXIT\n");
1912
-
1913
-
return IRQ_RETVAL(rc);
1914
-
}
1875
+
EXPORT_SYMBOL_GPL(ahci_handle_port_intr);
1915
1876
1916
1877
static irqreturn_t ahci_single_level_irq_intr(int irq, void *dev_instance)
1917
1878
{
···
2502
2535
int irq = hpriv->irq;
2503
2536
int rc;
2504
2537
2505
-
if (hpriv->flags & (AHCI_HFLAG_MULTI_MSI | AHCI_HFLAG_MULTI_MSIX))
2538
+
if (hpriv->flags & (AHCI_HFLAG_MULTI_MSI | AHCI_HFLAG_MULTI_MSIX)) {
2539
+
if (hpriv->irq_handler)
2540
+
dev_warn(host->dev, "both AHCI_HFLAG_MULTI_MSI flag set \
2541
+
and custom irq handler implemented\n");
2542
+
2506
2543
rc = ahci_host_activate_multi_irqs(host, sht);
2507
-
else if (hpriv->flags & AHCI_HFLAG_EDGE_IRQ)
2508
-
rc = ata_host_activate(host, irq, ahci_single_edge_irq_intr,
2544
+
} else {
2545
+
rc = ata_host_activate(host, irq, hpriv->irq_handler,
2509
2546
IRQF_SHARED, sht);
2510
-
else
2511
-
rc = ata_host_activate(host, irq, ahci_single_level_irq_intr,
2512
-
IRQF_SHARED, sht);
2547
+
}
2548
+
2549
+
2513
2550
return rc;
2514
2551
}
2515
2552
EXPORT_SYMBOL_GPL(ahci_host_activate);
+5
-6
drivers/ata/libata-scsi.c
+5
-6
drivers/ata/libata-scsi.c
···
675
675
int ata_sas_scsi_ioctl(struct ata_port *ap, struct scsi_device *scsidev,
676
676
int cmd, void __user *arg)
677
677
{
678
-
int val = -EINVAL, rc = -EINVAL;
678
+
unsigned long val;
679
+
int rc = -EINVAL;
679
680
unsigned long flags;
680
681
681
682
switch (cmd) {
682
-
case ATA_IOC_GET_IO32:
683
+
case HDIO_GET_32BIT:
683
684
spin_lock_irqsave(ap->lock, flags);
684
685
val = ata_ioc32(ap);
685
686
spin_unlock_irqrestore(ap->lock, flags);
686
-
if (copy_to_user(arg, &val, 1))
687
-
return -EFAULT;
688
-
return 0;
687
+
return put_user(val, (unsigned long __user *)arg);
689
688
690
-
case ATA_IOC_SET_IO32:
689
+
case HDIO_SET_32BIT:
691
690
val = (unsigned long) arg;
692
691
rc = 0;
693
692
spin_lock_irqsave(ap->lock, flags);
+10
-1
drivers/ata/pata_rb532_cf.c
+10
-1
drivers/ata/pata_rb532_cf.c
···
32
32
#include <linux/libata.h>
33
33
#include <scsi/scsi_host.h>
34
34
35
+
#include <asm/mach-rc32434/rb.h>
36
+
35
37
#define DRV_NAME "pata-rb532-cf"
36
38
#define DRV_VERSION "0.1.0"
37
39
#define DRV_DESC "PATA driver for RouterBOARD 532 Compact Flash"
···
109
107
int gpio;
110
108
struct resource *res;
111
109
struct ata_host *ah;
110
+
struct cf_device *pdata;
112
111
struct rb532_cf_info *info;
113
112
int ret;
114
113
···
125
122
return -ENOENT;
126
123
}
127
124
128
-
gpio = irq_to_gpio(irq);
125
+
pdata = dev_get_platdata(&pdev->dev);
126
+
if (!pdata) {
127
+
dev_err(&pdev->dev, "no platform data specified\n");
128
+
return -EINVAL;
129
+
}
130
+
131
+
gpio = pdata->gpio_pin;
129
132
if (gpio < 0) {
130
133
dev_err(&pdev->dev, "no GPIO found for irq%d\n", irq);
131
134
return -ENOENT;
+2
-2
include/linux/ata.h
+2
-2
include/linux/ata.h
+1
-1
include/linux/libata.h
+1
-1
include/linux/libata.h
···
720
720
union {
721
721
u16 id[ATA_ID_WORDS]; /* IDENTIFY xxx DEVICE data */
722
722
u32 gscr[SATA_PMP_GSCR_DWORDS]; /* PMP GSCR block */
723
-
};
723
+
} ____cacheline_aligned;
724
724
725
725
/* DEVSLP Timing Variables from Identify Device Data Log */
726
726
u8 devslp_timing[ATA_LOG_DEVSLP_SIZE];