tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/amd/display: Wire up dcn10_dio_construct() for all pre-DCN401 generations

Description:
- Commit b82f0759346617b2 ("drm/amd/display: Migrate DIO registers access
from hwseq to dio component") moved DIO_MEM_PWR_CTRL register access
behind the new dio abstraction layer but only created the dio object for
DCN 4.01. On all other generations (DCN 10/20/21/201/30/301/302/303/
31/314/315/316/32/321/35/351/36), the dio pointer is NULL, causing the
register write to be silently skipped.

This results in AFMT HDMI memory not being powered on during init_hw,
which can cause HDMI audio failures and display issues on affected
hardware including Renoir/Cezanne (DCN 2.1) APUs that use dcn10_init_hw.

Call dcn10_dio_construct() in each older DCN generation's resource.c
to create the dio object, following the same pattern as DCN 4.01. This
ensures the dio pointer is non-NULL and the mem_pwr_ctrl callback works
through the dio abstraction for all DCN generations.

Fixes: b82f07593466 ("drm/amd/display: Migrate DIO registers access from hwseq to dio component.")
Reviewed-by: Ivan Lipski <ivan.lipski@amd.com>
Signed-off-by: Ionut Nechita <ionut_n2001@yahoo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit a4983968fa5b3179ab090407d325a71cdc96874e)

authored by

Ionut Nechita and committed by
Alex Deucher fc0ed906 512f9f15

+699
+41
drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
··· 71 71 #include "dce/dce_dmcu.h" 72 72 #include "dce/dce_aux.h" 73 73 #include "dce/dce_i2c.h" 74 + #include "dio/dcn10/dcn10_dio.h" 74 75 75 76 #ifndef mmDP0_DP_DPHY_INTERNAL_CTRL 76 77 #define mmDP0_DP_DPHY_INTERNAL_CTRL 0x210f ··· 444 443 static const struct dcn_hubbub_mask hubbub_mask = { 445 444 HUBBUB_MASK_SH_LIST_DCN10(_MASK) 446 445 }; 446 + 447 + static const struct dcn_dio_registers dio_regs = { 448 + DIO_REG_LIST_DCN10() 449 + }; 450 + 451 + #define DIO_MASK_SH_LIST(mask_sh)\ 452 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 453 + 454 + static const struct dcn_dio_shift dio_shift = { 455 + DIO_MASK_SH_LIST(__SHIFT) 456 + }; 457 + 458 + static const struct dcn_dio_mask dio_mask = { 459 + DIO_MASK_SH_LIST(_MASK) 460 + }; 461 + 462 + static struct dio *dcn10_dio_create(struct dc_context *ctx) 463 + { 464 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 465 + 466 + if (!dio10) 467 + return NULL; 468 + 469 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 470 + 471 + return &dio10->base; 472 + } 447 473 448 474 static int map_transmitter_id_to_phy_instance( 449 475 enum transmitter transmitter) ··· 945 917 946 918 kfree(pool->base.hubbub); 947 919 pool->base.hubbub = NULL; 920 + 921 + if (pool->base.dio != NULL) { 922 + kfree(TO_DCN10_DIO(pool->base.dio)); 923 + pool->base.dio = NULL; 924 + } 948 925 949 926 for (i = 0; i < pool->base.pipe_count; i++) { 950 927 if (pool->base.opps[i] != NULL) ··· 1693 1660 if (pool->base.hubbub == NULL) { 1694 1661 BREAK_TO_DEBUGGER(); 1695 1662 dm_error("DC: failed to create hubbub!\n"); 1663 + goto fail; 1664 + } 1665 + 1666 + /* DIO */ 1667 + pool->base.dio = dcn10_dio_create(ctx); 1668 + if (pool->base.dio == NULL) { 1669 + BREAK_TO_DEBUGGER(); 1670 + dm_error("DC: failed to create dio!\n"); 1696 1671 goto fail; 1697 1672 } 1698 1673
+42
drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
··· 82 82 #include "dce/dce_dmcu.h" 83 83 #include "dce/dce_aux.h" 84 84 #include "dce/dce_i2c.h" 85 + #include "dio/dcn10/dcn10_dio.h" 85 86 #include "vm_helper.h" 86 87 87 88 #include "link_enc_cfg.h" ··· 550 549 static const struct dcn_hubbub_mask hubbub_mask = { 551 550 HUBBUB_MASK_SH_LIST_DCN20(_MASK) 552 551 }; 552 + 553 + static const struct dcn_dio_registers dio_regs = { 554 + DIO_REG_LIST_DCN10() 555 + }; 556 + 557 + #define DIO_MASK_SH_LIST(mask_sh)\ 558 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 559 + 560 + static const struct dcn_dio_shift dio_shift = { 561 + DIO_MASK_SH_LIST(__SHIFT) 562 + }; 563 + 564 + static const struct dcn_dio_mask dio_mask = { 565 + DIO_MASK_SH_LIST(_MASK) 566 + }; 567 + 568 + static struct dio *dcn20_dio_create(struct dc_context *ctx) 569 + { 570 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 571 + 572 + if (!dio10) 573 + return NULL; 574 + 575 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 576 + 577 + return &dio10->base; 578 + } 553 579 554 580 #define vmid_regs(id)\ 555 581 [id] = {\ ··· 1133 1105 kfree(pool->base.hubbub); 1134 1106 pool->base.hubbub = NULL; 1135 1107 } 1108 + 1109 + if (pool->base.dio != NULL) { 1110 + kfree(TO_DCN10_DIO(pool->base.dio)); 1111 + pool->base.dio = NULL; 1112 + } 1113 + 1136 1114 for (i = 0; i < pool->base.pipe_count; i++) { 1137 1115 if (pool->base.dpps[i] != NULL) 1138 1116 dcn20_dpp_destroy(&pool->base.dpps[i]); ··· 2740 2706 if (pool->base.hubbub == NULL) { 2741 2707 BREAK_TO_DEBUGGER(); 2742 2708 dm_error("DC: failed to create hubbub!\n"); 2709 + goto create_fail; 2710 + } 2711 + 2712 + /* DIO */ 2713 + pool->base.dio = dcn20_dio_create(ctx); 2714 + if (pool->base.dio == NULL) { 2715 + BREAK_TO_DEBUGGER(); 2716 + dm_error("DC: failed to create dio!\n"); 2743 2717 goto create_fail; 2744 2718 } 2745 2719
+41
drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
··· 56 56 #include "dce/dce_aux.h" 57 57 #include "dce/dce_i2c.h" 58 58 #include "dcn10/dcn10_resource.h" 59 + #include "dio/dcn10/dcn10_dio.h" 59 60 60 61 #include "cyan_skillfish_ip_offset.h" 61 62 ··· 756 755 return &hubbub->base; 757 756 } 758 757 758 + static const struct dcn_dio_registers dio_regs = { 759 + DIO_REG_LIST_DCN10() 760 + }; 761 + 762 + #define DIO_MASK_SH_LIST(mask_sh)\ 763 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 764 + 765 + static const struct dcn_dio_shift dio_shift = { 766 + DIO_MASK_SH_LIST(__SHIFT) 767 + }; 768 + 769 + static const struct dcn_dio_mask dio_mask = { 770 + DIO_MASK_SH_LIST(_MASK) 771 + }; 772 + 773 + static struct dio *dcn201_dio_create(struct dc_context *ctx) 774 + { 775 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 776 + 777 + if (!dio10) 778 + return NULL; 779 + 780 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 781 + 782 + return &dio10->base; 783 + } 784 + 759 785 static struct timing_generator *dcn201_timing_generator_create( 760 786 struct dc_context *ctx, 761 787 uint32_t instance) ··· 956 928 if (pool->base.hubbub != NULL) { 957 929 kfree(pool->base.hubbub); 958 930 pool->base.hubbub = NULL; 931 + } 932 + 933 + if (pool->base.dio != NULL) { 934 + kfree(TO_DCN10_DIO(pool->base.dio)); 935 + pool->base.dio = NULL; 959 936 } 960 937 961 938 for (i = 0; i < pool->base.pipe_count; i++) { ··· 1307 1274 pool->base.hubbub = dcn201_hubbub_create(ctx); 1308 1275 if (pool->base.hubbub == NULL) { 1309 1276 dm_error("DC: failed to create hubbub!\n"); 1277 + goto create_fail; 1278 + } 1279 + 1280 + /* DIO */ 1281 + pool->base.dio = dcn201_dio_create(ctx); 1282 + if (pool->base.dio == NULL) { 1283 + BREAK_TO_DEBUGGER(); 1284 + dm_error("DC: failed to create dio!\n"); 1310 1285 goto create_fail; 1311 1286 } 1312 1287
+34
drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
··· 84 84 #include "dce/dce_dmcu.h" 85 85 #include "dce/dce_aux.h" 86 86 #include "dce/dce_i2c.h" 87 + #include "dio/dcn10/dcn10_dio.h" 87 88 #include "dcn21_resource.h" 88 89 #include "vm_helper.h" 89 90 #include "dcn20/dcn20_vmid.h" ··· 330 329 HUBBUB_MASK_SH_LIST_DCN21(_MASK) 331 330 }; 332 331 332 + static const struct dcn_dio_registers dio_regs = { 333 + DIO_REG_LIST_DCN10() 334 + }; 335 + 336 + static const struct dcn_dio_shift dio_shift = { 0 }; 337 + 338 + static const struct dcn_dio_mask dio_mask = { 0 }; 339 + 340 + static struct dio *dcn21_dio_create(struct dc_context *ctx) 341 + { 342 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 343 + 344 + if (!dio10) 345 + return NULL; 346 + 347 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 348 + 349 + return &dio10->base; 350 + } 333 351 334 352 #define vmid_regs(id)\ 335 353 [id] = {\ ··· 697 677 kfree(pool->base.hubbub); 698 678 pool->base.hubbub = NULL; 699 679 } 680 + 681 + if (pool->base.dio != NULL) { 682 + kfree(TO_DCN10_DIO(pool->base.dio)); 683 + pool->base.dio = NULL; 684 + } 685 + 700 686 for (i = 0; i < pool->base.pipe_count; i++) { 701 687 if (pool->base.dpps[i] != NULL) 702 688 dcn20_dpp_destroy(&pool->base.dpps[i]); ··· 1685 1659 if (pool->base.hubbub == NULL) { 1686 1660 BREAK_TO_DEBUGGER(); 1687 1661 dm_error("DC: failed to create hubbub!\n"); 1662 + goto create_fail; 1663 + } 1664 + 1665 + /* DIO */ 1666 + pool->base.dio = dcn21_dio_create(ctx); 1667 + if (pool->base.dio == NULL) { 1668 + BREAK_TO_DEBUGGER(); 1669 + dm_error("DC: failed to create dio!\n"); 1688 1670 goto create_fail; 1689 1671 } 1690 1672
+42
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
··· 60 60 #include "dml/display_mode_vba.h" 61 61 #include "dcn30/dcn30_dccg.h" 62 62 #include "dcn10/dcn10_resource.h" 63 + #include "dio/dcn10/dcn10_dio.h" 63 64 #include "link_service.h" 64 65 #include "dce/dce_panel_cntl.h" 65 66 ··· 887 886 return &hubbub3->base; 888 887 } 889 888 889 + static const struct dcn_dio_registers dio_regs = { 890 + DIO_REG_LIST_DCN10() 891 + }; 892 + 893 + #define DIO_MASK_SH_LIST(mask_sh)\ 894 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 895 + 896 + static const struct dcn_dio_shift dio_shift = { 897 + DIO_MASK_SH_LIST(__SHIFT) 898 + }; 899 + 900 + static const struct dcn_dio_mask dio_mask = { 901 + DIO_MASK_SH_LIST(_MASK) 902 + }; 903 + 904 + static struct dio *dcn30_dio_create(struct dc_context *ctx) 905 + { 906 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 907 + 908 + if (!dio10) 909 + return NULL; 910 + 911 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 912 + 913 + return &dio10->base; 914 + } 915 + 890 916 static struct timing_generator *dcn30_timing_generator_create( 891 917 struct dc_context *ctx, 892 918 uint32_t instance) ··· 1124 1096 kfree(pool->base.hubbub); 1125 1097 pool->base.hubbub = NULL; 1126 1098 } 1099 + 1100 + if (pool->base.dio != NULL) { 1101 + kfree(TO_DCN10_DIO(pool->base.dio)); 1102 + pool->base.dio = NULL; 1103 + } 1104 + 1127 1105 for (i = 0; i < pool->base.pipe_count; i++) { 1128 1106 if (pool->base.dpps[i] != NULL) 1129 1107 dcn30_dpp_destroy(&pool->base.dpps[i]); ··· 2499 2465 if (pool->base.hubbub == NULL) { 2500 2466 BREAK_TO_DEBUGGER(); 2501 2467 dm_error("DC: failed to create hubbub!\n"); 2468 + goto create_fail; 2469 + } 2470 + 2471 + /* DIO */ 2472 + pool->base.dio = dcn30_dio_create(ctx); 2473 + if (pool->base.dio == NULL) { 2474 + BREAK_TO_DEBUGGER(); 2475 + dm_error("DC: failed to create dio!\n"); 2502 2476 goto create_fail; 2503 2477 } 2504 2478
+42
drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
··· 59 59 #include "dml/display_mode_vba.h" 60 60 #include "dcn301/dcn301_dccg.h" 61 61 #include "dcn10/dcn10_resource.h" 62 + #include "dio/dcn10/dcn10_dio.h" 62 63 #include "dcn30/dcn30_dio_stream_encoder.h" 63 64 #include "dcn301/dcn301_dio_link_encoder.h" 64 65 #include "dcn301/dcn301_panel_cntl.h" ··· 844 843 return &hubbub3->base; 845 844 } 846 845 846 + static const struct dcn_dio_registers dio_regs = { 847 + DIO_REG_LIST_DCN10() 848 + }; 849 + 850 + #define DIO_MASK_SH_LIST(mask_sh)\ 851 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 852 + 853 + static const struct dcn_dio_shift dio_shift = { 854 + DIO_MASK_SH_LIST(__SHIFT) 855 + }; 856 + 857 + static const struct dcn_dio_mask dio_mask = { 858 + DIO_MASK_SH_LIST(_MASK) 859 + }; 860 + 861 + static struct dio *dcn301_dio_create(struct dc_context *ctx) 862 + { 863 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 864 + 865 + if (!dio10) 866 + return NULL; 867 + 868 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 869 + 870 + return &dio10->base; 871 + } 872 + 847 873 static struct timing_generator *dcn301_timing_generator_create( 848 874 struct dc_context *ctx, uint32_t instance) 849 875 { ··· 1095 1067 kfree(pool->base.hubbub); 1096 1068 pool->base.hubbub = NULL; 1097 1069 } 1070 + 1071 + if (pool->base.dio != NULL) { 1072 + kfree(TO_DCN10_DIO(pool->base.dio)); 1073 + pool->base.dio = NULL; 1074 + } 1075 + 1098 1076 for (i = 0; i < pool->base.pipe_count; i++) { 1099 1077 if (pool->base.dpps[i] != NULL) 1100 1078 dcn301_dpp_destroy(&pool->base.dpps[i]); ··· 1615 1581 if (pool->base.hubbub == NULL) { 1616 1582 BREAK_TO_DEBUGGER(); 1617 1583 dm_error("DC: failed to create hubbub!\n"); 1584 + goto create_fail; 1585 + } 1586 + 1587 + /* DIO */ 1588 + pool->base.dio = dcn301_dio_create(ctx); 1589 + if (pool->base.dio == NULL) { 1590 + BREAK_TO_DEBUGGER(); 1591 + dm_error("DC: failed to create dio!\n"); 1618 1592 goto create_fail; 1619 1593 } 1620 1594
+41
drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
··· 46 46 #include "dml/dcn30/dcn30_fpu.h" 47 47 48 48 #include "dcn10/dcn10_resource.h" 49 + #include "dio/dcn10/dcn10_dio.h" 49 50 50 51 #include "link_service.h" 51 52 ··· 253 252 static const struct dcn20_vmid_mask vmid_masks = { 254 253 DCN20_VMID_MASK_SH_LIST(_MASK) 255 254 }; 255 + 256 + static const struct dcn_dio_registers dio_regs = { 257 + DIO_REG_LIST_DCN10() 258 + }; 259 + 260 + #define DIO_MASK_SH_LIST(mask_sh)\ 261 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 262 + 263 + static const struct dcn_dio_shift dio_shift = { 264 + DIO_MASK_SH_LIST(__SHIFT) 265 + }; 266 + 267 + static const struct dcn_dio_mask dio_mask = { 268 + DIO_MASK_SH_LIST(_MASK) 269 + }; 270 + 271 + static struct dio *dcn302_dio_create(struct dc_context *ctx) 272 + { 273 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 274 + 275 + if (!dio10) 276 + return NULL; 277 + 278 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 279 + 280 + return &dio10->base; 281 + } 256 282 257 283 static struct hubbub *dcn302_hubbub_create(struct dc_context *ctx) 258 284 { ··· 1051 1023 pool->hubbub = NULL; 1052 1024 } 1053 1025 1026 + if (pool->dio != NULL) { 1027 + kfree(TO_DCN10_DIO(pool->dio)); 1028 + pool->dio = NULL; 1029 + } 1030 + 1054 1031 for (i = 0; i < pool->pipe_count; i++) { 1055 1032 if (pool->dpps[i] != NULL) { 1056 1033 kfree(TO_DCN20_DPP(pool->dpps[i])); ··· 1404 1371 if (pool->hubbub == NULL) { 1405 1372 BREAK_TO_DEBUGGER(); 1406 1373 dm_error("DC: failed to create hubbub!\n"); 1374 + goto create_fail; 1375 + } 1376 + 1377 + /* DIO */ 1378 + pool->dio = dcn302_dio_create(ctx); 1379 + if (pool->dio == NULL) { 1380 + BREAK_TO_DEBUGGER(); 1381 + dm_error("DC: failed to create dio!\n"); 1407 1382 goto create_fail; 1408 1383 } 1409 1384
+41
drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
··· 46 46 #include "dml/dcn30/dcn30_fpu.h" 47 47 48 48 #include "dcn10/dcn10_resource.h" 49 + #include "dio/dcn10/dcn10_dio.h" 49 50 50 51 #include "link_service.h" 51 52 ··· 249 248 static const struct dcn20_vmid_mask vmid_masks = { 250 249 DCN20_VMID_MASK_SH_LIST(_MASK) 251 250 }; 251 + 252 + static const struct dcn_dio_registers dio_regs = { 253 + DIO_REG_LIST_DCN10() 254 + }; 255 + 256 + #define DIO_MASK_SH_LIST(mask_sh)\ 257 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 258 + 259 + static const struct dcn_dio_shift dio_shift = { 260 + DIO_MASK_SH_LIST(__SHIFT) 261 + }; 262 + 263 + static const struct dcn_dio_mask dio_mask = { 264 + DIO_MASK_SH_LIST(_MASK) 265 + }; 266 + 267 + static struct dio *dcn303_dio_create(struct dc_context *ctx) 268 + { 269 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 270 + 271 + if (!dio10) 272 + return NULL; 273 + 274 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 275 + 276 + return &dio10->base; 277 + } 252 278 253 279 static struct hubbub *dcn303_hubbub_create(struct dc_context *ctx) 254 280 { ··· 995 967 pool->hubbub = NULL; 996 968 } 997 969 970 + if (pool->dio != NULL) { 971 + kfree(TO_DCN10_DIO(pool->dio)); 972 + pool->dio = NULL; 973 + } 974 + 998 975 for (i = 0; i < pool->pipe_count; i++) { 999 976 if (pool->dpps[i] != NULL) { 1000 977 kfree(TO_DCN20_DPP(pool->dpps[i])); ··· 1336 1303 if (pool->hubbub == NULL) { 1337 1304 BREAK_TO_DEBUGGER(); 1338 1305 dm_error("DC: failed to create hubbub!\n"); 1306 + goto create_fail; 1307 + } 1308 + 1309 + /* DIO */ 1310 + pool->dio = dcn303_dio_create(ctx); 1311 + if (pool->dio == NULL) { 1312 + BREAK_TO_DEBUGGER(); 1313 + dm_error("DC: failed to create dio!\n"); 1339 1314 goto create_fail; 1340 1315 } 1341 1316
+40
drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
··· 64 64 #include "dce/dce_audio.h" 65 65 #include "dce/dce_hwseq.h" 66 66 #include "clk_mgr.h" 67 + #include "dio/dcn10/dcn10_dio.h" 67 68 #include "dio/virtual/virtual_stream_encoder.h" 68 69 #include "dce110/dce110_resource.h" 69 70 #include "dml/display_mode_vba.h" ··· 811 810 DCN20_VMID_MASK_SH_LIST(_MASK) 812 811 }; 813 812 813 + static const struct dcn_dio_registers dio_regs = { 814 + DIO_REG_LIST_DCN10() 815 + }; 816 + 817 + #define DIO_MASK_SH_LIST(mask_sh)\ 818 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 819 + 820 + static const struct dcn_dio_shift dio_shift = { 821 + DIO_MASK_SH_LIST(__SHIFT) 822 + }; 823 + 824 + static const struct dcn_dio_mask dio_mask = { 825 + DIO_MASK_SH_LIST(_MASK) 826 + }; 827 + 814 828 static const struct resource_caps res_cap_dcn31 = { 815 829 .num_timing_generator = 4, 816 830 .num_opp = 4, ··· 1035 1019 num_rmu); 1036 1020 1037 1021 return &mpc30->base; 1022 + } 1023 + 1024 + static struct dio *dcn31_dio_create(struct dc_context *ctx) 1025 + { 1026 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 1027 + 1028 + if (!dio10) 1029 + return NULL; 1030 + 1031 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 1032 + 1033 + return &dio10->base; 1038 1034 } 1039 1035 1040 1036 static struct hubbub *dcn31_hubbub_create(struct dc_context *ctx) ··· 1424 1396 if (pool->base.hubbub != NULL) { 1425 1397 kfree(pool->base.hubbub); 1426 1398 pool->base.hubbub = NULL; 1399 + } 1400 + if (pool->base.dio != NULL) { 1401 + kfree(TO_DCN10_DIO(pool->base.dio)); 1402 + pool->base.dio = NULL; 1427 1403 } 1428 1404 for (i = 0; i < pool->base.pipe_count; i++) { 1429 1405 if (pool->base.dpps[i] != NULL) ··· 2094 2062 if (pool->base.hubbub == NULL) { 2095 2063 BREAK_TO_DEBUGGER(); 2096 2064 dm_error("DC: failed to create hubbub!\n"); 2065 + goto create_fail; 2066 + } 2067 + 2068 + /* DIO */ 2069 + pool->base.dio = dcn31_dio_create(ctx); 2070 + if (pool->base.dio == NULL) { 2071 + BREAK_TO_DEBUGGER(); 2072 + dm_error("DC: failed to create dio!\n"); 2097 2073 goto create_fail; 2098 2074 } 2099 2075
+40
drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
··· 66 66 #include "dce/dce_audio.h" 67 67 #include "dce/dce_hwseq.h" 68 68 #include "clk_mgr.h" 69 + #include "dio/dcn10/dcn10_dio.h" 69 70 #include "dio/virtual/virtual_stream_encoder.h" 70 71 #include "dce110/dce110_resource.h" 71 72 #include "dml/display_mode_vba.h" ··· 823 822 DCN20_VMID_MASK_SH_LIST(_MASK) 824 823 }; 825 824 825 + static const struct dcn_dio_registers dio_regs = { 826 + DIO_REG_LIST_DCN10() 827 + }; 828 + 829 + #define DIO_MASK_SH_LIST(mask_sh)\ 830 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 831 + 832 + static const struct dcn_dio_shift dio_shift = { 833 + DIO_MASK_SH_LIST(__SHIFT) 834 + }; 835 + 836 + static const struct dcn_dio_mask dio_mask = { 837 + DIO_MASK_SH_LIST(_MASK) 838 + }; 839 + 826 840 static const struct resource_caps res_cap_dcn314 = { 827 841 .num_timing_generator = 4, 828 842 .num_opp = 4, ··· 1093 1077 num_rmu); 1094 1078 1095 1079 return &mpc30->base; 1080 + } 1081 + 1082 + static struct dio *dcn314_dio_create(struct dc_context *ctx) 1083 + { 1084 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 1085 + 1086 + if (!dio10) 1087 + return NULL; 1088 + 1089 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 1090 + 1091 + return &dio10->base; 1096 1092 } 1097 1093 1098 1094 static struct hubbub *dcn31_hubbub_create(struct dc_context *ctx) ··· 1483 1455 if (pool->base.hubbub != NULL) { 1484 1456 kfree(pool->base.hubbub); 1485 1457 pool->base.hubbub = NULL; 1458 + } 1459 + if (pool->base.dio != NULL) { 1460 + kfree(TO_DCN10_DIO(pool->base.dio)); 1461 + pool->base.dio = NULL; 1486 1462 } 1487 1463 for (i = 0; i < pool->base.pipe_count; i++) { 1488 1464 if (pool->base.dpps[i] != NULL) ··· 2021 1989 if (pool->base.hubbub == NULL) { 2022 1990 BREAK_TO_DEBUGGER(); 2023 1991 dm_error("DC: failed to create hubbub!\n"); 1992 + goto create_fail; 1993 + } 1994 + 1995 + /* DIO */ 1996 + pool->base.dio = dcn314_dio_create(ctx); 1997 + if (pool->base.dio == NULL) { 1998 + BREAK_TO_DEBUGGER(); 1999 + dm_error("DC: failed to create dio!\n"); 2024 2000 goto create_fail; 2025 2001 } 2026 2002
+40
drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
··· 63 63 #include "dce/dce_audio.h" 64 64 #include "dce/dce_hwseq.h" 65 65 #include "clk_mgr.h" 66 + #include "dio/dcn10/dcn10_dio.h" 66 67 #include "dio/virtual/virtual_stream_encoder.h" 67 68 #include "dce110/dce110_resource.h" 68 69 #include "dml/display_mode_vba.h" ··· 810 809 DCN20_VMID_MASK_SH_LIST(_MASK) 811 810 }; 812 811 812 + static const struct dcn_dio_registers dio_regs = { 813 + DIO_REG_LIST_DCN10() 814 + }; 815 + 816 + #define DIO_MASK_SH_LIST(mask_sh)\ 817 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 818 + 819 + static const struct dcn_dio_shift dio_shift = { 820 + DIO_MASK_SH_LIST(__SHIFT) 821 + }; 822 + 823 + static const struct dcn_dio_mask dio_mask = { 824 + DIO_MASK_SH_LIST(_MASK) 825 + }; 826 + 813 827 static const struct resource_caps res_cap_dcn31 = { 814 828 .num_timing_generator = 4, 815 829 .num_opp = 4, ··· 1034 1018 num_rmu); 1035 1019 1036 1020 return &mpc30->base; 1021 + } 1022 + 1023 + static struct dio *dcn315_dio_create(struct dc_context *ctx) 1024 + { 1025 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 1026 + 1027 + if (!dio10) 1028 + return NULL; 1029 + 1030 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 1031 + 1032 + return &dio10->base; 1037 1033 } 1038 1034 1039 1035 static struct hubbub *dcn31_hubbub_create(struct dc_context *ctx) ··· 1425 1397 if (pool->base.hubbub != NULL) { 1426 1398 kfree(pool->base.hubbub); 1427 1399 pool->base.hubbub = NULL; 1400 + } 1401 + if (pool->base.dio != NULL) { 1402 + kfree(TO_DCN10_DIO(pool->base.dio)); 1403 + pool->base.dio = NULL; 1428 1404 } 1429 1405 for (i = 0; i < pool->base.pipe_count; i++) { 1430 1406 if (pool->base.dpps[i] != NULL) ··· 2044 2012 if (pool->base.hubbub == NULL) { 2045 2013 BREAK_TO_DEBUGGER(); 2046 2014 dm_error("DC: failed to create hubbub!\n"); 2015 + goto create_fail; 2016 + } 2017 + 2018 + /* DIO */ 2019 + pool->base.dio = dcn315_dio_create(ctx); 2020 + if (pool->base.dio == NULL) { 2021 + BREAK_TO_DEBUGGER(); 2022 + dm_error("DC: failed to create dio!\n"); 2047 2023 goto create_fail; 2048 2024 } 2049 2025
+40
drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
··· 63 63 #include "dce/dce_audio.h" 64 64 #include "dce/dce_hwseq.h" 65 65 #include "clk_mgr.h" 66 + #include "dio/dcn10/dcn10_dio.h" 66 67 #include "dio/virtual/virtual_stream_encoder.h" 67 68 #include "dce110/dce110_resource.h" 68 69 #include "dml/display_mode_vba.h" ··· 805 804 DCN20_VMID_MASK_SH_LIST(_MASK) 806 805 }; 807 806 807 + static const struct dcn_dio_registers dio_regs = { 808 + DIO_REG_LIST_DCN10() 809 + }; 810 + 811 + #define DIO_MASK_SH_LIST(mask_sh)\ 812 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 813 + 814 + static const struct dcn_dio_shift dio_shift = { 815 + DIO_MASK_SH_LIST(__SHIFT) 816 + }; 817 + 818 + static const struct dcn_dio_mask dio_mask = { 819 + DIO_MASK_SH_LIST(_MASK) 820 + }; 821 + 808 822 static const struct resource_caps res_cap_dcn31 = { 809 823 .num_timing_generator = 4, 810 824 .num_opp = 4, ··· 1027 1011 num_rmu); 1028 1012 1029 1013 return &mpc30->base; 1014 + } 1015 + 1016 + static struct dio *dcn316_dio_create(struct dc_context *ctx) 1017 + { 1018 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 1019 + 1020 + if (!dio10) 1021 + return NULL; 1022 + 1023 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 1024 + 1025 + return &dio10->base; 1030 1026 } 1031 1027 1032 1028 static struct hubbub *dcn31_hubbub_create(struct dc_context *ctx) ··· 1420 1392 if (pool->base.hubbub != NULL) { 1421 1393 kfree(pool->base.hubbub); 1422 1394 pool->base.hubbub = NULL; 1395 + } 1396 + if (pool->base.dio != NULL) { 1397 + kfree(TO_DCN10_DIO(pool->base.dio)); 1398 + pool->base.dio = NULL; 1423 1399 } 1424 1400 for (i = 0; i < pool->base.pipe_count; i++) { 1425 1401 if (pool->base.dpps[i] != NULL) ··· 1920 1888 if (pool->base.hubbub == NULL) { 1921 1889 BREAK_TO_DEBUGGER(); 1922 1890 dm_error("DC: failed to create hubbub!\n"); 1891 + goto create_fail; 1892 + } 1893 + 1894 + /* DIO */ 1895 + pool->base.dio = dcn316_dio_create(ctx); 1896 + if (pool->base.dio == NULL) { 1897 + BREAK_TO_DEBUGGER(); 1898 + dm_error("DC: failed to create dio!\n"); 1923 1899 goto create_fail; 1924 1900 } 1925 1901
+43
drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
··· 66 66 #include "dce/dce_hwseq.h" 67 67 #include "clk_mgr.h" 68 68 #include "dio/virtual/virtual_stream_encoder.h" 69 + #include "dio/dcn10/dcn10_dio.h" 69 70 #include "dml/display_mode_vba.h" 70 71 #include "dcn32/dcn32_dccg.h" 71 72 #include "dcn10/dcn10_resource.h" ··· 644 643 DCN20_VMID_MASK_SH_LIST(_MASK) 645 644 }; 646 645 646 + static struct dcn_dio_registers dio_regs; 647 + 648 + #define DIO_MASK_SH_LIST(mask_sh)\ 649 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 650 + 651 + static const struct dcn_dio_shift dio_shift = { 652 + DIO_MASK_SH_LIST(__SHIFT) 653 + }; 654 + 655 + static const struct dcn_dio_mask dio_mask = { 656 + DIO_MASK_SH_LIST(_MASK) 657 + }; 658 + 647 659 static const struct resource_caps res_cap_dcn32 = { 648 660 .num_timing_generator = 4, 649 661 .num_opp = 4, ··· 845 831 kfree(clk_src); 846 832 BREAK_TO_DEBUGGER(); 847 833 return NULL; 834 + } 835 + 836 + static struct dio *dcn32_dio_create(struct dc_context *ctx) 837 + { 838 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 839 + 840 + if (!dio10) 841 + return NULL; 842 + 843 + #undef REG_STRUCT 844 + #define REG_STRUCT dio_regs 845 + DIO_REG_LIST_DCN10(); 846 + 847 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 848 + 849 + return &dio10->base; 848 850 } 849 851 850 852 static struct hubbub *dcn32_hubbub_create(struct dc_context *ctx) ··· 1523 1493 1524 1494 if (pool->base.dccg != NULL) 1525 1495 dcn_dccg_destroy(&pool->base.dccg); 1496 + 1497 + if (pool->base.dio != NULL) { 1498 + kfree(TO_DCN10_DIO(pool->base.dio)); 1499 + pool->base.dio = NULL; 1500 + } 1526 1501 1527 1502 if (pool->base.oem_device != NULL) { 1528 1503 struct dc *dc = pool->base.oem_device->ctx->dc; ··· 2406 2371 if (pool->base.hubbub == NULL) { 2407 2372 BREAK_TO_DEBUGGER(); 2408 2373 dm_error("DC: failed to create hubbub!\n"); 2374 + goto create_fail; 2375 + } 2376 + 2377 + /* DIO */ 2378 + pool->base.dio = dcn32_dio_create(ctx); 2379 + if (pool->base.dio == NULL) { 2380 + BREAK_TO_DEBUGGER(); 2381 + dm_error("DC: failed to create dio!\n"); 2409 2382 goto create_fail; 2410 2383 } 2411 2384
+43
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
··· 69 69 #include "dce/dce_hwseq.h" 70 70 #include "clk_mgr.h" 71 71 #include "dio/virtual/virtual_stream_encoder.h" 72 + #include "dio/dcn10/dcn10_dio.h" 72 73 #include "dml/display_mode_vba.h" 73 74 #include "dcn32/dcn32_dccg.h" 74 75 #include "dcn10/dcn10_resource.h" ··· 640 639 DCN20_VMID_MASK_SH_LIST(_MASK) 641 640 }; 642 641 642 + static struct dcn_dio_registers dio_regs; 643 + 644 + #define DIO_MASK_SH_LIST(mask_sh)\ 645 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 646 + 647 + static const struct dcn_dio_shift dio_shift = { 648 + DIO_MASK_SH_LIST(__SHIFT) 649 + }; 650 + 651 + static const struct dcn_dio_mask dio_mask = { 652 + DIO_MASK_SH_LIST(_MASK) 653 + }; 654 + 643 655 static const struct resource_caps res_cap_dcn321 = { 644 656 .num_timing_generator = 4, 645 657 .num_opp = 4, ··· 839 825 kfree(clk_src); 840 826 BREAK_TO_DEBUGGER(); 841 827 return NULL; 828 + } 829 + 830 + static struct dio *dcn321_dio_create(struct dc_context *ctx) 831 + { 832 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 833 + 834 + if (!dio10) 835 + return NULL; 836 + 837 + #undef REG_STRUCT 838 + #define REG_STRUCT dio_regs 839 + DIO_REG_LIST_DCN10(); 840 + 841 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 842 + 843 + return &dio10->base; 842 844 } 843 845 844 846 static struct hubbub *dcn321_hubbub_create(struct dc_context *ctx) ··· 1504 1474 if (pool->base.dccg != NULL) 1505 1475 dcn_dccg_destroy(&pool->base.dccg); 1506 1476 1477 + if (pool->base.dio != NULL) { 1478 + kfree(TO_DCN10_DIO(pool->base.dio)); 1479 + pool->base.dio = NULL; 1480 + } 1481 + 1507 1482 if (pool->base.oem_device != NULL) { 1508 1483 struct dc *dc = pool->base.oem_device->ctx->dc; 1509 1484 ··· 1905 1870 if (pool->base.hubbub == NULL) { 1906 1871 BREAK_TO_DEBUGGER(); 1907 1872 dm_error("DC: failed to create hubbub!\n"); 1873 + goto create_fail; 1874 + } 1875 + 1876 + /* DIO */ 1877 + pool->base.dio = dcn321_dio_create(ctx); 1878 + if (pool->base.dio == NULL) { 1879 + BREAK_TO_DEBUGGER(); 1880 + dm_error("DC: failed to create dio!\n"); 1908 1881 goto create_fail; 1909 1882 } 1910 1883
+43
drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
··· 71 71 #include "dce/dce_hwseq.h" 72 72 #include "clk_mgr.h" 73 73 #include "dio/virtual/virtual_stream_encoder.h" 74 + #include "dio/dcn10/dcn10_dio.h" 74 75 #include "dce110/dce110_resource.h" 75 76 #include "dml/display_mode_vba.h" 76 77 #include "dcn35/dcn35_dccg.h" ··· 665 664 DCN20_VMID_MASK_SH_LIST(_MASK) 666 665 }; 667 666 667 + static struct dcn_dio_registers dio_regs; 668 + 669 + #define DIO_MASK_SH_LIST(mask_sh)\ 670 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 671 + 672 + static const struct dcn_dio_shift dio_shift = { 673 + DIO_MASK_SH_LIST(__SHIFT) 674 + }; 675 + 676 + static const struct dcn_dio_mask dio_mask = { 677 + DIO_MASK_SH_LIST(_MASK) 678 + }; 679 + 668 680 static const struct resource_caps res_cap_dcn35 = { 669 681 .num_timing_generator = 4, 670 682 .num_opp = 4, ··· 985 971 num_rmu); 986 972 987 973 return &mpc30->base; 974 + } 975 + 976 + static struct dio *dcn35_dio_create(struct dc_context *ctx) 977 + { 978 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 979 + 980 + if (!dio10) 981 + return NULL; 982 + 983 + #undef REG_STRUCT 984 + #define REG_STRUCT dio_regs 985 + DIO_REG_LIST_DCN10(); 986 + 987 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 988 + 989 + return &dio10->base; 988 990 } 989 991 990 992 static struct hubbub *dcn35_hubbub_create(struct dc_context *ctx) ··· 1593 1563 1594 1564 if (pool->base.dccg != NULL) 1595 1565 dcn_dccg_destroy(&pool->base.dccg); 1566 + 1567 + if (pool->base.dio != NULL) { 1568 + kfree(TO_DCN10_DIO(pool->base.dio)); 1569 + pool->base.dio = NULL; 1570 + } 1596 1571 } 1597 1572 1598 1573 static struct hubp *dcn35_hubp_create( ··· 2077 2042 if (pool->base.hubbub == NULL) { 2078 2043 BREAK_TO_DEBUGGER(); 2079 2044 dm_error("DC: failed to create hubbub!\n"); 2045 + goto create_fail; 2046 + } 2047 + 2048 + /* DIO */ 2049 + pool->base.dio = dcn35_dio_create(ctx); 2050 + if (pool->base.dio == NULL) { 2051 + BREAK_TO_DEBUGGER(); 2052 + dm_error("DC: failed to create dio!\n"); 2080 2053 goto create_fail; 2081 2054 } 2082 2055
+43
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
··· 50 50 #include "dce/dce_hwseq.h" 51 51 #include "clk_mgr.h" 52 52 #include "dio/virtual/virtual_stream_encoder.h" 53 + #include "dio/dcn10/dcn10_dio.h" 53 54 #include "dce110/dce110_resource.h" 54 55 #include "dml/display_mode_vba.h" 55 56 #include "dcn35/dcn35_dccg.h" ··· 645 644 DCN20_VMID_MASK_SH_LIST(_MASK) 646 645 }; 647 646 647 + static struct dcn_dio_registers dio_regs; 648 + 649 + #define DIO_MASK_SH_LIST(mask_sh)\ 650 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 651 + 652 + static const struct dcn_dio_shift dio_shift = { 653 + DIO_MASK_SH_LIST(__SHIFT) 654 + }; 655 + 656 + static const struct dcn_dio_mask dio_mask = { 657 + DIO_MASK_SH_LIST(_MASK) 658 + }; 659 + 648 660 static const struct resource_caps res_cap_dcn351 = { 649 661 .num_timing_generator = 4, 650 662 .num_opp = 4, ··· 965 951 num_rmu); 966 952 967 953 return &mpc30->base; 954 + } 955 + 956 + static struct dio *dcn351_dio_create(struct dc_context *ctx) 957 + { 958 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 959 + 960 + if (!dio10) 961 + return NULL; 962 + 963 + #undef REG_STRUCT 964 + #define REG_STRUCT dio_regs 965 + DIO_REG_LIST_DCN10(); 966 + 967 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 968 + 969 + return &dio10->base; 968 970 } 969 971 970 972 static struct hubbub *dcn35_hubbub_create(struct dc_context *ctx) ··· 1573 1543 1574 1544 if (pool->base.dccg != NULL) 1575 1545 dcn_dccg_destroy(&pool->base.dccg); 1546 + 1547 + if (pool->base.dio != NULL) { 1548 + kfree(TO_DCN10_DIO(pool->base.dio)); 1549 + pool->base.dio = NULL; 1550 + } 1576 1551 } 1577 1552 1578 1553 static struct hubp *dcn35_hubp_create( ··· 2049 2014 if (pool->base.hubbub == NULL) { 2050 2015 BREAK_TO_DEBUGGER(); 2051 2016 dm_error("DC: failed to create hubbub!\n"); 2017 + goto create_fail; 2018 + } 2019 + 2020 + /* DIO */ 2021 + pool->base.dio = dcn351_dio_create(ctx); 2022 + if (pool->base.dio == NULL) { 2023 + BREAK_TO_DEBUGGER(); 2024 + dm_error("DC: failed to create dio!\n"); 2052 2025 goto create_fail; 2053 2026 } 2054 2027
+43
drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
··· 50 50 #include "dce/dce_hwseq.h" 51 51 #include "clk_mgr.h" 52 52 #include "dio/virtual/virtual_stream_encoder.h" 53 + #include "dio/dcn10/dcn10_dio.h" 53 54 #include "dce110/dce110_resource.h" 54 55 #include "dml/display_mode_vba.h" 55 56 #include "dcn35/dcn35_dccg.h" ··· 652 651 DCN20_VMID_MASK_SH_LIST(_MASK) 653 652 }; 654 653 654 + static struct dcn_dio_registers dio_regs; 655 + 656 + #define DIO_MASK_SH_LIST(mask_sh)\ 657 + HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh) 658 + 659 + static const struct dcn_dio_shift dio_shift = { 660 + DIO_MASK_SH_LIST(__SHIFT) 661 + }; 662 + 663 + static const struct dcn_dio_mask dio_mask = { 664 + DIO_MASK_SH_LIST(_MASK) 665 + }; 666 + 655 667 static const struct resource_caps res_cap_dcn36 = { 656 668 .num_timing_generator = 4, 657 669 .num_opp = 4, ··· 972 958 num_rmu); 973 959 974 960 return &mpc30->base; 961 + } 962 + 963 + static struct dio *dcn36_dio_create(struct dc_context *ctx) 964 + { 965 + struct dcn10_dio *dio10 = kzalloc_obj(struct dcn10_dio); 966 + 967 + if (!dio10) 968 + return NULL; 969 + 970 + #undef REG_STRUCT 971 + #define REG_STRUCT dio_regs 972 + DIO_REG_LIST_DCN10(); 973 + 974 + dcn10_dio_construct(dio10, ctx, &dio_regs, &dio_shift, &dio_mask); 975 + 976 + return &dio10->base; 975 977 } 976 978 977 979 static struct hubbub *dcn35_hubbub_create(struct dc_context *ctx) ··· 1580 1550 1581 1551 if (pool->base.dccg != NULL) 1582 1552 dcn_dccg_destroy(&pool->base.dccg); 1553 + 1554 + if (pool->base.dio != NULL) { 1555 + kfree(TO_DCN10_DIO(pool->base.dio)); 1556 + pool->base.dio = NULL; 1557 + } 1583 1558 } 1584 1559 1585 1560 static struct hubp *dcn35_hubp_create( ··· 2047 2012 if (pool->base.hubbub == NULL) { 2048 2013 BREAK_TO_DEBUGGER(); 2049 2014 dm_error("DC: failed to create hubbub!\n"); 2015 + goto create_fail; 2016 + } 2017 + 2018 + /* DIO */ 2019 + pool->base.dio = dcn36_dio_create(ctx); 2020 + if (pool->base.dio == NULL) { 2021 + BREAK_TO_DEBUGGER(); 2022 + dm_error("DC: failed to create dio!\n"); 2050 2023 goto create_fail; 2051 2024 } 2052 2025