tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'soc-fixes-6.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann:
"The majority of these last fixes are for devicetree files.

These address two important regressions for the Qualcomm SMMU and the
Raspberry Pi 4 USB controller, as well as a larger number of patches
fixing minor mistakes in board specific files for Rockchips, i.MX,
starfive and broadcom.

The non-DT changes are

- A fix for an old boot regression on Renesas shmobile chips

- Another boot time regression for for the Qualcomm PDR SoC driver,
among a few other Qualcomm firmware driver fixes for efivars and
tzmem

- Minor Kconfig fixes for davinci and OMAP1

- Minor code fixes for sparx5 reset controllers, OMAP memory
controller, i.MX SCU, cpufreq and SoC drivers and a Hisilicon SoC
driver

- One more update to the Asahi maintainers, adding Neal Gompa as a
reviewer"

* tag 'soc-fixes-6.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (35 commits)
ARM: davinci: da850: fix selecting ARCH_DAVINCI_DA8XX
soc: hisilicon: kunpeng_hccs: Fix incorrect string assembly
memory: omap-gpmc: drop no compatible check
reset: mchp: sparx5: Fix for lan966x
ARM: shmobile: smp: Enforce shmobile_smp_* alignment
MAINTAINERS: Add myself (Neal Gompa) as a reviewer for ARM Apple support
MAINTAINERS: Add apple-spi driver & binding files
arm64: dts: rockchip: slow down emmc freq for rock 5 itx
ARM: dts: BCM5301X: Fix switch port labels of ASUS RT-AC3200
ARM: dts: BCM5301X: Fix switch port labels of ASUS RT-AC5300
ARM: dts: bcm2711: Don't mark timer regs unconfigured
ARM: OMAP1: select CONFIG_GENERIC_IRQ_CHIP
arm64: dts: rockchip: Add missing PCIe supplies to RockPro64 board dtsi
arm64: dts: rockchip: Add avdd HDMI supplies to RockPro64 board dtsi
arm64: dts: rockchip: Remove undocumented sdmmc property from lubancat-1
arm64: dts: rockchip: fix pinmux of UART5 for PX30 Ringneck on Haikou
arm64: dts: rockchip: fix pinmux of UART0 for PX30 Ringneck on Haikou
arm64: dts: rockchip: fix u2phy1_host status for NanoPi R4S
arm64: dts: bcm2712: PL011 UARTs are actually r1p5
ARM: dts: bcm2711: PL011 UARTs are actually r1p5
...

Linus Torvalds fc444ada 47c7efa4

+121 -101
+3
MAINTAINERS
··· 2213 2213 M: Sven Peter <sven@svenpeter.dev> 2214 2214 M: Janne Grunau <j@jannau.net> 2215 2215 R: Alyssa Rosenzweig <alyssa@rosenzweig.io> 2216 + R: Neal Gompa <neal@gompa.dev> 2216 2217 L: asahi@lists.linux.dev 2217 2218 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 2218 2219 S: Maintained ··· 2238 2237 F: Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml 2239 2238 F: Documentation/devicetree/bindings/power/apple* 2240 2239 F: Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml 2240 + F: Documentation/devicetree/bindings/spi/apple,spi.yaml 2241 2241 F: Documentation/devicetree/bindings/watchdog/apple,wdt.yaml 2242 2242 F: arch/arm64/boot/dts/apple/ 2243 2243 F: drivers/bluetooth/hci_bcm4377.c ··· 2256 2254 F: drivers/pinctrl/pinctrl-apple-gpio.c 2257 2255 F: drivers/pwm/pwm-apple.c 2258 2256 F: drivers/soc/apple/* 2257 + F: drivers/spi/spi-apple.c 2259 2258 F: drivers/watchdog/apple_wdt.c 2260 2259 F: include/dt-bindings/interrupt-controller/apple-aic.h 2261 2260 F: include/dt-bindings/pinctrl/apple.h
-5
arch/arm/boot/dts/broadcom/bcm2711-rpi.dtsi
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 2 #include "bcm2835-rpi.dtsi" 3 3 4 - #include <dt-bindings/power/raspberrypi-power.h> 5 4 #include <dt-bindings/reset/raspberrypi,firmware-reset.h> 6 5 7 6 / { ··· 99 100 100 101 &vchiq { 101 102 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 102 - }; 103 - 104 - &xhci { 105 - power-domains = <&power RPI_POWER_DOMAIN_USB>; 106 103 };
+6 -6
arch/arm/boot/dts/broadcom/bcm2711.dtsi
··· 134 134 clocks = <&clocks BCM2835_CLOCK_UART>, 135 135 <&clocks BCM2835_CLOCK_VPU>; 136 136 clock-names = "uartclk", "apb_pclk"; 137 - arm,primecell-periphid = <0x00241011>; 137 + arm,primecell-periphid = <0x00341011>; 138 138 status = "disabled"; 139 139 }; 140 140 ··· 145 145 clocks = <&clocks BCM2835_CLOCK_UART>, 146 146 <&clocks BCM2835_CLOCK_VPU>; 147 147 clock-names = "uartclk", "apb_pclk"; 148 - arm,primecell-periphid = <0x00241011>; 148 + arm,primecell-periphid = <0x00341011>; 149 149 status = "disabled"; 150 150 }; 151 151 ··· 156 156 clocks = <&clocks BCM2835_CLOCK_UART>, 157 157 <&clocks BCM2835_CLOCK_VPU>; 158 158 clock-names = "uartclk", "apb_pclk"; 159 - arm,primecell-periphid = <0x00241011>; 159 + arm,primecell-periphid = <0x00341011>; 160 160 status = "disabled"; 161 161 }; 162 162 ··· 167 167 clocks = <&clocks BCM2835_CLOCK_UART>, 168 168 <&clocks BCM2835_CLOCK_VPU>; 169 169 clock-names = "uartclk", "apb_pclk"; 170 - arm,primecell-periphid = <0x00241011>; 170 + arm,primecell-periphid = <0x00341011>; 171 171 status = "disabled"; 172 172 }; 173 173 ··· 451 451 IRQ_TYPE_LEVEL_LOW)>, 452 452 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | 453 453 IRQ_TYPE_LEVEL_LOW)>; 454 - /* This only applies to the ARMv7 stub */ 455 - arm,cpu-registers-not-fw-configured; 456 454 }; 457 455 458 456 cpus: cpus { ··· 608 610 #address-cells = <1>; 609 611 #size-cells = <0>; 610 612 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 613 + power-domains = <&pm BCM2835_POWER_DOMAIN_USB>; 611 614 /* DWC2 and this IP block share the same USB PHY, 612 615 * enabling both at the same time results in lockups. 613 616 * So keep this node disabled and let the bootloader ··· 1176 1177 }; 1177 1178 1178 1179 &uart0 { 1180 + arm,primecell-periphid = <0x00341011>; 1179 1181 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 1180 1182 }; 1181 1183
+6 -6
arch/arm/boot/dts/broadcom/bcm4709-asus-rt-ac3200.dts
··· 124 124 }; 125 125 126 126 port@1 { 127 - label = "lan1"; 127 + label = "lan4"; 128 128 }; 129 129 130 130 port@2 { 131 - label = "lan2"; 132 - }; 133 - 134 - port@3 { 135 131 label = "lan3"; 136 132 }; 137 133 134 + port@3 { 135 + label = "lan2"; 136 + }; 137 + 138 138 port@4 { 139 - label = "lan4"; 139 + label = "lan1"; 140 140 }; 141 141 }; 142 142 };
+4 -4
arch/arm/boot/dts/broadcom/bcm47094-asus-rt-ac5300.dts
··· 126 126 127 127 ports { 128 128 port@0 { 129 - label = "lan4"; 129 + label = "wan"; 130 130 }; 131 131 132 132 port@1 { 133 - label = "lan3"; 133 + label = "lan1"; 134 134 }; 135 135 136 136 port@2 { ··· 138 138 }; 139 139 140 140 port@3 { 141 - label = "lan1"; 141 + label = "lan3"; 142 142 }; 143 143 144 144 port@4 { 145 - label = "wan"; 145 + label = "lan4"; 146 146 }; 147 147 }; 148 148 };
+5 -5
arch/arm/boot/dts/nxp/imx/imx6qdl-apalis.dtsi
··· 108 108 }; 109 109 }; 110 110 111 + poweroff { 112 + compatible = "regulator-poweroff"; 113 + cpu-supply = <&vgen2_reg>; 114 + }; 115 + 111 116 reg_module_3v3: regulator-module-3v3 { 112 117 compatible = "regulator-fixed"; 113 118 regulator-always-on; ··· 239 234 pinctrl-0 = <&pinctrl_flexcan2_default>; 240 235 pinctrl-1 = <&pinctrl_flexcan2_sleep>; 241 236 status = "disabled"; 242 - }; 243 - 244 - &clks { 245 - fsl,pmic-stby-poweroff; 246 237 }; 247 238 248 239 /* Apalis SPI1 */ ··· 528 527 529 528 pmic: pmic@8 { 530 529 compatible = "fsl,pfuze100"; 531 - fsl,pmic-stby-poweroff; 532 530 reg = <0x08>; 533 531 534 532 regulators {
+1
arch/arm/mach-davinci/Kconfig
··· 27 27 28 28 config ARCH_DAVINCI_DA850 29 29 bool "DA850/OMAP-L138/AM18x based system" 30 + select ARCH_DAVINCI_DA8XX 30 31 select DAVINCI_CP_INTC 31 32 32 33 config ARCH_DAVINCI_DA8XX
+1
arch/arm/mach-omap1/Kconfig
··· 8 8 select ARCH_OMAP 9 9 select CLKSRC_MMIO 10 10 select FORCE_PCI if PCCARD 11 + select GENERIC_IRQ_CHIP 11 12 select GPIOLIB 12 13 help 13 14 Support for older TI OMAP1 (omap7xx, omap15xx or omap16xx)
+1
arch/arm/mach-shmobile/headsmp.S
··· 136 136 .long shmobile_smp_arg - 1b 137 137 138 138 .bss 139 + .align 2 139 140 .globl shmobile_smp_mpidr 140 141 shmobile_smp_mpidr: 141 142 .space NR_CPUS * 4
+1 -1
arch/arm64/boot/dts/broadcom/bcm2712.dtsi
··· 227 227 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 228 228 clocks = <&clk_uart>, <&clk_vpu>; 229 229 clock-names = "uartclk", "apb_pclk"; 230 - arm,primecell-periphid = <0x00241011>; 230 + arm,primecell-periphid = <0x00341011>; 231 231 status = "disabled"; 232 232 }; 233 233
+3 -3
arch/arm64/boot/dts/freescale/imx8mm-verdin-dahlia.dtsi
··· 16 16 "Headphone Jack", "HPOUTR", 17 17 "IN2L", "Line In Jack", 18 18 "IN2R", "Line In Jack", 19 - "Headphone Jack", "MICBIAS", 20 - "IN1L", "Headphone Jack"; 19 + "Microphone Jack", "MICBIAS", 20 + "IN1L", "Microphone Jack"; 21 21 simple-audio-card,widgets = 22 - "Microphone", "Headphone Jack", 22 + "Microphone", "Microphone Jack", 23 23 "Headphone", "Headphone Jack", 24 24 "Line", "Line In Jack"; 25 25
+4 -12
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi
··· 1 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2021-2022 TQ-Systems GmbH 4 - * Author: Alexander Stein <alexander.stein@tq-group.com> 3 + * Copyright 2021-2025 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 + * D-82229 Seefeld, Germany. 5 + * Author: Alexander Stein 5 6 */ 6 7 7 8 #include "imx8mp.dtsi" ··· 22 21 regulator-name = "VCC3V3"; 23 22 regulator-min-microvolt = <3300000>; 24 23 regulator-max-microvolt = <3300000>; 25 - regulator-always-on; 26 - }; 27 - 28 - /* e-MMC IO, needed for HS modes */ 29 - reg_vcc1v8: regulator-vcc1v8 { 30 - compatible = "regulator-fixed"; 31 - regulator-name = "VCC1V8"; 32 - regulator-min-microvolt = <1800000>; 33 - regulator-max-microvolt = <1800000>; 34 24 regulator-always-on; 35 25 }; 36 26 }; ··· 189 197 no-sd; 190 198 no-sdio; 191 199 vmmc-supply = <&reg_vcc3v3>; 192 - vqmmc-supply = <&reg_vcc1v8>; 200 + vqmmc-supply = <&buck5_reg>; 193 201 status = "okay"; 194 202 }; 195 203
+3 -3
arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi
··· 28 28 "Headphone Jack", "HPOUTR", 29 29 "IN2L", "Line In Jack", 30 30 "IN2R", "Line In Jack", 31 - "Headphone Jack", "MICBIAS", 32 - "IN1L", "Headphone Jack"; 31 + "Microphone Jack", "MICBIAS", 32 + "IN1L", "Microphone Jack"; 33 33 simple-audio-card,widgets = 34 - "Microphone", "Headphone Jack", 34 + "Microphone", "Microphone Jack", 35 35 "Headphone", "Headphone Jack", 36 36 "Line", "Line In Jack"; 37 37
-1
arch/arm64/boot/dts/qcom/sdm845.dtsi
··· 5163 5163 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 5164 5164 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 5165 5165 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>; 5166 - dma-coherent; 5167 5166 }; 5168 5167 5169 5168 anoc_1_tbu: tbu@150c5000 {
+12
arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
··· 194 194 <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 195 195 }; 196 196 }; 197 + 198 + uart { 199 + uart5_rts_pin: uart5-rts-pin { 200 + rockchip,pins = 201 + <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 202 + }; 203 + }; 197 204 }; 198 205 199 206 &pwm0 { ··· 229 222 }; 230 223 231 224 &uart0 { 225 + pinctrl-names = "default"; 226 + pinctrl-0 = <&uart0_xfer>; 232 227 status = "okay"; 233 228 }; 234 229 235 230 &uart5 { 231 + /* Add pinmux for rts-gpios (uart5_rts_pin) */ 232 + pinctrl-names = "default"; 233 + pinctrl-0 = <&uart5_xfer &uart5_rts_pin>; 236 234 rts-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 237 235 status = "okay"; 238 236 };
+1 -1
arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi
··· 115 115 }; 116 116 117 117 &u2phy1_host { 118 - status = "disabled"; 118 + phy-supply = <&vdd_5v>; 119 119 }; 120 120 121 121 &uart0 {
+14
arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi
··· 227 227 vin-supply = <&vcc12v_dcin>; 228 228 }; 229 229 230 + vcca_0v9: regulator-vcca-0v9 { 231 + compatible = "regulator-fixed"; 232 + regulator-name = "vcca_0v9"; 233 + regulator-always-on; 234 + regulator-boot-on; 235 + regulator-min-microvolt = <900000>; 236 + regulator-max-microvolt = <900000>; 237 + vin-supply = <&vcc3v3_sys>; 238 + }; 239 + 230 240 vdd_log: regulator-vdd-log { 231 241 compatible = "pwm-regulator"; 232 242 pwms = <&pwm2 0 25000 1>; ··· 322 312 }; 323 313 324 314 &hdmi { 315 + avdd-0v9-supply = <&vcca_0v9>; 316 + avdd-1v8-supply = <&vcc1v8_dvp>; 325 317 ddc-i2c-bus = <&i2c3>; 326 318 pinctrl-names = "default"; 327 319 pinctrl-0 = <&hdmi_cec>; ··· 673 661 num-lanes = <4>; 674 662 pinctrl-names = "default"; 675 663 pinctrl-0 = <&pcie_perst>; 664 + vpcie0v9-supply = <&vcca_0v9>; 665 + vpcie1v8-supply = <&vcca_1v8>; 676 666 vpcie12v-supply = <&vcc12v_dcin>; 677 667 vpcie3v3-supply = <&vcc3v3_pcie>; 678 668 status = "okay";
-1
arch/arm64/boot/dts/rockchip/rk3566-lubancat-1.dts
··· 512 512 513 513 &sdmmc0 { 514 514 max-frequency = <150000000>; 515 - supports-sd; 516 515 bus-width = <4>; 517 516 cap-mmc-highspeed; 518 517 cap-sd-highspeed;
-1
arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts
··· 503 503 non-removable; 504 504 pinctrl-names = "default"; 505 505 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>; 506 - supports-cqe; 507 506 vmmc-supply = <&vcc_3v3_s3>; 508 507 vqmmc-supply = <&vcc_1v8_s3>; 509 508 status = "okay";
+1 -2
arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts
··· 690 690 691 691 &sdhci { 692 692 bus-width = <8>; 693 - max-frequency = <200000000>; 693 + max-frequency = <150000000>; 694 694 mmc-hs400-1_8v; 695 695 mmc-hs400-enhanced-strobe; 696 - mmc-hs200-1_8v; 697 696 no-sdio; 698 697 no-sd; 699 698 non-removable;
-1
arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi
··· 386 386 non-removable; 387 387 pinctrl-names = "default"; 388 388 pinctrl-0 = <&emmc_bus8 &emmc_cmd &emmc_clk &emmc_data_strobe>; 389 - supports-cqe; 390 389 vmmc-supply = <&vcc_3v3_s3>; 391 390 vqmmc-supply = <&vcc_1v8_s3>; 392 391 status = "okay";
+1 -1
arch/riscv/boot/dts/starfive/jh7110-pinfunc.h
··· 89 89 #define GPOUT_SYS_SDIO1_DATA1 59 90 90 #define GPOUT_SYS_SDIO1_DATA2 60 91 91 #define GPOUT_SYS_SDIO1_DATA3 61 92 - #define GPOUT_SYS_SDIO1_DATA4 63 92 + #define GPOUT_SYS_SDIO1_DATA4 62 93 93 #define GPOUT_SYS_SDIO1_DATA5 63 94 94 #define GPOUT_SYS_SDIO1_DATA6 64 95 95 #define GPOUT_SYS_SDIO1_DATA7 65
+1
drivers/firmware/imx/imx-scu.c
··· 280 280 return ret; 281 281 282 282 sc_ipc->fast_ipc = of_device_is_compatible(args.np, "fsl,imx8-mu-scu"); 283 + of_node_put(args.np); 283 284 284 285 num_channel = sc_ipc->fast_ipc ? 2 : SCU_MU_CHAN_NUM; 285 286 for (i = 0; i < num_channel; i++) {
+9 -9
drivers/firmware/qcom/qcom_qseecom_uefisecapp.c
··· 814 814 815 815 qcuefi->client = container_of(aux_dev, struct qseecom_client, aux_dev); 816 816 817 - auxiliary_set_drvdata(aux_dev, qcuefi); 818 - status = qcuefi_set_reference(qcuefi); 819 - if (status) 820 - return status; 821 - 822 - status = efivars_register(&qcuefi->efivars, &qcom_efivar_ops); 823 - if (status) 824 - qcuefi_set_reference(NULL); 825 - 826 817 memset(&pool_config, 0, sizeof(pool_config)); 827 818 pool_config.initial_size = SZ_4K; 828 819 pool_config.policy = QCOM_TZMEM_POLICY_MULTIPLIER; ··· 823 832 qcuefi->mempool = devm_qcom_tzmem_pool_new(&aux_dev->dev, &pool_config); 824 833 if (IS_ERR(qcuefi->mempool)) 825 834 return PTR_ERR(qcuefi->mempool); 835 + 836 + auxiliary_set_drvdata(aux_dev, qcuefi); 837 + status = qcuefi_set_reference(qcuefi); 838 + if (status) 839 + return status; 840 + 841 + status = efivars_register(&qcuefi->efivars, &qcom_efivar_ops); 842 + if (status) 843 + qcuefi_set_reference(NULL); 826 844 827 845 return status; 828 846 }
+2 -2
drivers/firmware/qcom/qcom_scm.c
··· 2301 2301 2302 2302 __scm->mempool = devm_qcom_tzmem_pool_new(__scm->dev, &pool_config); 2303 2303 if (IS_ERR(__scm->mempool)) { 2304 - dev_err_probe(__scm->dev, PTR_ERR(__scm->mempool), 2305 - "Failed to create the SCM memory pool\n"); 2304 + ret = dev_err_probe(__scm->dev, PTR_ERR(__scm->mempool), 2305 + "Failed to create the SCM memory pool\n"); 2306 2306 goto err; 2307 2307 } 2308 2308
-20
drivers/memory/omap-gpmc.c
··· 2226 2226 goto err; 2227 2227 } 2228 2228 2229 - if (of_node_name_eq(child, "nand")) { 2230 - /* Warn about older DT blobs with no compatible property */ 2231 - if (!of_property_read_bool(child, "compatible")) { 2232 - dev_warn(&pdev->dev, 2233 - "Incompatible NAND node: missing compatible"); 2234 - ret = -EINVAL; 2235 - goto err; 2236 - } 2237 - } 2238 - 2239 - if (of_node_name_eq(child, "onenand")) { 2240 - /* Warn about older DT blobs with no compatible property */ 2241 - if (!of_property_read_bool(child, "compatible")) { 2242 - dev_warn(&pdev->dev, 2243 - "Incompatible OneNAND node: missing compatible"); 2244 - ret = -EINVAL; 2245 - goto err; 2246 - } 2247 - } 2248 - 2249 2229 if (of_match_node(omap_nand_ids, child)) { 2250 2230 /* NAND specific setup */ 2251 2231 val = 8;
+14 -5
drivers/reset/reset-microchip-sparx5.c
··· 8 8 */ 9 9 #include <linux/mfd/syscon.h> 10 10 #include <linux/of.h> 11 + #include <linux/of_address.h> 11 12 #include <linux/module.h> 12 13 #include <linux/platform_device.h> 13 14 #include <linux/property.h> ··· 73 72 struct device_node *syscon_np) 74 73 { 75 74 struct regmap_config regmap_config = mchp_lan966x_syscon_regmap_config; 76 - resource_size_t size; 75 + struct resource res; 77 76 void __iomem *base; 77 + int err; 78 78 79 - base = devm_of_iomap(dev, syscon_np, 0, &size); 80 - if (IS_ERR(base)) 81 - return ERR_CAST(base); 79 + err = of_address_to_resource(syscon_np, 0, &res); 80 + if (err) 81 + return ERR_PTR(err); 82 82 83 - regmap_config.max_register = size - 4; 83 + /* It is not possible to use devm_of_iomap because this resource is 84 + * shared with other drivers. 85 + */ 86 + base = devm_ioremap(dev, res.start, resource_size(&res)); 87 + if (!base) 88 + return ERR_PTR(-ENOMEM); 89 + 90 + regmap_config.max_register = resource_size(&res) - 4; 84 91 85 92 return devm_regmap_init_mmio(dev, base, &regmap_config); 86 93 }
+2 -2
drivers/soc/hisilicon/kunpeng_hccs.c
··· 1539 1539 u16 i; 1540 1540 1541 1541 for (i = 0; i < hdev->used_type_num - 1; i++) 1542 - len += sysfs_emit(&buf[len], "%s ", hdev->type_name_maps[i].name); 1543 - len += sysfs_emit(&buf[len], "%s\n", hdev->type_name_maps[i].name); 1542 + len += sysfs_emit_at(buf, len, "%s ", hdev->type_name_maps[i].name); 1543 + len += sysfs_emit_at(buf, len, "%s\n", hdev->type_name_maps[i].name); 1544 1544 1545 1545 return len; 1546 1546 }
+24 -2
drivers/soc/imx/soc-imx8m.c
··· 192 192 devm_kasprintf((dev), GFP_KERNEL, "%d.%d", ((soc_rev) >> 4) & 0xf, (soc_rev) & 0xf) : \ 193 193 "unknown" 194 194 195 + static void imx8m_unregister_soc(void *data) 196 + { 197 + soc_device_unregister(data); 198 + } 199 + 200 + static void imx8m_unregister_cpufreq(void *data) 201 + { 202 + platform_device_unregister(data); 203 + } 204 + 195 205 static int imx8m_soc_probe(struct platform_device *pdev) 196 206 { 197 207 struct soc_device_attribute *soc_dev_attr; 208 + struct platform_device *cpufreq_dev; 198 209 const struct imx8_soc_data *data; 199 210 struct device *dev = &pdev->dev; 200 211 const struct of_device_id *id; ··· 250 239 if (IS_ERR(soc_dev)) 251 240 return PTR_ERR(soc_dev); 252 241 242 + ret = devm_add_action(dev, imx8m_unregister_soc, soc_dev); 243 + if (ret) 244 + return ret; 245 + 253 246 pr_info("SoC: %s revision %s\n", soc_dev_attr->soc_id, 254 247 soc_dev_attr->revision); 255 248 256 - if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT)) 257 - platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0); 249 + if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT)) { 250 + cpufreq_dev = platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0); 251 + if (IS_ERR(cpufreq_dev)) 252 + return dev_err_probe(dev, PTR_ERR(cpufreq_dev), 253 + "Failed to register imx-cpufreq-dev device\n"); 254 + ret = devm_add_action(dev, imx8m_unregister_cpufreq, cpufreq_dev); 255 + if (ret) 256 + return ret; 257 + } 258 258 259 259 return 0; 260 260 }
+1 -7
drivers/soc/qcom/pdr_interface.c
··· 75 75 { 76 76 struct pdr_handle *pdr = container_of(qmi, struct pdr_handle, 77 77 locator_hdl); 78 - struct pdr_service *pds; 79 78 80 79 mutex_lock(&pdr->lock); 81 80 /* Create a local client port for QMI communication */ ··· 86 87 mutex_unlock(&pdr->lock); 87 88 88 89 /* Service pending lookup requests */ 89 - mutex_lock(&pdr->list_lock); 90 - list_for_each_entry(pds, &pdr->lookups, node) { 91 - if (pds->need_locator_lookup) 92 - schedule_work(&pdr->locator_work); 93 - } 94 - mutex_unlock(&pdr->list_lock); 90 + schedule_work(&pdr->locator_work); 95 91 96 92 return 0; 97 93 }
+1 -1
drivers/soc/qcom/pmic_glink.c
··· 233 233 234 234 static int pmic_glink_rpmsg_probe(struct rpmsg_device *rpdev) 235 235 { 236 - struct pmic_glink *pg = __pmic_glink; 236 + struct pmic_glink *pg; 237 237 238 238 guard(mutex)(&__pmic_glink_lock); 239 239 pg = __pmic_glink;