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arm64: zynqmp: Switch to ethernet-phy-id in kv260

Use ethernet-phy-id compatible string to properly describe phy reset on
kv260 boards. Previous description wasn't correct because reset was done
for mdio bus to operate and it was in this case used for different purpose
which was eth phy reset. With ethernet-phy-id phy reset happens only for
the phy via phy framework.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4b139e942c2a808eecbb30226b6ea5303348390a.1683034376.git.michal.simek@amd.com

+8 -4
+4 -2
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso
··· 145 145 mdio: mdio { 146 146 #address-cells = <1>; 147 147 #size-cells = <0>; 148 - reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>; 149 - reset-delay-us = <2>; 150 148 151 149 phy0: ethernet-phy@1 { 152 150 #phy-cells = <1>; 153 151 reg = <1>; 152 + compatible = "ethernet-phy-id2000.a231"; 154 153 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 155 154 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>; 156 155 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 157 156 ti,dp83867-rxctrl-strap-quirk; 157 + reset-assert-us = <100>; 158 + reset-deassert-us = <280>; 159 + reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>; 158 160 }; 159 161 }; 160 162 };
+4 -2
arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso
··· 128 128 mdio: mdio { 129 129 #address-cells = <1>; 130 130 #size-cells = <0>; 131 - reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>; 132 - reset-delay-us = <2>; 133 131 134 132 phy0: ethernet-phy@1 { 135 133 #phy-cells = <1>; 136 134 reg = <1>; 135 + compatible = "ethernet-phy-id2000.a231"; 137 136 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 138 137 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_75_NS>; 139 138 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 140 139 ti,dp83867-rxctrl-strap-quirk; 140 + reset-assert-us = <100>; 141 + reset-deassert-us = <280>; 142 + reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>; 141 143 }; 142 144 }; 143 145 };