Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'x86-urgent-2020-02-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner:
"Two fixes for x86:
- Remove the __force_oder definiton from the kaslr boot code as it is
already defined in the page table code which makes GCC 10 builds
fail because it changed the default to -fno-common.
- Address the AMD erratum 1054 concerning the IRPERF capability and
enable the Instructions Retired fixed counter on machines which are
not affected by the erratum"
* tag 'x86-urgent-2020-02-22' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/cpu/amd: Enable the fixed Instructions Retired counter IRPERF
x86/boot/compressed: Don't declare __force_order in kaslr_64.c
+16
-3
-3
arch/x86/boot/compressed/kaslr_64.c
-3
arch/x86/boot/compressed/kaslr_64.c
···
29
29
#define __PAGE_OFFSET __PAGE_OFFSET_BASE
30
30
#include "../../mm/ident_map.c"
31
31
32
-
/* Used by pgtable.h asm code to force instruction serialization. */
33
-
unsigned long __force_order;
34
-
35
32
/* Used to track our page table allocation area. */
36
33
struct alloc_pgt_data {
37
34
unsigned char *pgt_buf;
+2
arch/x86/include/asm/msr-index.h
+2
arch/x86/include/asm/msr-index.h
···
512
512
#define MSR_K7_HWCR 0xc0010015
513
513
#define MSR_K7_HWCR_SMMLOCK_BIT 0
514
514
#define MSR_K7_HWCR_SMMLOCK BIT_ULL(MSR_K7_HWCR_SMMLOCK_BIT)
515
+
#define MSR_K7_HWCR_IRPERF_EN_BIT 30
516
+
#define MSR_K7_HWCR_IRPERF_EN BIT_ULL(MSR_K7_HWCR_IRPERF_EN_BIT)
515
517
#define MSR_K7_FID_VID_CTL 0xc0010041
516
518
#define MSR_K7_FID_VID_STATUS 0xc0010042
517
519
+14
arch/x86/kernel/cpu/amd.c
+14
arch/x86/kernel/cpu/amd.c
···
28
28
29
29
static const int amd_erratum_383[];
30
30
static const int amd_erratum_400[];
31
+
static const int amd_erratum_1054[];
31
32
static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum);
32
33
33
34
/*
···
973
972
/* AMD CPUs don't reset SS attributes on SYSRET, Xen does. */
974
973
if (!cpu_has(c, X86_FEATURE_XENPV))
975
974
set_cpu_bug(c, X86_BUG_SYSRET_SS_ATTRS);
975
+
976
+
/*
977
+
* Turn on the Instructions Retired free counter on machines not
978
+
* susceptible to erratum #1054 "Instructions Retired Performance
979
+
* Counter May Be Inaccurate".
980
+
*/
981
+
if (cpu_has(c, X86_FEATURE_IRPERF) &&
982
+
!cpu_has_amd_erratum(c, amd_erratum_1054))
983
+
msr_set_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT);
976
984
}
977
985
978
986
#ifdef CONFIG_X86_32
···
1108
1098
1109
1099
static const int amd_erratum_383[] =
1110
1100
AMD_OSVW_ERRATUM(3, AMD_MODEL_RANGE(0x10, 0, 0, 0xff, 0xf));
1101
+
1102
+
/* #1054: Instructions Retired Performance Counter May Be Inaccurate */
1103
+
static const int amd_erratum_1054[] =
1104
+
AMD_OSVW_ERRATUM(0, AMD_MODEL_RANGE(0x17, 0, 0, 0x2f, 0xf));
1111
1105
1112
1106
1113
1107
static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum)