Merge tag 'dmaengine-fix-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

+32 -28

drivers/dma/dw-edma/dw-edma-pcie.c

··· 161 161 const struct pci_device_id *pid) 162 162 { 163 163 struct dw_edma_pcie_data *pdata = (void *)pid->driver_data; 164 - struct dw_edma_pcie_data vsec_data; 164 + struct dw_edma_pcie_data *vsec_data __free(kfree) = NULL; 165 165 struct device *dev = &pdev->dev; 166 166 struct dw_edma_chip *chip; 167 167 int err, nr_irqs; 168 168 int i, mask; 169 + 170 + vsec_data = kmalloc(sizeof(*vsec_data), GFP_KERNEL); 171 + if (!vsec_data) 172 + return -ENOMEM; 169 173 170 174 /* Enable PCI device */ 171 175 err = pcim_enable_device(pdev); ··· 178 174 return err; 179 175 } 180 176 181 - memcpy(&vsec_data, pdata, sizeof(struct dw_edma_pcie_data)); 177 + memcpy(vsec_data, pdata, sizeof(struct dw_edma_pcie_data)); 182 178 183 179 /* 184 180 * Tries to find if exists a PCIe Vendor-Specific Extended Capability 185 181 * for the DMA, if one exists, then reconfigures it. 186 182 */ 187 - dw_edma_pcie_get_vsec_dma_data(pdev, &vsec_data); 183 + dw_edma_pcie_get_vsec_dma_data(pdev, vsec_data); 188 184 189 185 /* Mapping PCI BAR regions */ 190 - mask = BIT(vsec_data.rg.bar); 191 - for (i = 0; i < vsec_data.wr_ch_cnt; i++) { 192 - mask |= BIT(vsec_data.ll_wr[i].bar); 193 - mask |= BIT(vsec_data.dt_wr[i].bar); 186 + mask = BIT(vsec_data->rg.bar); 187 + for (i = 0; i < vsec_data->wr_ch_cnt; i++) { 188 + mask |= BIT(vsec_data->ll_wr[i].bar); 189 + mask |= BIT(vsec_data->dt_wr[i].bar); 194 190 } 195 - for (i = 0; i < vsec_data.rd_ch_cnt; i++) { 196 - mask |= BIT(vsec_data.ll_rd[i].bar); 197 - mask |= BIT(vsec_data.dt_rd[i].bar); 191 + for (i = 0; i < vsec_data->rd_ch_cnt; i++) { 192 + mask |= BIT(vsec_data->ll_rd[i].bar); 193 + mask |= BIT(vsec_data->dt_rd[i].bar); 198 194 } 199 195 err = pcim_iomap_regions(pdev, mask, pci_name(pdev)); 200 196 if (err) { ··· 217 213 return -ENOMEM; 218 214 219 215 /* IRQs allocation */ 220 - nr_irqs = pci_alloc_irq_vectors(pdev, 1, vsec_data.irqs, 216 + nr_irqs = pci_alloc_irq_vectors(pdev, 1, vsec_data->irqs, 221 217 PCI_IRQ_MSI | PCI_IRQ_MSIX); 222 218 if (nr_irqs < 1) { 223 219 pci_err(pdev, "fail to alloc IRQ vector (number of IRQs=%u)\n", ··· 228 224 /* Data structure initialization */ 229 225 chip->dev = dev; 230 226 231 - chip->mf = vsec_data.mf; 227 + chip->mf = vsec_data->mf; 232 228 chip->nr_irqs = nr_irqs; 233 229 chip->ops = &dw_edma_pcie_plat_ops; 234 230 235 - chip->ll_wr_cnt = vsec_data.wr_ch_cnt; 236 - chip->ll_rd_cnt = vsec_data.rd_ch_cnt; 231 + chip->ll_wr_cnt = vsec_data->wr_ch_cnt; 232 + chip->ll_rd_cnt = vsec_data->rd_ch_cnt; 237 233 238 - chip->reg_base = pcim_iomap_table(pdev)[vsec_data.rg.bar]; 234 + chip->reg_base = pcim_iomap_table(pdev)[vsec_data->rg.bar]; 239 235 if (!chip->reg_base) 240 236 return -ENOMEM; 241 237 242 238 for (i = 0; i < chip->ll_wr_cnt; i++) { 243 239 struct dw_edma_region *ll_region = &chip->ll_region_wr[i]; 244 240 struct dw_edma_region *dt_region = &chip->dt_region_wr[i]; 245 - struct dw_edma_block *ll_block = &vsec_data.ll_wr[i]; 246 - struct dw_edma_block *dt_block = &vsec_data.dt_wr[i]; 241 + struct dw_edma_block *ll_block = &vsec_data->ll_wr[i]; 242 + struct dw_edma_block *dt_block = &vsec_data->dt_wr[i]; 247 243 248 244 ll_region->vaddr.io = pcim_iomap_table(pdev)[ll_block->bar]; 249 245 if (!ll_region->vaddr.io) ··· 267 263 for (i = 0; i < chip->ll_rd_cnt; i++) { 268 264 struct dw_edma_region *ll_region = &chip->ll_region_rd[i]; 269 265 struct dw_edma_region *dt_region = &chip->dt_region_rd[i]; 270 - struct dw_edma_block *ll_block = &vsec_data.ll_rd[i]; 271 - struct dw_edma_block *dt_block = &vsec_data.dt_rd[i]; 266 + struct dw_edma_block *ll_block = &vsec_data->ll_rd[i]; 267 + struct dw_edma_block *dt_block = &vsec_data->dt_rd[i]; 272 268 273 269 ll_region->vaddr.io = pcim_iomap_table(pdev)[ll_block->bar]; 274 270 if (!ll_region->vaddr.io) ··· 302 298 pci_dbg(pdev, "Version:\tUnknown (0x%x)\n", chip->mf); 303 299 304 300 pci_dbg(pdev, "Registers:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p)\n", 305 - vsec_data.rg.bar, vsec_data.rg.off, vsec_data.rg.sz, 301 + vsec_data->rg.bar, vsec_data->rg.off, vsec_data->rg.sz, 306 302 chip->reg_base); 307 303 308 304 309 305 for (i = 0; i < chip->ll_wr_cnt; i++) { 310 306 pci_dbg(pdev, "L. List:\tWRITE CH%.2u, BAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n", 311 - i, vsec_data.ll_wr[i].bar, 312 - vsec_data.ll_wr[i].off, chip->ll_region_wr[i].sz, 307 + i, vsec_data->ll_wr[i].bar, 308 + vsec_data->ll_wr[i].off, chip->ll_region_wr[i].sz, 313 309 chip->ll_region_wr[i].vaddr.io, &chip->ll_region_wr[i].paddr); 314 310 315 311 pci_dbg(pdev, "Data:\tWRITE CH%.2u, BAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n", 316 - i, vsec_data.dt_wr[i].bar, 317 - vsec_data.dt_wr[i].off, chip->dt_region_wr[i].sz, 312 + i, vsec_data->dt_wr[i].bar, 313 + vsec_data->dt_wr[i].off, chip->dt_region_wr[i].sz, 318 314 chip->dt_region_wr[i].vaddr.io, &chip->dt_region_wr[i].paddr); 319 315 } 320 316 321 317 for (i = 0; i < chip->ll_rd_cnt; i++) { 322 318 pci_dbg(pdev, "L. List:\tREAD CH%.2u, BAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n", 323 - i, vsec_data.ll_rd[i].bar, 324 - vsec_data.ll_rd[i].off, chip->ll_region_rd[i].sz, 319 + i, vsec_data->ll_rd[i].bar, 320 + vsec_data->ll_rd[i].off, chip->ll_region_rd[i].sz, 325 321 chip->ll_region_rd[i].vaddr.io, &chip->ll_region_rd[i].paddr); 326 322 327 323 pci_dbg(pdev, "Data:\tREAD CH%.2u, BAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n", 328 - i, vsec_data.dt_rd[i].bar, 329 - vsec_data.dt_rd[i].off, chip->dt_region_rd[i].sz, 324 + i, vsec_data->dt_rd[i].bar, 325 + vsec_data->dt_rd[i].off, chip->dt_region_rd[i].sz, 330 326 chip->dt_region_rd[i].vaddr.io, &chip->dt_region_rd[i].paddr); 331 327 } 332 328

+2 -2

drivers/dma/mediatek/mtk-cqdma.c

··· 449 449 return ret; 450 450 451 451 spin_lock_irqsave(&cvc->pc->lock, flags); 452 - spin_lock_irqsave(&cvc->vc.lock, flags); 452 + spin_lock(&cvc->vc.lock); 453 453 vd = mtk_cqdma_find_active_desc(c, cookie); 454 - spin_unlock_irqrestore(&cvc->vc.lock, flags); 454 + spin_unlock(&cvc->vc.lock); 455 455 spin_unlock_irqrestore(&cvc->pc->lock, flags); 456 456 457 457 if (vd) {

+5 -6

drivers/dma/nbpfaxi.c

··· 1351 1351 if (irqs == 1) { 1352 1352 eirq = irqbuf[0]; 1353 1353 1354 - for (i = 0; i <= num_channels; i++) 1354 + for (i = 0; i < num_channels; i++) 1355 1355 nbpf->chan[i].irq = irqbuf[0]; 1356 1356 } else { 1357 1357 eirq = platform_get_irq_byname(pdev, "error"); ··· 1361 1361 if (irqs == num_channels + 1) { 1362 1362 struct nbpf_channel *chan; 1363 1363 1364 - for (i = 0, chan = nbpf->chan; i <= num_channels; 1364 + for (i = 0, chan = nbpf->chan; i < num_channels; 1365 1365 i++, chan++) { 1366 1366 /* Skip the error IRQ */ 1367 1367 if (irqbuf[i] == eirq) 1368 1368 i++; 1369 + if (i >= ARRAY_SIZE(irqbuf)) 1370 + return -EINVAL; 1369 1371 chan->irq = irqbuf[i]; 1370 1372 } 1371 - 1372 - if (chan != nbpf->chan + num_channels) 1373 - return -EINVAL; 1374 1373 } else { 1375 1374 /* 2 IRQs and more than one channel */ 1376 1375 if (irqbuf[0] == eirq) ··· 1377 1378 else 1378 1379 irq = irqbuf[0]; 1379 1380 1380 - for (i = 0; i <= num_channels; i++) 1381 + for (i = 0; i < num_channels; i++) 1381 1382 nbpf->chan[i].irq = irq; 1382 1383 } 1383 1384 }

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