tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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riscv: dts: nezha-d1: add gpio-line-names

Add descriptive names so users can associate specific lines with their
respective pins on the 40-pin header according to the schematics.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Link: http://dl.linux-sunxi.org/D1/D1_Nezha_development_board_schematic_diagram_20210224.pdf
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230210025132.36605-2-twoerner@gmail.com
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>

authored by

Trevor Woerner and committed by
Jernej Skrabec fce449f5 23ca1dd4

+72
+72
arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts
··· 1 1 // SPDX-License-Identifier: (GPL-2.0+ or MIT) 2 2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org> 3 3 4 + /* 5 + * gpio line names 6 + * 7 + * The Nezha-D1 has a 40-pin IO header. Some of these pins are routed 8 + * directly to pads on the SoC, others come from an 8-bit pcf857x IO 9 + * expander. Therefore, these line names are specified in two places: 10 + * one set for the pcf857x, and one set for the pio controller. 11 + * 12 + * Lines which are routed to the 40-pin header are named as follows: 13 + * <pin#> [<pin name>] 14 + * where: 15 + * <pin#> is the actual pin number of the 40-pin header 16 + * <pin name> is the name of the pin by function/gpio# 17 + * 18 + * For details regarding pin numbers and names see the schematics (under 19 + * "IO EXPAND"): 20 + * http://dl.linux-sunxi.org/D1/D1_Nezha_development_board_schematic_diagram_20210224.pdf 21 + */ 22 + 4 23 #include <dt-bindings/gpio/gpio.h> 5 24 #include <dt-bindings/input/input.h> 6 25 ··· 109 90 gpio-controller; 110 91 #gpio-cells = <2>; 111 92 #interrupt-cells = <2>; 93 + gpio-line-names = 94 + "pin13 [gpio8]", 95 + "pin16 [gpio10]", 96 + "pin18 [gpio11]", 97 + "pin26 [gpio17]", 98 + "pin22 [gpio14]", 99 + "pin28 [gpio19]", 100 + "pin37 [gpio23]", 101 + "pin11 [gpio6]"; 112 102 }; 113 103 }; 114 104 ··· 191 163 usb0_vbus-supply = <&reg_usbvbus>; 192 164 usb1_vbus-supply = <&reg_vcc>; 193 165 status = "okay"; 166 + }; 167 + 168 + &pio { 169 + gpio-line-names = 170 + /* Port A */ 171 + "", "", "", "", "", "", "", "", 172 + "", "", "", "", "", "", "", "", 173 + "", "", "", "", "", "", "", "", 174 + "", "", "", "", "", "", "", "", 175 + /* Port B */ 176 + "pin5 [gpio2/twi2-sck]", 177 + "pin3 [gpio1/twi2-sda]", 178 + "", 179 + "pin38 [gpio24/i2s2-din]", 180 + "pin40 [gpio25/i2s2-dout]", 181 + "pin12 [gpio7/i2s-clk]", 182 + "pin35 [gpio22/i2s2-lrck]", 183 + "", 184 + "pin8 [gpio4/uart0-txd]", 185 + "pin10 [gpio5/uart0-rxd]", 186 + "", 187 + "", 188 + "pin15 [gpio9]", 189 + "", "", "", "", 190 + "", "", "", "", "", "", "", "", 191 + "", "", "", "", "", "", "", "", 192 + /* Port C */ 193 + "", 194 + "pin31 [gpio21]", 195 + "", "", "", "", "", "", 196 + "", "", "", "", "", "", "", "", 197 + "", "", "", "", "", "", "", "", 198 + "", "", "", "", "", "", "", "", 199 + /* Port D */ 200 + "", "", "", "", "", "", "", "", 201 + "", "", 202 + "pin24 [gpio16/spi1-ce0]", 203 + "pin23 [gpio15/spi1-clk]", 204 + "pin19 [gpio12/spi1-mosi]", 205 + "pin21 [gpio13/spi1-miso]", 206 + "pin27 [gpio18/spi1-hold]", 207 + "pin29 [gpio20/spi1-wp]", 208 + "", "", "", "", "", "", 209 + "pin7 [gpio3/pwm]"; 194 210 };