Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'fixes-s3c-2632-rc5' of git://git.fluff.org/bjdooks/linux
* 'fixes-s3c-2632-rc5' of git://git.fluff.org/bjdooks/linux:
ARM: S3C2410: Fix sparse warnings in arch/arm/mach-s3c2410/gpio.c
ARM: S3C2440: mini2440: Fix spare warnings
ARM: S3C24XX: Fix warnings in arch/arm/plat-s3c24xx/gpio.c
ARM: S3C2440: mini2440: Fix missing CONFIG_S3C_DEV_USB_HOST
ARM: S3C24XX: arch/arm/plat-s3c24xx: Move dereference after NULL test
ARM: S3C: Fix adc function exports
ARM: S3C2410: Fix link if CONFIG_S3C2410_IOTIMING is not set
ARM: S3C24XX: Introduce S3C2442B CPU
ARM: S3C24XX: Define a macro to avoid compilation error
ARM: S3C: Add info for supporting circular DMA buffers
ARM: S3C64XX: Set rate of crystal mux
ARM: S3C64XX: Fix S3C64XX_CLKDIV0_ARM_MASK value
+59
-12
+1
arch/arm/mach-s3c2410/gpio.c
+1
arch/arm/mach-s3c2410/gpio.c
+7
arch/arm/mach-s3c2410/include/mach/dma.h
+7
arch/arm/mach-s3c2410/include/mach/dma.h
···
110
110
* waiting for reloads */
111
111
#define S3C2410_DMAF_AUTOSTART (1<<1) /* auto-start if buffer queued */
112
112
113
+
#define S3C2410_DMAF_CIRCULAR (1 << 2) /* no circular dma support */
114
+
113
115
/* dma buffer */
114
116
115
117
struct s3c2410_dma_buf;
···
195
193
};
196
194
197
195
typedef unsigned long dma_device_t;
196
+
197
+
static inline bool s3c_dma_has_circular(void)
198
+
{
199
+
return false;
200
+
}
198
201
199
202
#endif /* __ASM_ARCH_DMA_H */
+1
arch/arm/mach-s3c2440/Kconfig
+1
arch/arm/mach-s3c2440/Kconfig
···
103
103
select LEDS_TRIGGER_BACKLIGHT
104
104
select SND_S3C24XX_SOC_S3C24XX_UDA134X
105
105
select S3C_DEV_NAND
106
+
select S3C_DEV_USB_HOST
106
107
help
107
108
Say Y here to select support for the MINI2440. Is a 10cm x 10cm board
108
109
available via various sources. It can come with a 3.5" or 7" touch LCD.
+2
-2
arch/arm/mach-s3c2440/mach-mini2440.c
+2
-2
arch/arm/mach-s3c2440/mach-mini2440.c
···
144
144
.type = (S3C2410_LCDCON1_TFT16BPP |\
145
145
S3C2410_LCDCON1_TFT)
146
146
147
-
struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
147
+
static struct s3c2410fb_display mini2440_lcd_cfg[] __initdata = {
148
148
[0] = { /* mini2440 + 3.5" TFT + touchscreen */
149
149
_LCD_DECLARE(
150
150
7, /* The 3.5 is quite fast */
···
191
191
#define S3C2410_GPCCON_MASK(x) (3 << ((x) * 2))
192
192
#define S3C2410_GPDCON_MASK(x) (3 << ((x) * 2))
193
193
194
-
struct s3c2410fb_mach_info mini2440_fb_info __initdata = {
194
+
static struct s3c2410fb_mach_info mini2440_fb_info __initdata = {
195
195
.displays = &mini2440_lcd_cfg[0], /* not constant! see init */
196
196
.num_displays = 1,
197
197
.default_display = 0,
+5
arch/arm/mach-s3c6400/include/mach/dma.h
+5
arch/arm/mach-s3c6400/include/mach/dma.h
+1
-1
arch/arm/plat-s3c24xx/adc.c
+1
-1
arch/arm/plat-s3c24xx/adc.c
+10
arch/arm/plat-s3c24xx/cpu.c
+10
arch/arm/plat-s3c24xx/cpu.c
···
61
61
static const char name_s3c2412[] = "S3C2412";
62
62
static const char name_s3c2440[] = "S3C2440";
63
63
static const char name_s3c2442[] = "S3C2442";
64
+
static const char name_s3c2442b[] = "S3C2442B";
64
65
static const char name_s3c2443[] = "S3C2443";
65
66
static const char name_s3c2410a[] = "S3C2410A";
66
67
static const char name_s3c2440a[] = "S3C2440A";
···
111
110
.init_uarts = s3c244x_init_uarts,
112
111
.init = s3c2442_init,
113
112
.name = name_s3c2442
113
+
},
114
+
{
115
+
.idcode = 0x32440aab,
116
+
.idmask = 0xffffffff,
117
+
.map_io = s3c244x_map_io,
118
+
.init_clocks = s3c244x_init_clocks,
119
+
.init_uarts = s3c244x_init_uarts,
120
+
.init = s3c2442_init,
121
+
.name = name_s3c2442b
114
122
},
115
123
{
116
124
.idcode = 0x32412001,
+3
-3
arch/arm/plat-s3c24xx/dma.c
+3
-3
arch/arm/plat-s3c24xx/dma.c
···
208
208
{
209
209
unsigned long reload;
210
210
211
-
pr_debug("s3c2410_chan_loadbuffer: loading buff %p (0x%08lx,0x%06x)\n",
212
-
buf, (unsigned long)buf->data, buf->size);
213
-
214
211
if (buf == NULL) {
215
212
dmawarn("buffer is NULL\n");
216
213
return -EINVAL;
217
214
}
215
+
216
+
pr_debug("s3c2410_chan_loadbuffer: loading buff %p (0x%08lx,0x%06x)\n",
217
+
buf, (unsigned long)buf->data, buf->size);
218
218
219
219
/* check the state of the channel before we do anything */
220
220
+1
arch/arm/plat-s3c24xx/gpio.c
+1
arch/arm/plat-s3c24xx/gpio.c
+7
-2
arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
+7
-2
arch/arm/plat-s3c24xx/include/plat/cpu-freq-core.h
···
222
222
/* S3C2410 and compatible exported functions */
223
223
224
224
extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg);
225
+
extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
225
226
227
+
#ifdef CONFIG_S3C2410_IOTIMING
226
228
extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg,
227
229
struct s3c_iotimings *iot);
228
230
···
233
231
234
232
extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg,
235
233
struct s3c_iotimings *iot);
236
-
237
-
extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg);
234
+
#else
235
+
#define s3c2410_iotiming_calc NULL
236
+
#define s3c2410_iotiming_get NULL
237
+
#define s3c2410_iotiming_set NULL
238
+
#endif /* CONFIG_S3C2410_IOTIMING */
238
239
239
240
/* S3C2412 compatible routines */
240
241
+1
arch/arm/plat-s3c24xx/include/plat/s3c2410.h
+1
arch/arm/plat-s3c24xx/include/plat/s3c2410.h
+2
-2
arch/arm/plat-s3c64xx/include/plat/regs-clock.h
+2
-2
arch/arm/plat-s3c64xx/include/plat/regs-clock.h
···
51
51
#define S3C6400_CLKDIV0_HCLK_SHIFT (8)
52
52
#define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4)
53
53
#define S3C6400_CLKDIV0_MPLL_SHIFT (4)
54
-
#define S3C6400_CLKDIV0_ARM_MASK (0x3 << 0)
55
-
#define S3C6410_CLKDIV0_ARM_MASK (0x7 << 0)
54
+
#define S3C6400_CLKDIV0_ARM_MASK (0x7 << 0)
55
+
#define S3C6410_CLKDIV0_ARM_MASK (0xf << 0)
56
56
#define S3C6400_CLKDIV0_ARM_SHIFT (0)
57
57
58
58
/* CLKDIV1 */
+3
arch/arm/plat-s3c64xx/s3c6400-clock.c
+3
arch/arm/plat-s3c64xx/s3c6400-clock.c
···
677
677
678
678
printk(KERN_DEBUG "%s: xtal is %ld\n", __func__, xtal);
679
679
680
+
/* For now assume the mux always selects the crystal */
681
+
clk_ext_xtal_mux.parent = xtal_clk;
682
+
680
683
epll = s3c6400_get_epll(xtal);
681
684
mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON));
682
685
apll = s3c6400_get_pll(xtal, __raw_readl(S3C_APLL_CON));
+15
-2
sound/soc/s3c24xx/s3c24xx-pcm.c
+15
-2
sound/soc/s3c24xx/s3c24xx-pcm.c
···
75
75
{
76
76
struct s3c24xx_runtime_data *prtd = substream->runtime->private_data;
77
77
dma_addr_t pos = prtd->dma_pos;
78
+
unsigned int limit;
78
79
int ret;
79
80
80
81
pr_debug("Entered %s\n", __func__);
81
82
82
-
while (prtd->dma_loaded < prtd->dma_limit) {
83
+
if (s3c_dma_has_circular()) {
84
+
limit = (prtd->dma_end - prtd->dma_start) / prtd->dma_period;
85
+
} else
86
+
limit = prtd->dma_limit;
87
+
88
+
pr_debug("%s: loaded %d, limit %d\n", __func__, prtd->dma_loaded, limit);
89
+
90
+
while (prtd->dma_loaded < limit) {
83
91
unsigned long len = prtd->dma_period;
84
92
85
93
pr_debug("dma_loaded: %d\n", prtd->dma_loaded);
···
131
123
snd_pcm_period_elapsed(substream);
132
124
133
125
spin_lock(&prtd->lock);
134
-
if (prtd->state & ST_RUNNING) {
126
+
if (prtd->state & ST_RUNNING && !s3c_dma_has_circular()) {
135
127
prtd->dma_loaded--;
136
128
s3c24xx_pcm_enqueue(substream);
137
129
}
···
172
164
printk(KERN_ERR "failed to get dma channel\n");
173
165
return ret;
174
166
}
167
+
168
+
/* use the circular buffering if we have it available. */
169
+
if (s3c_dma_has_circular())
170
+
s3c2410_dma_setflags(prtd->params->channel,
171
+
S3C2410_DMAF_CIRCULAR);
175
172
}
176
173
177
174
s3c2410_dma_set_buffdone_fn(prtd->params->channel,