Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
RISC-V: KVM: Implement VMID allocator
We implement a simple VMID allocator for Guests/VMs which:
1. Detects number of VMID bits at boot-time
2. Uses atomic number to track VMID version and increments
VMID version whenever we run-out of VMIDs
3. Flushes Guest TLBs on all host CPUs whenever we run-out
of VMIDs
4. Force updates HW Stage2 VMID for each Guest VCPU whenever
VMID changes using VCPU request KVM_REQ_UPDATE_HGATP
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Alexander Graf <graf@amazon.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
authored by
Anup Patel
and committed by
Anup Patel
fd7bb4a2
5a5d79ac
+249
-2
+24
arch/riscv/include/asm/kvm_host.h
+24
arch/riscv/include/asm/kvm_host.h
···
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26
#define KVM_REQ_SLEEP \
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KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
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#define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(1)
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#define KVM_REQ_UPDATE_HGATP KVM_ARCH_REQ(2)
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struct kvm_vm_stat {
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struct kvm_vm_stat_generic generic;
···
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struct kvm_arch_memory_slot {
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};
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struct kvm_vmid {
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/*
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* Writes to vmid_version and vmid happen with vmid_lock held
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* whereas reads happen without any lock held.
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*/
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unsigned long vmid_version;
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unsigned long vmid;
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};
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+
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struct kvm_arch {
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/* stage2 vmid */
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struct kvm_vmid vmid;
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/* stage2 page table */
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pgd_t *pgd;
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phys_addr_t pgd_phys;
···
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static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
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static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
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void __kvm_riscv_hfence_gvma_vmid_gpa(unsigned long gpa, unsigned long vmid);
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void __kvm_riscv_hfence_gvma_vmid(unsigned long vmid);
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void __kvm_riscv_hfence_gvma_gpa(unsigned long gpa);
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void __kvm_riscv_hfence_gvma_all(void);
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int kvm_riscv_stage2_map(struct kvm_vcpu *vcpu,
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struct kvm_memory_slot *memslot,
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gpa_t gpa, unsigned long hva, bool is_write);
···
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int kvm_riscv_stage2_alloc_pgd(struct kvm *kvm);
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void kvm_riscv_stage2_free_pgd(struct kvm *kvm);
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void kvm_riscv_stage2_update_hgatp(struct kvm_vcpu *vcpu);
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void kvm_riscv_stage2_vmid_detect(void);
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unsigned long kvm_riscv_stage2_vmid_bits(void);
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int kvm_riscv_stage2_vmid_init(struct kvm *kvm);
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bool kvm_riscv_stage2_vmid_ver_changed(struct kvm_vmid *vmid);
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void kvm_riscv_stage2_vmid_update(struct kvm_vcpu *vcpu);
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void __kvm_riscv_unpriv_trap(void);
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+12
-2
arch/riscv/kvm/Makefile
+12
-2
arch/riscv/kvm/Makefile
···
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obj-$(CONFIG_KVM) += kvm.o
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-
kvm-y += $(KVM)/kvm_main.o $(KVM)/coalesced_mmio.o $(KVM)/binary_stats.o \
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-
$(KVM)/eventfd.o main.o vm.o mmu.o vcpu.o vcpu_exit.o vcpu_switch.o
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kvm-y += $(KVM)/kvm_main.o
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kvm-y += $(KVM)/coalesced_mmio.o
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kvm-y += $(KVM)/binary_stats.o
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kvm-y += $(KVM)/eventfd.o
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kvm-y += main.o
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kvm-y += vm.o
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kvm-y += vmid.o
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kvm-y += tlb.o
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kvm-y += mmu.o
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kvm-y += vcpu.o
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kvm-y += vcpu_exit.o
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kvm-y += vcpu_switch.o
+4
arch/riscv/kvm/main.c
+4
arch/riscv/kvm/main.c
+74
arch/riscv/kvm/tlb.S
+74
arch/riscv/kvm/tlb.S
···
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <linux/linkage.h>
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#include <asm/asm.h>
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+
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.text
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.altmacro
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.option norelax
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+
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/*
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* Instruction encoding of hfence.gvma is:
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* HFENCE.GVMA rs1, rs2
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* HFENCE.GVMA zero, rs2
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* HFENCE.GVMA rs1
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* HFENCE.GVMA
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*
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* rs1!=zero and rs2!=zero ==> HFENCE.GVMA rs1, rs2
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* rs1==zero and rs2!=zero ==> HFENCE.GVMA zero, rs2
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* rs1!=zero and rs2==zero ==> HFENCE.GVMA rs1
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* rs1==zero and rs2==zero ==> HFENCE.GVMA
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*
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* Instruction encoding of HFENCE.GVMA is:
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* 0110001 rs2(5) rs1(5) 000 00000 1110011
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*/
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ENTRY(__kvm_riscv_hfence_gvma_vmid_gpa)
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/*
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* rs1 = a0 (GPA)
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* rs2 = a1 (VMID)
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* HFENCE.GVMA a0, a1
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* 0110001 01011 01010 000 00000 1110011
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*/
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.word 0x62b50073
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ret
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ENDPROC(__kvm_riscv_hfence_gvma_vmid_gpa)
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ENTRY(__kvm_riscv_hfence_gvma_vmid)
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/*
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* rs1 = zero
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* rs2 = a0 (VMID)
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* HFENCE.GVMA zero, a0
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* 0110001 01010 00000 000 00000 1110011
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*/
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.word 0x62a00073
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ret
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ENDPROC(__kvm_riscv_hfence_gvma_vmid)
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ENTRY(__kvm_riscv_hfence_gvma_gpa)
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/*
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* rs1 = a0 (GPA)
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* rs2 = zero
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* HFENCE.GVMA a0
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* 0110001 00000 01010 000 00000 1110011
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*/
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.word 0x62050073
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ret
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ENDPROC(__kvm_riscv_hfence_gvma_gpa)
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ENTRY(__kvm_riscv_hfence_gvma_all)
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/*
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* rs1 = zero
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* rs2 = zero
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* HFENCE.GVMA
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* 0110001 00000 00000 000 00000 1110011
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*/
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.word 0x62000073
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ret
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ENDPROC(__kvm_riscv_hfence_gvma_all)
+9
arch/riscv/kvm/vcpu.c
+9
arch/riscv/kvm/vcpu.c
···
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if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu))
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kvm_riscv_reset_vcpu(vcpu);
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if (kvm_check_request(KVM_REQ_UPDATE_HGATP, vcpu))
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kvm_riscv_stage2_update_hgatp(vcpu);
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if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
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__kvm_riscv_hfence_gvma_all();
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}
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}
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···
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/* Check conditions before entering the guest */
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cond_resched();
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kvm_riscv_stage2_vmid_update(vcpu);
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kvm_riscv_check_vcpu_requests(vcpu);
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preempt_disable();
···
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kvm_riscv_update_hvip(vcpu);
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if (ret <= 0 ||
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kvm_riscv_stage2_vmid_ver_changed(&vcpu->kvm->arch.vmid) ||
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kvm_request_pending(vcpu)) {
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vcpu->mode = OUTSIDE_GUEST_MODE;
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local_irq_enable();
+6
arch/riscv/kvm/vm.c
+6
arch/riscv/kvm/vm.c
+120
arch/riscv/kvm/vmid.c
+120
arch/riscv/kvm/vmid.c
···
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <linux/bitops.h>
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#include <linux/cpumask.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/kvm_host.h>
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#include <asm/csr.h>
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#include <asm/sbi.h>
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static unsigned long vmid_version = 1;
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static unsigned long vmid_next;
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static unsigned long vmid_bits;
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static DEFINE_SPINLOCK(vmid_lock);
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void kvm_riscv_stage2_vmid_detect(void)
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{
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unsigned long old;
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/* Figure-out number of VMID bits in HW */
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old = csr_read(CSR_HGATP);
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csr_write(CSR_HGATP, old | HGATP_VMID_MASK);
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vmid_bits = csr_read(CSR_HGATP);
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vmid_bits = (vmid_bits & HGATP_VMID_MASK) >> HGATP_VMID_SHIFT;
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vmid_bits = fls_long(vmid_bits);
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csr_write(CSR_HGATP, old);
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/* We polluted local TLB so flush all guest TLB */
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__kvm_riscv_hfence_gvma_all();
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/* We don't use VMID bits if they are not sufficient */
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if ((1UL << vmid_bits) < num_possible_cpus())
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vmid_bits = 0;
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}
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unsigned long kvm_riscv_stage2_vmid_bits(void)
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{
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return vmid_bits;
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}
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int kvm_riscv_stage2_vmid_init(struct kvm *kvm)
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{
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/* Mark the initial VMID and VMID version invalid */
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kvm->arch.vmid.vmid_version = 0;
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kvm->arch.vmid.vmid = 0;
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return 0;
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}
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bool kvm_riscv_stage2_vmid_ver_changed(struct kvm_vmid *vmid)
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{
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if (!vmid_bits)
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return false;
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return unlikely(READ_ONCE(vmid->vmid_version) !=
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READ_ONCE(vmid_version));
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}
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void kvm_riscv_stage2_vmid_update(struct kvm_vcpu *vcpu)
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{
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int i;
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struct kvm_vcpu *v;
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struct cpumask hmask;
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struct kvm_vmid *vmid = &vcpu->kvm->arch.vmid;
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if (!kvm_riscv_stage2_vmid_ver_changed(vmid))
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return;
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spin_lock(&vmid_lock);
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/*
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* We need to re-check the vmid_version here to ensure that if
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* another vcpu already allocated a valid vmid for this vm.
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*/
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if (!kvm_riscv_stage2_vmid_ver_changed(vmid)) {
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spin_unlock(&vmid_lock);
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return;
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}
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/* First user of a new VMID version? */
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if (unlikely(vmid_next == 0)) {
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WRITE_ONCE(vmid_version, READ_ONCE(vmid_version) + 1);
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vmid_next = 1;
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/*
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* We ran out of VMIDs so we increment vmid_version and
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* start assigning VMIDs from 1.
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*
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* This also means existing VMIDs assignement to all Guest
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* instances is invalid and we have force VMID re-assignement
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* for all Guest instances. The Guest instances that were not
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* running will automatically pick-up new VMIDs because will
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* call kvm_riscv_stage2_vmid_update() whenever they enter
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* in-kernel run loop. For Guest instances that are already
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* running, we force VM exits on all host CPUs using IPI and
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* flush all Guest TLBs.
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*/
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riscv_cpuid_to_hartid_mask(cpu_online_mask, &hmask);
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sbi_remote_hfence_gvma(cpumask_bits(&hmask), 0, 0);
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}
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+
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vmid->vmid = vmid_next;
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vmid_next++;
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vmid_next &= (1 << vmid_bits) - 1;
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WRITE_ONCE(vmid->vmid_version, READ_ONCE(vmid_version));
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spin_unlock(&vmid_lock);
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+
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/* Request stage2 page table update for all VCPUs */
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kvm_for_each_vcpu(i, v, vcpu->kvm)
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kvm_make_request(KVM_REQ_UPDATE_HGATP, v);
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}