Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
RDMA/erdma: Unify the names related to doorbell records
There exist two different names for the doorbell records: db_info and
db_record. We use dbrec for cpu address of the doorbell record and
dbrec_dma for dma address of the doorbell recordi uniformly.
Reviewed-by: Cheng Xu <chengyou@linux.alibaba.com>
Signed-off-by: Boshi Yu <boshiyu@linux.alibaba.com>
Link: https://lore.kernel.org/r/20240311113821.22482-3-boshiyu@alibaba-inc.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
authored by
Boshi Yu
and committed by
Leon Romanovsky
fdb09ed1
f0697bf0
+79
-93
+6
-6
drivers/infiniband/hw/erdma/erdma.h
+6
-6
drivers/infiniband/hw/erdma/erdma.h
···
33
33
atomic64_t notify_num;
34
34
35
35
void __iomem *db;
36
-
u64 *db_record;
37
-
dma_addr_t db_record_dma_addr;
36
+
u64 *dbrec;
37
+
dma_addr_t dbrec_dma;
38
38
};
39
39
40
40
struct erdma_cmdq_sq {
···
49
49
50
50
u16 wqebb_cnt;
51
51
52
-
u64 *db_record;
53
-
dma_addr_t db_record_dma_addr;
52
+
u64 *dbrec;
53
+
dma_addr_t dbrec_dma;
54
54
};
55
55
56
56
struct erdma_cmdq_cq {
···
63
63
u32 ci;
64
64
u32 cmdsn;
65
65
66
-
u64 *db_record;
67
-
dma_addr_t db_record_dma_addr;
66
+
u64 *dbrec;
67
+
dma_addr_t dbrec_dma;
68
68
69
69
atomic64_t armed_num;
70
70
};
+16
-27
drivers/infiniband/hw/erdma/erdma_cmdq.c
+16
-27
drivers/infiniband/hw/erdma/erdma_cmdq.c
···
14
14
FIELD_PREP(ERDMA_CQDB_CMDSN_MASK, cmdq->cq.cmdsn) |
15
15
FIELD_PREP(ERDMA_CQDB_IDX_MASK, cmdq->cq.cmdsn);
16
16
17
-
*cmdq->cq.db_record = db_data;
17
+
*cmdq->cq.dbrec = db_data;
18
18
writeq(db_data, dev->func_bar + ERDMA_CMDQ_CQDB_REG);
19
19
20
20
atomic64_inc(&cmdq->cq.armed_num);
···
25
25
struct erdma_dev *dev = container_of(cmdq, struct erdma_dev, cmdq);
26
26
u64 db_data = FIELD_PREP(ERDMA_CMD_HDR_WQEBB_INDEX_MASK, cmdq->sq.pi);
27
27
28
-
*cmdq->sq.db_record = db_data;
28
+
*cmdq->sq.dbrec = db_data;
29
29
writeq(db_data, dev->func_bar + ERDMA_CMDQ_SQDB_REG);
30
30
}
31
31
···
98
98
if (!sq->qbuf)
99
99
return -ENOMEM;
100
100
101
-
sq->db_record = dma_pool_zalloc(dev->db_pool, GFP_KERNEL,
102
-
&sq->db_record_dma_addr);
103
-
if (!sq->db_record)
101
+
sq->dbrec = dma_pool_zalloc(dev->db_pool, GFP_KERNEL, &sq->dbrec_dma);
102
+
if (!sq->dbrec)
104
103
goto err_out;
105
104
106
105
spin_lock_init(&sq->lock);
···
109
110
erdma_reg_write32(dev, ERDMA_REGS_CMDQ_SQ_ADDR_L_REG,
110
111
lower_32_bits(sq->qbuf_dma_addr));
111
112
erdma_reg_write32(dev, ERDMA_REGS_CMDQ_DEPTH_REG, sq->depth);
112
-
erdma_reg_write64(dev, ERDMA_CMDQ_SQ_DB_HOST_ADDR_REG,
113
-
sq->db_record_dma_addr);
113
+
erdma_reg_write64(dev, ERDMA_CMDQ_SQ_DB_HOST_ADDR_REG, sq->dbrec_dma);
114
114
115
115
return 0;
116
116
···
134
136
135
137
spin_lock_init(&cq->lock);
136
138
137
-
cq->db_record = dma_pool_zalloc(dev->db_pool, GFP_KERNEL,
138
-
&cq->db_record_dma_addr);
139
-
if (!cq->db_record)
139
+
cq->dbrec = dma_pool_zalloc(dev->db_pool, GFP_KERNEL, &cq->dbrec_dma);
140
+
if (!cq->dbrec)
140
141
goto err_out;
141
142
142
143
atomic64_set(&cq->armed_num, 0);
···
144
147
upper_32_bits(cq->qbuf_dma_addr));
145
148
erdma_reg_write32(dev, ERDMA_REGS_CMDQ_CQ_ADDR_L_REG,
146
149
lower_32_bits(cq->qbuf_dma_addr));
147
-
erdma_reg_write64(dev, ERDMA_CMDQ_CQ_DB_HOST_ADDR_REG,
148
-
cq->db_record_dma_addr);
150
+
erdma_reg_write64(dev, ERDMA_CMDQ_CQ_DB_HOST_ADDR_REG, cq->dbrec_dma);
149
151
150
152
return 0;
151
153
···
171
175
atomic64_set(&eq->event_num, 0);
172
176
173
177
eq->db = dev->func_bar + ERDMA_REGS_CEQ_DB_BASE_REG;
174
-
eq->db_record = dma_pool_zalloc(dev->db_pool, GFP_KERNEL,
175
-
&eq->db_record_dma_addr);
176
-
if (!eq->db_record)
178
+
eq->dbrec = dma_pool_zalloc(dev->db_pool, GFP_KERNEL, &eq->dbrec_dma);
179
+
if (!eq->dbrec)
177
180
goto err_out;
178
181
179
182
erdma_reg_write32(dev, ERDMA_REGS_CMDQ_EQ_ADDR_H_REG,
···
180
185
erdma_reg_write32(dev, ERDMA_REGS_CMDQ_EQ_ADDR_L_REG,
181
186
lower_32_bits(eq->qbuf_dma_addr));
182
187
erdma_reg_write32(dev, ERDMA_REGS_CMDQ_EQ_DEPTH_REG, eq->depth);
183
-
erdma_reg_write64(dev, ERDMA_CMDQ_EQ_DB_HOST_ADDR_REG,
184
-
eq->db_record_dma_addr);
188
+
erdma_reg_write64(dev, ERDMA_CMDQ_EQ_DB_HOST_ADDR_REG, eq->dbrec_dma);
185
189
186
190
return 0;
187
191
···
225
231
dma_free_coherent(&dev->pdev->dev, cmdq->cq.depth << CQE_SHIFT,
226
232
cmdq->cq.qbuf, cmdq->cq.qbuf_dma_addr);
227
233
228
-
dma_pool_free(dev->db_pool, cmdq->cq.db_record,
229
-
cmdq->cq.db_record_dma_addr);
234
+
dma_pool_free(dev->db_pool, cmdq->cq.dbrec, cmdq->cq.dbrec_dma);
230
235
231
236
err_destroy_sq:
232
237
dma_free_coherent(&dev->pdev->dev, cmdq->sq.depth << SQEBB_SHIFT,
233
238
cmdq->sq.qbuf, cmdq->sq.qbuf_dma_addr);
234
239
235
-
dma_pool_free(dev->db_pool, cmdq->sq.db_record,
236
-
cmdq->sq.db_record_dma_addr);
240
+
dma_pool_free(dev->db_pool, cmdq->sq.dbrec, cmdq->sq.dbrec_dma);
237
241
238
242
return err;
239
243
}
···
252
260
dma_free_coherent(&dev->pdev->dev, cmdq->eq.depth << EQE_SHIFT,
253
261
cmdq->eq.qbuf, cmdq->eq.qbuf_dma_addr);
254
262
255
-
dma_pool_free(dev->db_pool, cmdq->eq.db_record,
256
-
cmdq->eq.db_record_dma_addr);
263
+
dma_pool_free(dev->db_pool, cmdq->eq.dbrec, cmdq->eq.dbrec_dma);
257
264
258
265
dma_free_coherent(&dev->pdev->dev, cmdq->sq.depth << SQEBB_SHIFT,
259
266
cmdq->sq.qbuf, cmdq->sq.qbuf_dma_addr);
260
267
261
-
dma_pool_free(dev->db_pool, cmdq->sq.db_record,
262
-
cmdq->sq.db_record_dma_addr);
268
+
dma_pool_free(dev->db_pool, cmdq->sq.dbrec, cmdq->sq.dbrec_dma);
263
269
264
270
dma_free_coherent(&dev->pdev->dev, cmdq->cq.depth << CQE_SHIFT,
265
271
cmdq->cq.qbuf, cmdq->cq.qbuf_dma_addr);
266
272
267
-
dma_pool_free(dev->db_pool, cmdq->cq.db_record,
268
-
cmdq->cq.db_record_dma_addr);
273
+
dma_pool_free(dev->db_pool, cmdq->cq.dbrec, cmdq->cq.dbrec_dma);
269
274
}
270
275
271
276
static void *get_next_valid_cmdq_cqe(struct erdma_cmdq *cmdq)
+1
-1
drivers/infiniband/hw/erdma/erdma_cq.c
+1
-1
drivers/infiniband/hw/erdma/erdma_cq.c
+10
-13
drivers/infiniband/hw/erdma/erdma_eq.c
+10
-13
drivers/infiniband/hw/erdma/erdma_eq.c
···
13
13
u64 db_data = FIELD_PREP(ERDMA_EQDB_CI_MASK, eq->ci) |
14
14
FIELD_PREP(ERDMA_EQDB_ARM_MASK, 1);
15
15
16
-
*eq->db_record = db_data;
16
+
*eq->dbrec = db_data;
17
17
writeq(db_data, eq->db);
18
18
19
19
atomic64_inc(&eq->notify_num);
···
97
97
atomic64_set(&eq->notify_num, 0);
98
98
99
99
eq->db = dev->func_bar + ERDMA_REGS_AEQ_DB_REG;
100
-
eq->db_record = dma_pool_zalloc(dev->db_pool, GFP_KERNEL,
101
-
&eq->db_record_dma_addr);
102
-
if (!eq->db_record)
100
+
eq->dbrec = dma_pool_zalloc(dev->db_pool, GFP_KERNEL, &eq->dbrec_dma);
101
+
if (!eq->dbrec)
103
102
goto err_out;
104
103
105
104
erdma_reg_write32(dev, ERDMA_REGS_AEQ_ADDR_H_REG,
···
106
107
erdma_reg_write32(dev, ERDMA_REGS_AEQ_ADDR_L_REG,
107
108
lower_32_bits(eq->qbuf_dma_addr));
108
109
erdma_reg_write32(dev, ERDMA_REGS_AEQ_DEPTH_REG, eq->depth);
109
-
erdma_reg_write64(dev, ERDMA_AEQ_DB_HOST_ADDR_REG,
110
-
eq->db_record_dma_addr);
110
+
erdma_reg_write64(dev, ERDMA_AEQ_DB_HOST_ADDR_REG, eq->dbrec_dma);
111
111
112
112
return 0;
113
113
···
124
126
dma_free_coherent(&dev->pdev->dev, eq->depth << EQE_SHIFT, eq->qbuf,
125
127
eq->qbuf_dma_addr);
126
128
127
-
dma_pool_free(dev->db_pool, eq->db_record, eq->db_record_dma_addr);
129
+
dma_pool_free(dev->db_pool, eq->dbrec, eq->dbrec_dma);
128
130
}
129
131
130
132
void erdma_ceq_completion_handler(struct erdma_eq_cb *ceq_cb)
···
224
226
req.qtype = ERDMA_EQ_TYPE_CEQ;
225
227
/* Vector index is the same as EQN. */
226
228
req.vector_idx = eqn;
227
-
req.db_dma_addr_l = lower_32_bits(eq->db_record_dma_addr);
228
-
req.db_dma_addr_h = upper_32_bits(eq->db_record_dma_addr);
229
+
req.db_dma_addr_l = lower_32_bits(eq->dbrec_dma);
230
+
req.db_dma_addr_h = upper_32_bits(eq->dbrec_dma);
229
231
230
232
return erdma_post_cmd_wait(&dev->cmdq, &req, sizeof(req), NULL, NULL);
231
233
}
···
249
251
eq->db = dev->func_bar + ERDMA_REGS_CEQ_DB_BASE_REG +
250
252
(ceqn + 1) * ERDMA_DB_SIZE;
251
253
252
-
eq->db_record = dma_pool_zalloc(dev->db_pool, GFP_KERNEL,
253
-
&eq->db_record_dma_addr);
254
-
if (!eq->db_record) {
254
+
eq->dbrec = dma_pool_zalloc(dev->db_pool, GFP_KERNEL, &eq->dbrec_dma);
255
+
if (!eq->dbrec) {
255
256
dma_free_coherent(&dev->pdev->dev, eq->depth << EQE_SHIFT,
256
257
eq->qbuf, eq->qbuf_dma_addr);
257
258
return -ENOMEM;
···
287
290
288
291
dma_free_coherent(&dev->pdev->dev, eq->depth << EQE_SHIFT, eq->qbuf,
289
292
eq->qbuf_dma_addr);
290
-
dma_pool_free(dev->db_pool, eq->db_record, eq->db_record_dma_addr);
293
+
dma_pool_free(dev->db_pool, eq->dbrec, eq->dbrec_dma);
291
294
}
292
295
293
296
int erdma_ceqs_init(struct erdma_dev *dev)
+3
-3
drivers/infiniband/hw/erdma/erdma_hw.h
+3
-3
drivers/infiniband/hw/erdma/erdma_hw.h
···
240
240
u32 qbuf_addr_l;
241
241
u32 qbuf_addr_h;
242
242
u32 cfg1;
243
-
u64 cq_db_info_addr;
243
+
u64 cq_dbrec_dma;
244
244
u32 first_page_offset;
245
245
u32 cfg2;
246
246
};
···
335
335
u64 rq_buf_addr;
336
336
u32 sq_mtt_cfg;
337
337
u32 rq_mtt_cfg;
338
-
u64 sq_db_info_dma_addr;
339
-
u64 rq_db_info_dma_addr;
338
+
u64 sq_dbrec_dma;
339
+
u64 rq_dbrec_dma;
340
340
341
341
u64 sq_mtt_entry[3];
342
342
u64 rq_mtt_entry[3];
+2
-2
drivers/infiniband/hw/erdma/erdma_qp.c
+2
-2
drivers/infiniband/hw/erdma/erdma_qp.c
···
492
492
u64 db_data = FIELD_PREP(ERDMA_SQE_HDR_QPN_MASK, QP_ID(qp)) |
493
493
FIELD_PREP(ERDMA_SQE_HDR_WQEBB_INDEX_MASK, pi);
494
494
495
-
*(u64 *)qp->kern_qp.sq_db_info = db_data;
495
+
*(u64 *)qp->kern_qp.sq_dbrec = db_data;
496
496
writeq(db_data, qp->kern_qp.hw_sq_db);
497
497
}
498
498
···
557
557
return -EINVAL;
558
558
}
559
559
560
-
*(u64 *)qp->kern_qp.rq_db_info = *(u64 *)rqe;
560
+
*(u64 *)qp->kern_qp.rq_dbrec = *(u64 *)rqe;
561
561
writeq(*(u64 *)rqe, qp->kern_qp.hw_rq_db);
562
562
563
563
qp->kern_qp.rwr_tbl[qp->kern_qp.rq_pi & (qp->attrs.rq_size - 1)] =
+32
-32
drivers/infiniband/hw/erdma/erdma_verbs.c
+32
-32
drivers/infiniband/hw/erdma/erdma_verbs.c
···
76
76
77
77
req.rq_buf_addr = qp->kern_qp.rq_buf_dma_addr;
78
78
req.sq_buf_addr = qp->kern_qp.sq_buf_dma_addr;
79
-
req.sq_db_info_dma_addr = qp->kern_qp.sq_db_info_dma_addr;
80
-
req.rq_db_info_dma_addr = qp->kern_qp.rq_db_info_dma_addr;
79
+
req.sq_dbrec_dma = qp->kern_qp.sq_dbrec_dma;
80
+
req.rq_dbrec_dma = qp->kern_qp.rq_dbrec_dma;
81
81
} else {
82
82
user_qp = &qp->user_qp;
83
83
req.sq_cqn_mtt_cfg = FIELD_PREP(
···
105
105
assemble_qbuf_mtt_for_cmd(&user_qp->rq_mem, &req.rq_mtt_cfg,
106
106
&req.rq_buf_addr, req.rq_mtt_entry);
107
107
108
-
req.sq_db_info_dma_addr = user_qp->sq_db_info_dma_addr;
109
-
req.rq_db_info_dma_addr = user_qp->rq_db_info_dma_addr;
108
+
req.sq_dbrec_dma = user_qp->sq_dbrec_dma;
109
+
req.rq_dbrec_dma = user_qp->rq_dbrec_dma;
110
110
111
111
if (uctx->ext_db.enable) {
112
112
req.sq_cqn_mtt_cfg |=
···
207
207
ERDMA_MR_MTT_0LEVEL);
208
208
209
209
req.first_page_offset = 0;
210
-
req.cq_db_info_addr = cq->kern_cq.db_record_dma_addr;
210
+
req.cq_dbrec_dma = cq->kern_cq.dbrec_dma;
211
211
} else {
212
212
mem = &cq->user_cq.qbuf_mem;
213
213
req.cfg0 |=
···
230
230
mem->mtt_nents);
231
231
232
232
req.first_page_offset = mem->page_offset;
233
-
req.cq_db_info_addr = cq->user_cq.db_info_dma_addr;
233
+
req.cq_dbrec_dma = cq->user_cq.dbrec_dma;
234
234
235
235
if (uctx->ext_db.enable) {
236
236
req.cfg1 |= FIELD_PREP(
···
484
484
qp->kern_qp.sq_buf,
485
485
qp->kern_qp.sq_buf_dma_addr);
486
486
487
-
if (qp->kern_qp.sq_db_info)
488
-
dma_pool_free(dev->db_pool, qp->kern_qp.sq_db_info,
489
-
qp->kern_qp.sq_db_info_dma_addr);
487
+
if (qp->kern_qp.sq_dbrec)
488
+
dma_pool_free(dev->db_pool, qp->kern_qp.sq_dbrec,
489
+
qp->kern_qp.sq_dbrec_dma);
490
490
491
491
if (qp->kern_qp.rq_buf)
492
492
dma_free_coherent(&dev->pdev->dev,
···
494
494
qp->kern_qp.rq_buf,
495
495
qp->kern_qp.rq_buf_dma_addr);
496
496
497
-
if (qp->kern_qp.rq_db_info)
498
-
dma_pool_free(dev->db_pool, qp->kern_qp.rq_db_info,
499
-
qp->kern_qp.rq_db_info_dma_addr);
497
+
if (qp->kern_qp.rq_dbrec)
498
+
dma_pool_free(dev->db_pool, qp->kern_qp.rq_dbrec,
499
+
qp->kern_qp.rq_dbrec_dma);
500
500
}
501
501
502
502
static int init_kernel_qp(struct erdma_dev *dev, struct erdma_qp *qp,
···
527
527
if (!kqp->sq_buf)
528
528
goto err_out;
529
529
530
-
kqp->sq_db_info = dma_pool_zalloc(dev->db_pool, GFP_KERNEL,
531
-
&kqp->sq_db_info_dma_addr);
532
-
if (!kqp->sq_db_info)
530
+
kqp->sq_dbrec =
531
+
dma_pool_zalloc(dev->db_pool, GFP_KERNEL, &kqp->sq_dbrec_dma);
532
+
if (!kqp->sq_dbrec)
533
533
goto err_out;
534
534
535
535
size = qp->attrs.rq_size << RQE_SHIFT;
···
538
538
if (!kqp->rq_buf)
539
539
goto err_out;
540
540
541
-
kqp->rq_db_info = dma_pool_zalloc(dev->db_pool, GFP_KERNEL,
542
-
&kqp->rq_db_info_dma_addr);
543
-
if (!kqp->rq_db_info)
541
+
kqp->rq_dbrec =
542
+
dma_pool_zalloc(dev->db_pool, GFP_KERNEL, &kqp->rq_dbrec_dma);
543
+
if (!kqp->rq_dbrec)
544
544
goto err_out;
545
545
546
546
return 0;
···
876
876
}
877
877
878
878
static int init_user_qp(struct erdma_qp *qp, struct erdma_ucontext *uctx,
879
-
u64 va, u32 len, u64 db_info_va)
879
+
u64 va, u32 len, u64 dbrec_va)
880
880
{
881
-
dma_addr_t db_info_dma_addr;
881
+
dma_addr_t dbrec_dma;
882
882
u32 rq_offset;
883
883
int ret;
884
884
···
901
901
if (ret)
902
902
goto put_sq_mtt;
903
903
904
-
ret = erdma_map_user_dbrecords(uctx, db_info_va,
904
+
ret = erdma_map_user_dbrecords(uctx, dbrec_va,
905
905
&qp->user_qp.user_dbr_page,
906
-
&db_info_dma_addr);
906
+
&dbrec_dma);
907
907
if (ret)
908
908
goto put_rq_mtt;
909
909
910
-
qp->user_qp.sq_db_info_dma_addr = db_info_dma_addr;
911
-
qp->user_qp.rq_db_info_dma_addr = db_info_dma_addr + ERDMA_DB_SIZE;
910
+
qp->user_qp.sq_dbrec_dma = dbrec_dma;
911
+
qp->user_qp.rq_dbrec_dma = dbrec_dma + ERDMA_DB_SIZE;
912
912
913
913
return 0;
914
914
···
1251
1251
if (rdma_is_kernel_res(&cq->ibcq.res)) {
1252
1252
dma_free_coherent(&dev->pdev->dev, cq->depth << CQE_SHIFT,
1253
1253
cq->kern_cq.qbuf, cq->kern_cq.qbuf_dma_addr);
1254
-
dma_pool_free(dev->db_pool, cq->kern_cq.db_record,
1255
-
cq->kern_cq.db_record_dma_addr);
1254
+
dma_pool_free(dev->db_pool, cq->kern_cq.dbrec,
1255
+
cq->kern_cq.dbrec_dma);
1256
1256
} else {
1257
1257
erdma_unmap_user_dbrecords(ctx, &cq->user_cq.user_dbr_page);
1258
1258
put_mtt_entries(dev, &cq->user_cq.qbuf_mem);
···
1592
1592
1593
1593
ret = erdma_map_user_dbrecords(ctx, ureq->db_record_va,
1594
1594
&cq->user_cq.user_dbr_page,
1595
-
&cq->user_cq.db_info_dma_addr);
1595
+
&cq->user_cq.dbrec_dma);
1596
1596
if (ret)
1597
1597
put_mtt_entries(dev, &cq->user_cq.qbuf_mem);
1598
1598
···
1609
1609
if (!cq->kern_cq.qbuf)
1610
1610
return -ENOMEM;
1611
1611
1612
-
cq->kern_cq.db_record = dma_pool_zalloc(
1613
-
dev->db_pool, GFP_KERNEL, &cq->kern_cq.db_record_dma_addr);
1614
-
if (!cq->kern_cq.db_record)
1612
+
cq->kern_cq.dbrec = dma_pool_zalloc(dev->db_pool, GFP_KERNEL,
1613
+
&cq->kern_cq.dbrec_dma);
1614
+
if (!cq->kern_cq.dbrec)
1615
1615
goto err_out;
1616
1616
1617
1617
spin_lock_init(&cq->kern_cq.lock);
···
1690
1690
} else {
1691
1691
dma_free_coherent(&dev->pdev->dev, depth << CQE_SHIFT,
1692
1692
cq->kern_cq.qbuf, cq->kern_cq.qbuf_dma_addr);
1693
-
dma_pool_free(dev->db_pool, cq->kern_cq.db_record,
1694
-
cq->kern_cq.db_record_dma_addr);
1693
+
dma_pool_free(dev->db_pool, cq->kern_cq.dbrec,
1694
+
cq->kern_cq.dbrec_dma);
1695
1695
}
1696
1696
1697
1697
err_out_xa:
+9
-9
drivers/infiniband/hw/erdma/erdma_verbs.h
+9
-9
drivers/infiniband/hw/erdma/erdma_verbs.h
···
140
140
struct erdma_mem sq_mem;
141
141
struct erdma_mem rq_mem;
142
142
143
-
dma_addr_t sq_db_info_dma_addr;
144
-
dma_addr_t rq_db_info_dma_addr;
143
+
dma_addr_t sq_dbrec_dma;
144
+
dma_addr_t rq_dbrec_dma;
145
145
146
146
struct erdma_user_dbrecords_page *user_dbr_page;
147
147
···
167
167
void *rq_buf;
168
168
dma_addr_t rq_buf_dma_addr;
169
169
170
-
void *sq_db_info;
171
-
void *rq_db_info;
170
+
void *sq_dbrec;
171
+
void *rq_dbrec;
172
172
173
-
dma_addr_t sq_db_info_dma_addr;
174
-
dma_addr_t rq_db_info_dma_addr;
173
+
dma_addr_t sq_dbrec_dma;
174
+
dma_addr_t rq_dbrec_dma;
175
175
176
176
u8 sig_all;
177
177
};
···
249
249
250
250
spinlock_t lock;
251
251
u8 __iomem *db;
252
-
u64 *db_record;
253
-
dma_addr_t db_record_dma_addr;
252
+
u64 *dbrec;
253
+
dma_addr_t dbrec_dma;
254
254
};
255
255
256
256
struct erdma_ucq_info {
257
257
struct erdma_mem qbuf_mem;
258
258
struct erdma_user_dbrecords_page *user_dbr_page;
259
-
dma_addr_t db_info_dma_addr;
259
+
dma_addr_t dbrec_dma;
260
260
};
261
261
262
262
struct erdma_cq {