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RDMA: Delete not-used static inline functions

Perform mass deletion of static inline functions that are not used.

Link: https://lore.kernel.org/r/20210314133908.291945-3-leon@kernel.org
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

authored by

Leon Romanovsky and committed by
Jason Gunthorpe
fdb68dd3 ae360f41

-187
-11
drivers/infiniband/hw/cxgb4/iw_cxgb4.h
··· 341 341 return container_of(ibdev, struct c4iw_dev, ibdev); 342 342 } 343 343 344 - static inline struct c4iw_dev *rdev_to_c4iw_dev(struct c4iw_rdev *rdev) 345 - { 346 - return container_of(rdev, struct c4iw_dev, rdev); 347 - } 348 - 349 344 static inline struct c4iw_cq *get_chp(struct c4iw_dev *rhp, u32 cqid) 350 345 { 351 346 return xa_load(&rhp->cqs, cqid); ··· 652 657 (a & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0) | 653 658 (a & IB_ACCESS_LOCAL_WRITE ? FW_RI_MEM_ACCESS_LOCAL_WRITE : 0) | 654 659 FW_RI_MEM_ACCESS_LOCAL_READ; 655 - } 656 - 657 - static inline u32 c4iw_ib_to_tpt_bind_access(int acc) 658 - { 659 - return (acc & IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) | 660 - (acc & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0); 661 660 } 662 661 663 662 enum c4iw_mmid_state {
-33
drivers/infiniband/hw/cxgb4/t4.h
··· 487 487 return wq->rq.in_use == 0; 488 488 } 489 489 490 - static inline int t4_rq_full(struct t4_wq *wq) 491 - { 492 - return wq->rq.in_use == (wq->rq.size - 1); 493 - } 494 - 495 490 static inline u32 t4_rq_avail(struct t4_wq *wq) 496 491 { 497 492 return wq->rq.size - 1 - wq->rq.in_use; ··· 527 532 static inline int t4_sq_empty(struct t4_wq *wq) 528 533 { 529 534 return wq->sq.in_use == 0; 530 - } 531 - 532 - static inline int t4_sq_full(struct t4_wq *wq) 533 - { 534 - return wq->sq.in_use == (wq->sq.size - 1); 535 535 } 536 536 537 537 static inline u32 t4_sq_avail(struct t4_wq *wq) ··· 669 679 wq->rq.queue[wq->rq.size].status.db_off = 0; 670 680 } 671 681 672 - static inline int t4_wq_db_enabled(struct t4_wq *wq) 673 - { 674 - return !wq->rq.queue[wq->rq.size].status.db_off; 675 - } 676 - 677 682 enum t4_cq_flags { 678 683 CQ_ARMED = 1, 679 684 }; ··· 802 817 return ret; 803 818 } 804 819 805 - static inline struct t4_cqe *t4_next_sw_cqe(struct t4_cq *cq) 806 - { 807 - if (cq->sw_in_use == cq->size) { 808 - pr_warn("%s cxgb4 sw cq overflow cqid %u\n", 809 - __func__, cq->cqid); 810 - cq->error = 1; 811 - return NULL; 812 - } 813 - if (cq->sw_in_use) 814 - return &cq->sw_queue[cq->sw_cidx]; 815 - return NULL; 816 - } 817 - 818 820 static inline int t4_next_cqe(struct t4_cq *cq, struct t4_cqe **cqe) 819 821 { 820 822 int ret = 0; ··· 813 841 else 814 842 ret = t4_next_hw_cqe(cq, cqe); 815 843 return ret; 816 - } 817 - 818 - static inline int t4_cq_in_error(struct t4_cq *cq) 819 - { 820 - return *cq->qp_errp; 821 844 } 822 845 823 846 static inline void t4_set_cq_in_error(struct t4_cq *cq)
-5
drivers/infiniband/hw/hfi1/chip.h
··· 822 822 int release_lcb_access(struct hfi1_devdata *dd, int sleep_ok); 823 823 #define LCB_START DC_LCB_CSRS 824 824 #define LCB_END DC_8051_CSRS /* next block is 8051 */ 825 - static inline int is_lcb_offset(u32 offset) 826 - { 827 - return (offset >= LCB_START && offset < LCB_END); 828 - } 829 - 830 825 extern uint num_vls; 831 826 832 827 extern uint disable_integrity;
-6
drivers/infiniband/hw/hfi1/hfi.h
··· 717 717 (*cntr)++; 718 718 } 719 719 720 - static inline void incr_cntr32(u32 *cntr) 721 - { 722 - if (*cntr < (u32)-1LL) 723 - (*cntr)++; 724 - } 725 - 726 720 #define MAX_NAME_SIZE 64 727 721 struct hfi1_msix_entry { 728 722 enum irq_type type;
-5
drivers/infiniband/hw/hfi1/verbs_txreq.h
··· 99 99 return tx; 100 100 } 101 101 102 - static inline struct sdma_txreq *get_sdma_txreq(struct verbs_txreq *tx) 103 - { 104 - return &tx->txreq; 105 - } 106 - 107 102 static inline struct verbs_txreq *get_waiting_verbs_txreq(struct iowait_work *w) 108 103 { 109 104 struct sdma_txreq *stx;
-9
drivers/infiniband/hw/i40iw/i40iw.h
··· 504 504 spin_unlock_irqrestore(&iwdev->resource_lock, flags); 505 505 } 506 506 507 - /** 508 - * to_iwhdl - Get the handler from the device pointer 509 - * @iwdev: device pointer 510 - **/ 511 - static inline struct i40iw_handler *to_iwhdl(struct i40iw_device *iw_dev) 512 - { 513 - return container_of(iw_dev, struct i40iw_handler, device); 514 - } 515 - 516 507 struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev); 517 508 518 509 /**
-22
drivers/infiniband/hw/i40iw/i40iw_osdep.h
··· 51 51 } 52 52 53 53 /** 54 - * set_32bit_val - set 32 value to hw wqe 55 - * @wqe_words: wqe addr to write 56 - * @byte_index: index in wqe 57 - * @value: value to write 58 - **/ 59 - static inline void set_32bit_val(u32 *wqe_words, u32 byte_index, u32 value) 60 - { 61 - wqe_words[byte_index >> 2] = value; 62 - } 63 - 64 - /** 65 54 * get_64bit_val - read 64 bit value from wqe 66 55 * @wqe_words: wqe addr 67 56 * @byte_index: index to read from ··· 59 70 static inline void get_64bit_val(u64 *wqe_words, u32 byte_index, u64 *value) 60 71 { 61 72 *value = wqe_words[byte_index >> 3]; 62 - } 63 - 64 - /** 65 - * get_32bit_val - read 32 bit value from wqe 66 - * @wqe_words: wqe addr 67 - * @byte_index: index to reaad from 68 - * @value: return 32 bit value 69 - **/ 70 - static inline void get_32bit_val(u32 *wqe_words, u32 byte_index, u32 *value) 71 - { 72 - *value = wqe_words[byte_index >> 2]; 73 73 } 74 74 75 75 struct i40iw_dma_mem {
-26
drivers/infiniband/hw/qib/qib.h
··· 1303 1303 /* ppd->sdma_lock should be locked before calling this. */ 1304 1304 int qib_sdma_make_progress(struct qib_pportdata *dd); 1305 1305 1306 - static inline int qib_sdma_empty(const struct qib_pportdata *ppd) 1307 - { 1308 - return ppd->sdma_descq_added == ppd->sdma_descq_removed; 1309 - } 1310 - 1311 1306 /* must be called under qib_sdma_lock */ 1312 1307 static inline u16 qib_sdma_descq_freecnt(const struct qib_pportdata *ppd) 1313 1308 { ··· 1357 1362 */ 1358 1363 return (u32) le64_to_cpu( 1359 1364 *((volatile __le64 *)rcd->rcvhdrtail_kvaddr)); /* DMA'ed */ 1360 - } 1361 - 1362 - static inline u32 qib_get_hdrqtail(const struct qib_ctxtdata *rcd) 1363 - { 1364 - const struct qib_devdata *dd = rcd->dd; 1365 - u32 hdrqtail; 1366 - 1367 - if (dd->flags & QIB_NODMA_RTAIL) { 1368 - __le32 *rhf_addr; 1369 - u32 seq; 1370 - 1371 - rhf_addr = (__le32 *) rcd->rcvhdrq + 1372 - rcd->head + dd->rhf_offset; 1373 - seq = qib_hdrget_seq(rhf_addr); 1374 - hdrqtail = rcd->head; 1375 - if (seq == rcd->seq_cnt) 1376 - hdrqtail++; 1377 - } else 1378 - hdrqtail = qib_get_rcvhdrtail(rcd); 1379 - 1380 - return hdrqtail; 1381 1365 } 1382 1366 1383 1367 /*
-7
drivers/infiniband/hw/qib/qib_common.h
··· 795 795 { 796 796 return __le32_to_cpu(rbuf[0]) & QLOGIC_IB_RHF_L_USE_EGR; 797 797 } 798 - 799 - static inline __u32 qib_hdrget_qib_ver(__le32 hdrword) 800 - { 801 - return (__le32_to_cpu(hdrword) >> QLOGIC_IB_I_VERS_SHIFT) & 802 - QLOGIC_IB_I_VERS_MASK; 803 - } 804 - 805 798 #endif /* _QIB_COMMON_H */
-10
drivers/infiniband/hw/vmw_pvrdma/pvrdma.h
··· 344 344 return (enum ib_port_state)state; 345 345 } 346 346 347 - static inline int ib_port_cap_flags_to_pvrdma(int flags) 348 - { 349 - return flags & PVRDMA_MASK(PVRDMA_PORT_CAP_FLAGS_MAX); 350 - } 351 - 352 347 static inline int pvrdma_port_cap_flags_to_ib(int flags) 353 348 { 354 349 return flags; ··· 403 408 static inline enum pvrdma_qp_type ib_qp_type_to_pvrdma(enum ib_qp_type type) 404 409 { 405 410 return (enum pvrdma_qp_type)type; 406 - } 407 - 408 - static inline enum ib_qp_type pvrdma_qp_type_to_ib(enum pvrdma_qp_type type) 409 - { 410 - return (enum ib_qp_type)type; 411 411 } 412 412 413 413 static inline enum pvrdma_qp_state ib_qp_state_to_pvrdma(enum ib_qp_state state)
-35
drivers/infiniband/hw/vmw_pvrdma/pvrdma_verbs.h
··· 70 70 PVRDMA_MTU_4096 = 5, 71 71 }; 72 72 73 - static inline int pvrdma_mtu_enum_to_int(enum pvrdma_mtu mtu) 74 - { 75 - switch (mtu) { 76 - case PVRDMA_MTU_256: return 256; 77 - case PVRDMA_MTU_512: return 512; 78 - case PVRDMA_MTU_1024: return 1024; 79 - case PVRDMA_MTU_2048: return 2048; 80 - case PVRDMA_MTU_4096: return 4096; 81 - default: return -1; 82 - } 83 - } 84 - 85 - static inline enum pvrdma_mtu pvrdma_mtu_int_to_enum(int mtu) 86 - { 87 - switch (mtu) { 88 - case 256: return PVRDMA_MTU_256; 89 - case 512: return PVRDMA_MTU_512; 90 - case 1024: return PVRDMA_MTU_1024; 91 - case 2048: return PVRDMA_MTU_2048; 92 - case 4096: 93 - default: return PVRDMA_MTU_4096; 94 - } 95 - } 96 - 97 73 enum pvrdma_port_state { 98 74 PVRDMA_PORT_NOP = 0, 99 75 PVRDMA_PORT_DOWN = 1, ··· 113 137 PVRDMA_WIDTH_8X = 4, 114 138 PVRDMA_WIDTH_12X = 8, 115 139 }; 116 - 117 - static inline int pvrdma_width_enum_to_int(enum pvrdma_port_width width) 118 - { 119 - switch (width) { 120 - case PVRDMA_WIDTH_1X: return 1; 121 - case PVRDMA_WIDTH_4X: return 4; 122 - case PVRDMA_WIDTH_8X: return 8; 123 - case PVRDMA_WIDTH_12X: return 12; 124 - default: return -1; 125 - } 126 - } 127 140 128 141 enum pvrdma_port_speed { 129 142 PVRDMA_SPEED_SDR = 1,
-13
drivers/infiniband/sw/siw/iwarp.h
··· 114 114 return be16_to_cpu(ctrl->ddp_rdmap_ctrl & DDP_MASK_VERSION) >> 8; 115 115 } 116 116 117 - static inline void __ddp_set_version(struct iwarp_ctrl *ctrl, u8 version) 118 - { 119 - ctrl->ddp_rdmap_ctrl = 120 - (ctrl->ddp_rdmap_ctrl & ~DDP_MASK_VERSION) | 121 - (cpu_to_be16((u16)version << 8) & DDP_MASK_VERSION); 122 - } 123 - 124 117 static inline u8 __rdmap_get_version(struct iwarp_ctrl *ctrl) 125 118 { 126 119 __be16 ver = ctrl->ddp_rdmap_ctrl & RDMAP_MASK_VERSION; 127 120 128 121 return be16_to_cpu(ver) >> 6; 129 - } 130 - 131 - static inline void __rdmap_set_version(struct iwarp_ctrl *ctrl, u8 version) 132 - { 133 - ctrl->ddp_rdmap_ctrl = (ctrl->ddp_rdmap_ctrl & ~RDMAP_MASK_VERSION) | 134 - (cpu_to_be16(version << 6) & RDMAP_MASK_VERSION); 135 122 } 136 123 137 124 static inline u8 __rdmap_get_opcode(struct iwarp_ctrl *ctrl)
-5
drivers/infiniband/sw/siw/siw_mem.h
··· 29 29 kref_put(&mem->ref, siw_free_mem); 30 30 } 31 31 32 - static inline struct siw_mr *siw_mem2mr(struct siw_mem *m) 33 - { 34 - return container_of(m, struct siw_mr, mem); 35 - } 36 - 37 32 static inline void siw_unref_mem_sgl(struct siw_mem **mem, unsigned int num_sge) 38 33 { 39 34 while (num_sge) {