+1 -1

drivers/net/ethernet/amazon/ena/ena_admin_defs.h

reviewed

··· 986 986 struct ena_admin_rss_ind_table_entry inline_entry; 987 987 }; 988 988 989 989 - /* When hint value is 0, driver should use it's own predefined value */ 989 989 + /* When hint value is 0, driver should use its own predefined value */ 990 990 struct ena_admin_ena_hw_hints { 991 991 /* value in ms */ 992 992 u16 mmio_read_timeout;

+1 -1

drivers/net/ethernet/broadcom/b44.c

reviewed

··· 2570 2570 unsigned int dma_desc_align_size = dma_get_cache_alignment(); 2571 2571 int err; 2572 2572 2573 2573 - /* Setup paramaters for syncing RX/TX DMA descriptors */ 2573 2573 + /* Setup parameters for syncing RX/TX DMA descriptors */ 2574 2574 dma_desc_sync_size = max_t(unsigned int, dma_desc_align_size, sizeof(struct dma_desc)); 2575 2575 2576 2576 err = b44_pci_init();

+1 -1

drivers/net/ethernet/broadcom/bnx2x/bnx2x_dcb.c

reviewed

··· 344 344 } 345 345 } 346 346 347 347 - /* maps unmapped priorities to to the same COS as L2 */ 347 347 + /* maps unmapped priorities to the same COS as L2 */ 348 348 static void bnx2x_dcbx_map_nw(struct bnx2x *bp) 349 349 { 350 350 int i;

+2 -2

drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c

reviewed

··· 1243 1243 * pf B succeeds in taking the same lock since they are from the same port. 1244 1244 * pf A takes the per pf misc lock. Performs eeprom access. 1245 1245 * pf A finishes. Unlocks the per pf misc lock. 1246 1246 - * Pf B takes the lock and proceeds to perform it's own access. 1246 1246 + * Pf B takes the lock and proceeds to perform its own access. 1247 1247 * pf A unlocks the per port lock, while pf B is still working (!). 1248 1248 - * mcp takes the per port lock and corrupts pf B's access (and/or has it's own 1248 1248 + * mcp takes the per port lock and corrupts pf B's access (and/or has its own 1249 1249 * access corrupted by pf B) 1250 1250 */ 1251 1251 static int bnx2x_acquire_nvram_lock(struct bnx2x *bp)

+1 -1

drivers/net/ethernet/broadcom/bnx2x/bnx2x_fw_defs.h

reviewed

··· 332 332 #define TOE_STATE (TOE_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET) 333 333 #define RDMA_STATE (RDMA_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET) 334 334 335 335 - /* microcode fixed page page size 4K (chains and ring segments) */ 335 335 + /* microcode fixed page size 4K (chains and ring segments) */ 336 336 #define MC_PAGE_SIZE 4096 337 337 338 338 /* Number of indices per slow-path SB */

+1 -1

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c

reviewed

··· 1768 1768 * @bp: driver handle 1769 1769 * 1770 1770 * Returns the recovery leader resource id according to the engine this function 1771 1771 - * belongs to. Currently only only 2 engines is supported. 1771 1771 + * belongs to. Currently only 2 engines is supported. 1772 1772 */ 1773 1773 static int bnx2x_get_leader_lock_resource(struct bnx2x *bp) 1774 1774 {

+1 -1

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.h

reviewed

··· 379 379 /** 380 380 * Delete all configured elements having the given 381 381 * vlan_mac_flags specification. Assumes no pending for 382 382 - * execution commands. Will schedule all all currently 382 382 + * execution commands. Will schedule all currently 383 383 * configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags 384 384 * specification for deletion and will use the given 385 385 * ramrod_flags for the last DEL operation.

+1 -1

drivers/net/ethernet/broadcom/bnxt/bnxt.c

reviewed

··· 16974 16974 bnxt_free_ctx_mem(bp, false); 16975 16975 netdev_unlock(netdev); 16976 16976 16977 16977 - /* Request a slot slot reset. */ 16977 16977 + /* Request a slot reset. */ 16978 16978 return PCI_ERS_RESULT_NEED_RESET; 16979 16979 } 16980 16980

+1 -1

drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c

reviewed

··· 1125 1125 /* There are two cases: 1126 1126 * 1.If firmware spec < 0x10202,VF MAC address is not forwarded 1127 1127 * to the PF and so it doesn't have to match 1128 1128 - * 2.Allow VF to modify it's own MAC when PF has not assigned a 1128 1128 + * 2.Allow VF to modify its own MAC when PF has not assigned a 1129 1129 * valid MAC address and firmware spec >= 0x10202 1130 1130 */ 1131 1131 mac_ok = true;

+1 -1

drivers/net/ethernet/broadcom/tg3.c

reviewed

··· 16610 16610 16611 16611 tg3_flag_set(tp, PCIX_TARGET_HWBUG); 16612 16612 16613 16613 - /* The chip can have it's power management PCI config 16613 16613 + /* The chip can have its power management PCI config 16614 16614 * space registers clobbered due to this bug. 16615 16615 * So explicitly force the chip into D0 here. 16616 16616 */

+1 -1

drivers/net/ethernet/cavium/liquidio/octeon_main.h

reviewed

··· 157 157 response of the request. 158 158 * 0: the request will wait until its response gets back 159 159 * from the firmware within LIO_SC_MAX_TMO_MS milli sec. 160 160 - * It the response does not return within 160 160 + * If the response does not return within 161 161 * LIO_SC_MAX_TMO_MS milli sec, lio_process_ordered_list() 162 162 * will move the request to zombie response list. 163 163 *

+2 -2

drivers/net/ethernet/cavium/liquidio/octeon_nic.h

reviewed

··· 268 268 * @param oct - octeon device pointer 269 269 * @param ndata - control structure with queueing, and buffer information 270 270 * 271 271 - * @returns IQ_FAILED if it failed to add to the input queue. IQ_STOP if it the 271 271 + * @returns IQ_FAILED if it failed to add to the input queue. IQ_STOP if the 272 272 * queue should be stopped, and IQ_SEND_OK if it sent okay. 273 273 */ 274 274 int octnet_send_nic_data_pkt(struct octeon_device *oct, ··· 278 278 /** Send a NIC control packet to the device 279 279 * @param oct - octeon device pointer 280 280 * @param nctrl - control structure with command, timout, and callback info 281 281 - * @returns IQ_FAILED if it failed to add to the input queue. IQ_STOP if it the 281 281 + * @returns IQ_FAILED if it failed to add to the input queue. IQ_STOP if the 282 282 * queue should be stopped, and IQ_SEND_OK if it sent okay. 283 283 */ 284 284 int

+4 -4

drivers/net/ethernet/chelsio/cxgb/pm3393.c

reviewed

··· 141 141 pmwrite(cmac, SUNI1x10GEXP_REG_GLOBAL_INTERRUPT_ENABLE, 142 142 0 /*SUNI1x10GEXP_BITMSK_TOP_INTE */ ); 143 143 144 144 - /* TERMINATOR - PL_INTERUPTS_EXT */ 144 144 + /* TERMINATOR - PL_INTERRUPTS_EXT */ 145 145 pl_intr = readl(cmac->adapter->regs + A_PL_ENABLE); 146 146 pl_intr |= F_PL_INTR_EXT; 147 147 writel(pl_intr, cmac->adapter->regs + A_PL_ENABLE); ··· 179 179 elmer &= ~ELMER0_GP_BIT1; 180 180 t1_tpi_write(cmac->adapter, A_ELMER0_INT_ENABLE, elmer); 181 181 182 182 - /* TERMINATOR - PL_INTERUPTS_EXT */ 182 182 + /* TERMINATOR - PL_INTERRUPTS_EXT */ 183 183 /* DO NOT DISABLE TERMINATOR's EXTERNAL INTERRUPTS. ANOTHER CHIP 184 184 * COULD WANT THEM ENABLED. We disable PM3393 at the ELMER level. 185 185 */ ··· 222 222 elmer |= ELMER0_GP_BIT1; 223 223 t1_tpi_write(cmac->adapter, A_ELMER0_INT_CAUSE, elmer); 224 224 225 225 - /* TERMINATOR - PL_INTERUPTS_EXT 225 225 + /* TERMINATOR - PL_INTERRUPTS_EXT 226 226 */ 227 227 pl_intr = readl(cmac->adapter->regs + A_PL_CAUSE); 228 228 pl_intr |= F_PL_INTR_EXT; ··· 756 756 757 757 /* ??? If this fails, might be able to software reset the XAUI part 758 758 * and try to recover... thus saving us from doing another HW reset */ 759 759 - /* Has the XAUI MABC PLL circuitry stablized? */ 759 759 + /* Has the XAUI MABC PLL circuitry stabilized? */ 760 760 is_xaui_mabc_pll_locked = 761 761 (val & SUNI1x10GEXP_BITMSK_TOP_SXRA_EXPIRED); 762 762

+1 -1

drivers/net/ethernet/chelsio/cxgb4/cxgb4.h

reviewed

··· 1316 1316 * (value, mask) tuples. The associated ingress packet field matches the 1317 1317 * tuple when ((field & mask) == value). (Thus a wildcard "don't care" field 1318 1318 * rule can be constructed by specifying a tuple of (0, 0).) A filter rule 1319 1319 - * matches an ingress packet when all of the individual individual field 1319 1319 + * matches an ingress packet when all of the individual field 1320 1320 * matching rules are true. 1321 1321 * 1322 1322 * Partial field masks are always valid, however, while it may be easy to

+2 -2

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

reviewed

··· 3297 3297 } 3298 3298 3299 3299 if (max_tx_rate == 0) { 3300 3300 - /* unbind VF to to any Traffic Class */ 3300 3300 + /* unbind VF to any Traffic Class */ 3301 3301 fw_pfvf = 3302 3302 (FW_PARAMS_MNEM_V(FW_PARAMS_MNEM_PFVF) | 3303 3303 FW_PARAMS_PARAM_X_V(FW_PARAMS_PARAM_PFVF_SCHEDCLASS_ETH)); ··· 4816 4816 goto bye; 4817 4817 } 4818 4818 4819 4819 - /* Get FW from from /lib/firmware/ */ 4819 4819 + /* Get FW from /lib/firmware/ */ 4820 4820 ret = request_firmware(&fw, fw_info->fw_mod_name, 4821 4821 adap->pdev_dev); 4822 4822 if (ret < 0) {

+2 -2

drivers/net/ethernet/chelsio/cxgb4/cxgb4_tc_u32.c

reviewed

··· 186 186 link_uhtid = TC_U32_USERHTID(cls->knode.link_handle); 187 187 188 188 /* Ensure that uhtid is either root u32 (i.e. 0x800) 189 189 - * or a a valid linked bucket. 189 189 + * or a valid linked bucket. 190 190 */ 191 191 if (uhtid != 0x800 && uhtid >= t->size) 192 192 return -EINVAL; ··· 422 422 uhtid = TC_U32_USERHTID(cls->knode.handle); 423 423 424 424 /* Ensure that uhtid is either root u32 (i.e. 0x800) 425 425 - * or a a valid linked bucket. 425 425 + * or a valid linked bucket. 426 426 */ 427 427 if (uhtid != 0x800 && uhtid >= t->size) 428 428 return -EINVAL;

+1 -1

drivers/net/ethernet/chelsio/cxgb4/sge.c

reviewed

··· 163 163 * for DMA, but this is of course never sent to the hardware and is only used 164 164 * to prevent double unmappings. All of the above requires that the Free List 165 165 * Buffers which we allocate have the bottom 5 bits free (0) -- i.e. are 166 166 - * 32-byte or or a power of 2 greater in alignment. Since the SGE's minimal 166 166 + * 32-byte or a power of 2 greater in alignment. Since the SGE's minimal 167 167 * Free List Buffer alignment is 32 bytes, this works out for us ... 168 168 */ 169 169 enum {

+1 -1

drivers/net/ethernet/chelsio/cxgb4/t4_hw.c

reviewed

··· 9348 9348 return 0; 9349 9349 } 9350 9350 9351 9351 - /* Otherwise, ask the firmware for it's Device Log Parameters. 9351 9351 + /* Otherwise, ask the firmware for its Device Log Parameters. 9352 9352 */ 9353 9353 memset(&devlog_cmd, 0, sizeof(devlog_cmd)); 9354 9354 devlog_cmd.op_to_write = cpu_to_be32(FW_CMD_OP_V(FW_DEVLOG_CMD) |

+1 -1

drivers/net/ethernet/chelsio/cxgb4vf/sge.c

reviewed

··· 2191 2191 /** 2192 2192 * t4vf_sge_alloc_rxq - allocate an SGE RX Queue 2193 2193 * @adapter: the adapter 2194 2194 - * @rspq: pointer to to the new rxq's Response Queue to be filled in 2194 2194 + * @rspq: pointer to the new rxq's Response Queue to be filled in 2195 2195 * @iqasynch: if 0, a normal rspq; if 1, an asynchronous event queue 2196 2196 * @dev: the network device associated with the new rspq 2197 2197 * @intr_dest: MSI-X vector index (overriden in MSI mode)

+1 -1

drivers/net/ethernet/chelsio/cxgb4vf/t4vf_hw.c

reviewed

··· 706 706 * separately. The actual Ingress Packet Data alignment boundary 707 707 * within Packed Buffer Mode is the maximum of these two 708 708 * specifications. (Note that it makes no real practical sense to 709 709 - * have the Pading Boudary be larger than the Packing Boundary but you 709 709 + * have the Padding Boundary be larger than the Packing Boundary but you 710 710 * could set the chip up that way and, in fact, legacy T4 code would 711 711 * end doing this because it would initialize the Padding Boundary and 712 712 * leave the Packing Boundary initialized to 0 (16 bytes).)

+1 -1

drivers/net/ethernet/dec/tulip/tulip_core.c

reviewed

··· 1550 1550 (PCI_SLOT(pdev->devfn) == 12))) { 1551 1551 /* Cobalt MAC address in first EEPROM locations. */ 1552 1552 sa_offset = 0; 1553 1553 - /* Ensure our media table fixup get's applied */ 1553 1553 + /* Ensure our media table fixup gets applied */ 1554 1554 memcpy(ee_data + 16, ee_data, 8); 1555 1555 } 1556 1556 #endif

+1 -1

drivers/net/ethernet/faraday/ftgmac100.c

reviewed

··· 1448 1448 /* Disable all interrupts */ 1449 1449 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER); 1450 1450 1451 1451 - /* Release phy lock to allow ftgmac100_reset to aquire it, keeping lock 1451 1451 + /* Release phy lock to allow ftgmac100_reset to acquire it, keeping lock 1452 1452 * order consistent to prevent dead lock. 1453 1453 */ 1454 1454 if (netdev->phydev)

+2 -2

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

reviewed

··· 2110 2110 */ 2111 2111 if (test_bit(HNS3_NIC_STATE_TX_PUSH_ENABLE, &priv->state) && num && 2112 2112 !ring->pending_buf && num <= HNS3_MAX_PUSH_BD_NUM && doorbell) { 2113 2113 - /* This smp_store_release() pairs with smp_load_aquire() in 2113 2113 + /* This smp_store_release() pairs with smp_load_acquire() in 2114 2114 * hns3_nic_reclaim_desc(). Ensure that the BD valid bit 2115 2115 * is updated. 2116 2116 */ ··· 2126 2126 return; 2127 2127 } 2128 2128 2129 2129 - /* This smp_store_release() pairs with smp_load_aquire() in 2129 2129 + /* This smp_store_release() pairs with smp_load_acquire() in 2130 2130 * hns3_nic_reclaim_desc(). Ensure that the BD valid bit is updated. 2131 2131 */ 2132 2132 smp_store_release(&ring->last_to_use, ring->next_to_use);

+1 -1

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

reviewed

··· 490 490 desc_num = reg_num / HCLGE_REG_NUM_PER_DESC + 1; 491 491 492 492 /* This may be called inside atomic sections, 493 493 - * so GFP_ATOMIC is more suitalbe here 493 493 + * so GFP_ATOMIC is more suitable here 494 494 */ 495 495 desc = kcalloc(desc_num, sizeof(struct hclge_desc), GFP_ATOMIC); 496 496 if (!desc)

+1 -1

drivers/net/ethernet/huawei/hinic/hinic_hw_eqs.c

reviewed

··· 605 605 /** 606 606 * ceq_elements_init - Initialize all the elements in the ceq 607 607 * @eq: the event queue 608 608 - * @init_val: value to init with it the elements 608 608 + * @init_val: value to init the elements with 609 609 **/ 610 610 static void ceq_elements_init(struct hinic_eq *eq, u32 init_val) 611 611 {

+1 -1

drivers/net/ethernet/huawei/hinic/hinic_hw_mbox.c

reviewed

··· 861 861 HINIC_MBOX_HEADER_SET(NOT_LAST_SEG, LAST) | 862 862 HINIC_MBOX_HEADER_SET(direction, DIRECTION) | 863 863 HINIC_MBOX_HEADER_SET(cmd, CMD) | 864 864 - /* The vf's offset to it's associated pf */ 864 864 + /* The vf's offset to its associated pf */ 865 865 HINIC_MBOX_HEADER_SET(msg_info->msg_id, MSG_ID) | 866 866 HINIC_MBOX_HEADER_SET(msg_info->status, STATUS) | 867 867 HINIC_MBOX_HEADER_SET(hinic_global_func_id_hw(hwdev->hwif),

+1 -1

drivers/net/ethernet/intel/i40e/i40e_ptp.c

reviewed

··· 550 550 pins.gpio_4 = pf->ptp_pins->gpio_4; 551 551 552 552 /* To turn on the pin - find the corresponding one based on 553 553 - * the given index. To to turn the function off - find 553 553 + * the given index. To turn the function off - find 554 554 * which pin had it assigned. Don't use ptp_find_pin here 555 555 * because it tries to lock the pincfg_mux which is locked by 556 556 * ptp_pin_store() that calls here.

+1 -1

drivers/net/ethernet/intel/ice/devlink/port.h

reviewed

··· 11 11 * struct ice_dynamic_port - Track dynamically added devlink port instance 12 12 * @hw_addr: the HW address for this port 13 13 * @active: true if the port has been activated 14 14 - * @attached: true it the prot is attached 14 14 + * @attached: true if the prot is attached 15 15 * @devlink_port: the associated devlink port structure 16 16 * @pf: pointer to the PF private structure 17 17 * @vsi: the VSI associated with this port

+1 -1

drivers/net/ethernet/intel/ice/ice_base.c

reviewed

··· 250 250 return ring->q_index - ring->ch->base_q; 251 251 252 252 /* Idea here for calculation is that we subtract the number of queue 253 253 - * count from TC that ring belongs to from it's absolute queue index 253 253 + * count from TC that ring belongs to from its absolute queue index 254 254 * and as a result we get the queue's index within TC. 255 255 */ 256 256 return ring->q_index - vsi->tc_cfg.tc_info[tc].qoffset;

+1 -1

drivers/net/ethernet/intel/ice/ice_lib.c

reviewed

··· 3199 3199 if (!netdev) 3200 3200 return; 3201 3201 3202 3202 - /* CHNL VSI doesn't have it's own netdev, hence, no netdev_tc */ 3202 3202 + /* CHNL VSI doesn't have its own netdev, hence, no netdev_tc */ 3203 3203 if (vsi->type == ICE_VSI_CHNL) 3204 3204 return; 3205 3205

+1 -1

drivers/net/ethernet/intel/ice/ice_ptp_hw.c

reviewed

··· 149 149 * | 8 bit s | | 32 bits | 150 150 * +---------------+ +---------------+ 151 151 * 152 152 - * The increment value is added to the GLSTYN_TIME_R and GLSTYN_TIME_L 152 152 + * The increment value is added to the GLTSYN_TIME_R and GLTSYN_TIME_L 153 153 * registers every clock source tick. Depending on the specific device 154 154 * configuration, the clock source frequency could be one of a number of 155 155 * values.

+1 -1

drivers/net/ethernet/intel/igc/igc_mac.c

reviewed

··· 127 127 goto out; 128 128 129 129 /* If requested flow control is set to default, set flow control 130 130 - * to the both 'rx' and 'tx' pause frames. 130 130 + * to both 'rx' and 'tx' pause frames. 131 131 */ 132 132 if (hw->fc.requested_mode == igc_fc_default) 133 133 hw->fc.requested_mode = igc_fc_full;

+1 -1

drivers/net/ethernet/intel/ixgbevf/vf.c

reviewed

··· 255 255 256 256 memset(msgbuf, 0, sizeof(msgbuf)); 257 257 /* If index is one then this is the start of a new list and needs 258 258 - * indication to the PF so it can do it's own list management. 258 258 + * indication to the PF so it can do its own list management. 259 259 * If it is zero then that tells the PF to just clear all of 260 260 * this VF's macvlans and there is no new list. 261 261 */

+1 -1

drivers/net/ethernet/marvell/mvneta_bm.h

reviewed

··· 115 115 116 116 /* Packet size */ 117 117 int pkt_size; 118 118 - /* Size of the buffer acces through DMA*/ 118 118 + /* Size of the buffer access through DMA */ 119 119 u32 buf_size; 120 120 121 121 /* BPPE virtual base address */

+1 -1

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

reviewed

··· 155 155 int err = 0; 156 156 u64 val; 157 157 158 158 - /* Check if PF_FUNC wants to use it's own local memory as LMTLINE 158 158 + /* Check if PF_FUNC wants to use its own local memory as LMTLINE 159 159 * region, if so, convert that IOVA to physical address and 160 160 * populate LMT table with that address 161 161 */

+1 -1

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

reviewed

··· 5050 5050 (ltdefs->rx_apad1.ltype_match << 4) | 5051 5051 ltdefs->rx_apad1.ltype_mask); 5052 5052 5053 5053 - /* Receive ethertype defination register defines layer 5053 5053 + /* Receive ethertype definition register defines layer 5054 5054 * information in NPC_RESULT_S to identify the Ethertype 5055 5055 * location in L2 header. Used for Ethertype overwriting 5056 5056 * in inline IPsec flow.

+3 -3

drivers/net/ethernet/marvell/pxa168_eth.c

reviewed

··· 1229 1229 int work_done = 0; 1230 1230 1231 1231 /* 1232 1232 - * We call txq_reclaim every time since in NAPI interupts are disabled 1233 1233 - * and due to this we miss the TX_DONE interrupt,which is not updated in 1234 1234 - * interrupt status register. 1232 1232 + * We call txq_reclaim every time since in NAPI interrupts are disabled 1233 1233 + * and due to this we miss the TX_DONE interrupt, which is not updated 1234 1234 + * in interrupt status register. 1235 1235 */ 1236 1236 txq_reclaim(dev, 0); 1237 1237 if (netif_queue_stopped(dev)

+1 -1

drivers/net/ethernet/mellanox/mlx5/core/en.h

reviewed

··· 375 375 enum mlx5e_dma_map_type type; 376 376 }; 377 377 378 378 - /* Keep this enum consistent with with the corresponding strings array 378 378 + /* Keep this enum consistent with the corresponding strings array 379 379 * declared in en/reporter_tx.c 380 380 */ 381 381 enum {

+1 -1

drivers/net/ethernet/meta/fbnic/fbnic_ethtool.c

reviewed

··· 1445 1445 standalone = ch->rx_count + ch->tx_count; 1446 1446 1447 1447 /* Limits for standalone queues: 1448 1448 - * - each queue has it's own NAPI (num_napi >= rx + tx + combined) 1448 1448 + * - each queue has its own NAPI (num_napi >= rx + tx + combined) 1449 1449 * - combining queues (combined not 0, rx or tx must be 0) 1450 1450 */ 1451 1451 if ((ch->rx_count && ch->tx_count && ch->combined_count) ||

+1 -1

drivers/net/ethernet/micrel/ks8842.c

reviewed

··· 335 335 /* When running in DMA Mode the RX interrupt is not enabled in 336 336 timberdale because RX data is received by DMA callbacks 337 337 it must still be enabled in the KS8842 because it indicates 338 338 - to timberdale when there is RX data for it's DMA FIFOs */ 338 338 + to timberdale when there is RX data for its DMA FIFOs */ 339 339 iowrite16(ENABLED_IRQS_DMA_IP, adapter->hw_addr + REG_TIMB_IER); 340 340 ks8842_write16(adapter, 18, ENABLED_IRQS_DMA, REG_IER); 341 341 } else {

+2 -2

drivers/net/ethernet/neterion/s2io.c

reviewed

··· 4707 4707 /* 4708 4708 * rx_traffic_int reg is an R1 register, writing all 1's 4709 4709 * will ensure that the actual interrupt causing bit 4710 4710 - * get's cleared and hence a read can be avoided. 4710 4710 + * gets cleared and hence a read can be avoided. 4711 4711 */ 4712 4712 if (reason & GEN_INTR_RXTRAFFIC) 4713 4713 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int); ··· 4721 4721 4722 4722 /* 4723 4723 * tx_traffic_int reg is an R1 register, writing all 1's 4724 4724 - * will ensure that the actual interrupt causing bit get's 4724 4724 + * will ensure that the actual interrupt causing bit gets 4725 4725 * cleared and hence a read can be avoided. 4726 4726 */ 4727 4727 if (reason & GEN_INTR_TXTRAFFIC)

+1 -1

drivers/net/ethernet/pensando/ionic/ionic_if.h

reviewed

··· 1074 1074 * first IPv4 header. If the receive packet 1075 1075 * contains both a tunnel IPv4 header and a 1076 1076 * transport IPv4 header, the device validates the 1077 1077 - * checksum for the both IPv4 headers. 1077 1077 + * checksum for both IPv4 headers. 1078 1078 * 1079 1079 * IONIC_RXQ_COMP_CSUM_F_IP_BAD: 1080 1080 * The IPv4 checksum calculated by the device did

+1 -1

drivers/net/ethernet/qlogic/qed/qed_dev.c

reviewed

··· 2216 2216 } 2217 2217 2218 2218 /* CID map / ILT shadow table / T2 2219 2219 - * The talbes sizes are determined by the computations above 2219 2219 + * The table sizes are determined by the computations above 2220 2220 */ 2221 2221 rc = qed_cxt_tables_alloc(p_hwfn); 2222 2222 if (rc)

+1 -1

drivers/net/ethernet/qlogic/qed/qed_ptp.c

reviewed

··· 307 307 } else if (ppb == 1) { 308 308 /* This is a special case as its the only value which wouldn't 309 309 * fit in a s64 variable. In order to prevent castings simple 310 310 - * handle it seperately. 310 310 + * handle it separately. 311 311 */ 312 312 best_val = 4; 313 313 best_period = 0xee6b27f;

+1 -1

drivers/net/ethernet/qlogic/qla3xxx.c

reviewed

··· 1501 1501 "Remote error detected. Calling ql_port_start()\n"); 1502 1502 /* 1503 1503 * ql_port_start() is shared code and needs 1504 1504 - * to lock the PHY on it's own. 1504 1504 + * to lock the PHY on its own. 1505 1505 */ 1506 1506 ql_sem_unlock(qdev, QL_PHY_GIO_SEM_MASK); 1507 1507 if (ql_port_start(qdev)) /* Restart port */

+1 -1

drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_init.c

reviewed

··· 2051 2051 dev_err(&p_dev->pdev->dev, "%s: failed\n", __func__); 2052 2052 } 2053 2053 2054 2054 - /* POST FW related definations*/ 2054 2054 + /* POST FW related definitions*/ 2055 2055 #define QLC_83XX_POST_SIGNATURE_REG 0x41602014 2056 2056 #define QLC_83XX_POST_MODE_REG 0x41602018 2057 2057 #define QLC_83XX_POST_FAST_MODE 0

+1 -1

drivers/net/ethernet/qualcomm/emac/emac-sgmii.c

reviewed

··· 419 419 goto error_put_device; 420 420 } 421 421 422 422 - /* v2 SGMII has a per-lane digital digital, so parse it if it exists */ 422 422 + /* v2 SGMII has a per-lane digital, so parse it if it exists */ 423 423 res = platform_get_resource(sgmii_pdev, IORESOURCE_MEM, 1); 424 424 if (res) { 425 425 phy->digital = ioremap(res->start, resource_size(res));

+3 -3

drivers/net/ethernet/sfc/mcdi_pcol.h

reviewed

··· 9190 9190 /* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 9191 9191 * Get descriptions for a set of sensors, specified as an array of sensor 9192 9192 * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. Any handles which do not 9193 9193 - * correspond to a sensor currently managed by the MC will be dropped from from 9193 9193 + * correspond to a sensor currently managed by the MC will be dropped from 9194 9194 * the response. This may happen when a sensor table update is in progress, and 9195 9195 * effectively means the set of usable sensors is the intersection between the 9196 9196 * sets of sensors known to the driver and the MC. On Riverhead this command is ··· 9236 9236 * broken sensor, then the state of the response's MC_CMD_DYNAMIC_SENSORS_VALUE 9237 9237 * entry will be set to BROKEN, and any value provided should be treated as 9238 9238 * erroneous. Any handles which do not correspond to a sensor currently managed 9239 9239 - * by the MC will be dropped from from the response. This may happen when a 9239 9239 + * by the MC will be dropped from the response. This may happen when a 9240 9240 * sensor table update is in progress, and effectively means the set of usable 9241 9241 * sensors is the intersection between the sets of sensors known to the driver 9242 9242 * and the MC. On Riverhead this command is implemented as a wrapper for ··· 22487 22487 * the named interface itself - INTF=..., PF=..., VF=VF_NULL to refer to a PF 22488 22488 * on a named interface - INTF=..., PF=..., VF=... to refer to a VF on a named 22489 22489 * interface where ... refers to a small integer for the VF/PF fields, and to 22490 22490 - * values from the PCIE_INTERFACE enum for for the INTF field. It's only 22490 22490 + * values from the PCIE_INTERFACE enum for the INTF field. It's only 22491 22491 * meaningful to use INTF=CALLER within a structure that's an argument to 22492 22492 * MC_CMD_DEVEL_GET_CLIENT_HANDLE. 22493 22493 */

+1 -1

drivers/net/ethernet/sfc/siena/farch.c

reviewed

··· 1708 1708 1709 1709 if (efx->vf_count > vf_limit) { 1710 1710 netif_err(efx, probe, efx->net_dev, 1711 1711 - "Reducing VF count from from %d to %d\n", 1711 1711 + "Reducing VF count from %d to %d\n", 1712 1712 efx->vf_count, vf_limit); 1713 1713 efx->vf_count = vf_limit; 1714 1714 }

+6 -6

drivers/net/ethernet/sfc/siena/mcdi_pcol.h

reviewed

··· 6704 6704 #define MC_CMD_SENSOR_SET_LIMS_IN_SENSOR_LEN 4 6705 6705 /* Enum values, see field(s): */ 6706 6706 /* MC_CMD_SENSOR_INFO/MC_CMD_SENSOR_INFO_OUT/MASK */ 6707 6707 - /* interpretation is is sensor-specific. */ 6707 6707 + /* interpretation is sensor-specific. */ 6708 6708 #define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_OFST 4 6709 6709 #define MC_CMD_SENSOR_SET_LIMS_IN_LOW0_LEN 4 6710 6710 - /* interpretation is is sensor-specific. */ 6710 6710 + /* interpretation is sensor-specific. */ 6711 6711 #define MC_CMD_SENSOR_SET_LIMS_IN_HI0_OFST 8 6712 6712 #define MC_CMD_SENSOR_SET_LIMS_IN_HI0_LEN 4 6713 6713 - /* interpretation is is sensor-specific. */ 6713 6713 + /* interpretation is sensor-specific. */ 6714 6714 #define MC_CMD_SENSOR_SET_LIMS_IN_LOW1_OFST 12 6715 6715 #define MC_CMD_SENSOR_SET_LIMS_IN_LOW1_LEN 4 6716 6716 - /* interpretation is is sensor-specific. */ 6716 6716 + /* interpretation is sensor-specific. */ 6717 6717 #define MC_CMD_SENSOR_SET_LIMS_IN_HI1_OFST 16 6718 6718 #define MC_CMD_SENSOR_SET_LIMS_IN_HI1_LEN 4 6719 6719 ··· 7823 7823 * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST 7824 7824 * 7825 7825 * Any handles which do not correspond to a sensor currently managed by the MC 7826 7826 - * will be dropped from from the response. This may happen when a sensor table 7826 7826 + * will be dropped from the response. This may happen when a sensor table 7827 7827 * update is in progress, and effectively means the set of usable sensors is 7828 7828 * the intersection between the sets of sensors known to the driver and the MC. 7829 7829 * ··· 7872 7872 * provided should be treated as erroneous. 7873 7873 * 7874 7874 * Any handles which do not correspond to a sensor currently managed by the MC 7875 7875 - * will be dropped from from the response. This may happen when a sensor table 7875 7875 + * will be dropped from the response. This may happen when a sensor table 7876 7876 * update is in progress, and effectively means the set of usable sensors is 7877 7877 * the intersection between the sets of sensors known to the driver and the MC. 7878 7878 *

+1 -1

drivers/net/ethernet/sfc/tc_encap_actions.c

reviewed

··· 442 442 rule = container_of(acts, struct efx_tc_flow_rule, acts); 443 443 if (rule->fallback) 444 444 fallback = rule->fallback; 445 445 - else /* fallback fallback: deliver to PF */ 445 445 + else /* fallback: deliver to PF */ 446 446 fallback = &efx->tc->facts.pf; 447 447 rc = efx_mae_update_rule(efx, fallback->fw_id, 448 448 rule->fw_id);

+1 -1

drivers/net/ethernet/smsc/smsc911x.c

reviewed

··· 2350 2350 pm_runtime_disable(&pdev->dev); 2351 2351 } 2352 2352 2353 2353 - /* standard register acces */ 2353 2353 + /* standard register access */ 2354 2354 static const struct smsc911x_ops standard_smsc911x_ops = { 2355 2355 .reg_read = __smsc911x_reg_read, 2356 2356 .reg_write = __smsc911x_reg_write,

+1 -1

drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c

reviewed

··· 60 60 * Description: 61 61 * This function validates the number of Unicast address entries supported 62 62 * by a particular Synopsys 10/100/1000 controller. The Synopsys controller 63 63 - * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter 63 63 + * supports 1..32, 64, or 128 Unicast filter entries for its Unicast filter 64 64 * logic. This function validates a valid, supported configuration is 65 65 * selected, and defaults to 1 Unicast address if an unsupported 66 66 * configuration is selected.

+1 -1

drivers/net/ethernet/sun/niu.c

reviewed

··· 5825 5825 /* This looks hookey but the RX MAC reset we just did will 5826 5826 * undo some of the state we setup in niu_init_tx_mac() so we 5827 5827 * have to call it again. In particular, the RX MAC reset will 5828 5828 - * set the XMAC_MAX register back to it's default value. 5828 5828 + * set the XMAC_MAX register back to its default value. 5829 5829 */ 5830 5830 niu_init_tx_mac(np); 5831 5831 niu_enable_tx_mac(np, 1);

+2 -2

drivers/net/ethernet/sun/niu.h

reviewed

··· 3250 3250 struct niu_parent *parent; 3251 3251 3252 3252 u32 flags; 3253 3253 - #define NIU_FLAGS_HOTPLUG_PHY_PRESENT 0x02000000 /* Removeable PHY detected*/ 3254 3254 - #define NIU_FLAGS_HOTPLUG_PHY 0x01000000 /* Removeable PHY */ 3253 3253 + #define NIU_FLAGS_HOTPLUG_PHY_PRESENT 0x02000000 /* Removable PHY detected*/ 3254 3254 + #define NIU_FLAGS_HOTPLUG_PHY 0x01000000 /* Removable PHY */ 3255 3255 #define NIU_FLAGS_VPD_VALID 0x00800000 /* VPD has valid version */ 3256 3256 #define NIU_FLAGS_MSIX 0x00400000 /* MSI-X in use */ 3257 3257 #define NIU_FLAGS_MCAST 0x00200000 /* multicast filter enabled */

+1 -1

drivers/net/ethernet/sun/sunhme.c

reviewed

··· 451 451 /* Auto negotiation. The scheme is very simple. We have a timer routine 452 452 * that keeps watching the auto negotiation process as it progresses. 453 453 * The DP83840 is first told to start doing it's thing, we set up the time 454 454 - * and place the timer state machine in it's initial state. 454 454 + * and place the timer state machine in its initial state. 455 455 * 456 456 * Here the timer peeks at the DP83840 status registers at each click to see 457 457 * if the auto negotiation has completed, we assume here that the DP83840 PHY

+1 -1

drivers/net/ethernet/sun/sunqe.h

reviewed

··· 36 36 #define GLOB_PSIZE_6144 0x10 /* 6k packet size */ 37 37 #define GLOB_PSIZE_8192 0x11 /* 8k packet size */ 38 38 39 39 - /* In MACE mode, there are four qe channels. Each channel has it's own 39 39 + /* In MACE mode, there are four qe channels. Each channel has its own 40 40 * status bits in the QEC status register. This macro picks out the 41 41 * ones you want. 42 42 */

+1 -1

drivers/net/ethernet/tehuti/tehuti.c

reviewed

··· 276 276 * currently intrs are disabled (since we read ISR), 277 277 * and we have failed to register next poll. 278 278 * so we read the regs to trigger chip 279 279 - * and allow further interupts. */ 279 279 + * and allow further interrupts. */ 280 280 READ_REG(priv, regTXF_WPTR_0); 281 281 READ_REG(priv, regRXD_WPTR_0); 282 282 }