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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Olof Johansson:
"A smaller batch of fixes, nothing that stands out as risky or scary.

Mostly DTS tweaks for a few issues:

- GPU fixlets for Meson

- CPU idle fix for LS1028A

- PWM interrupt fixes for i.MX6UL

Also, enable a driver (FSL_EDMA) on arm64 defconfig, and a warning and
two MAINTAINER tweaks"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: dts: imx6ul: fix PWM[1-4] interrupts
ARM: omap2: remove incorrect __init annotation
ARM: dts: gemini Fix up DNS-313 compatible string
ARM: dts: Blank D-Link DIR-685 console
arm64: defconfig: Enable FSL_EDMA driver
arm64: dts: ls1028a: Fix CPU idle fail.
MAINTAINERS: BCM53573: Add internal Broadcom mailing list
MAINTAINERS: BCM2835: Add internal Broadcom mailing list
ARM: dts: meson8b: fix the operating voltage of the Mali GPU
ARM: dts: meson8b: drop undocumented property from the Mali GPU node
ARM: dts: meson8: fix GPU interrupts and drop an undocumented property

+26 -25
+2
MAINTAINERS
··· 3122 3122 BROADCOM BCM2835 ARM ARCHITECTURE 3123 3123 M: Eric Anholt <eric@anholt.net> 3124 3124 M: Stefan Wahren <wahrenst@gmx.net> 3125 + L: bcm-kernel-feedback-list@broadcom.com 3125 3126 L: linux-rpi-kernel@lists.infradead.org (moderated for non-subscribers) 3126 3127 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 3127 3128 T: git git://github.com/anholt/linux ··· 3152 3151 3153 3152 BROADCOM BCM53573 ARM ARCHITECTURE 3154 3153 M: Rafał Miłecki <rafal@milecki.pl> 3154 + L: bcm-kernel-feedback-list@broadcom.com 3155 3155 L: linux-arm-kernel@lists.infradead.org 3156 3156 S: Maintained 3157 3157 F: arch/arm/boot/dts/bcm53573*
+4 -4
arch/arm/boot/dts/imx6ul.dtsi
··· 358 358 pwm1: pwm@2080000 { 359 359 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 360 360 reg = <0x02080000 0x4000>; 361 - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 361 + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; 362 362 clocks = <&clks IMX6UL_CLK_PWM1>, 363 363 <&clks IMX6UL_CLK_PWM1>; 364 364 clock-names = "ipg", "per"; ··· 369 369 pwm2: pwm@2084000 { 370 370 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 371 371 reg = <0x02084000 0x4000>; 372 - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 372 + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; 373 373 clocks = <&clks IMX6UL_CLK_PWM2>, 374 374 <&clks IMX6UL_CLK_PWM2>; 375 375 clock-names = "ipg", "per"; ··· 380 380 pwm3: pwm@2088000 { 381 381 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 382 382 reg = <0x02088000 0x4000>; 383 - interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 383 + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 384 384 clocks = <&clks IMX6UL_CLK_PWM3>, 385 385 <&clks IMX6UL_CLK_PWM3>; 386 386 clock-names = "ipg", "per"; ··· 391 391 pwm4: pwm@208c000 { 392 392 compatible = "fsl,imx6ul-pwm", "fsl,imx27-pwm"; 393 393 reg = <0x0208c000 0x4000>; 394 - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 394 + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 395 395 clocks = <&clks IMX6UL_CLK_PWM4>, 396 396 <&clks IMX6UL_CLK_PWM4>; 397 397 clock-names = "ipg", "per";
+2 -3
arch/arm/boot/dts/meson8.dtsi
··· 248 248 <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, 249 249 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, 250 250 <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>, 251 - <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>, 252 - <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>, 251 + <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>, 252 + <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>, 253 253 <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>, 254 254 <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>, 255 255 <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, ··· 264 264 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; 265 265 clock-names = "bus", "core"; 266 266 operating-points-v2 = <&gpu_opp_table>; 267 - switch-delay = <0xffff>; 268 267 }; 269 268 }; 270 269 }; /* end of / */
+5 -6
arch/arm/boot/dts/meson8b.dtsi
··· 163 163 164 164 opp-255000000 { 165 165 opp-hz = /bits/ 64 <255000000>; 166 - opp-microvolt = <1150000>; 166 + opp-microvolt = <1100000>; 167 167 }; 168 168 opp-364300000 { 169 169 opp-hz = /bits/ 64 <364300000>; 170 - opp-microvolt = <1150000>; 170 + opp-microvolt = <1100000>; 171 171 }; 172 172 opp-425000000 { 173 173 opp-hz = /bits/ 64 <425000000>; 174 - opp-microvolt = <1150000>; 174 + opp-microvolt = <1100000>; 175 175 }; 176 176 opp-510000000 { 177 177 opp-hz = /bits/ 64 <510000000>; 178 - opp-microvolt = <1150000>; 178 + opp-microvolt = <1100000>; 179 179 }; 180 180 opp-637500000 { 181 181 opp-hz = /bits/ 64 <637500000>; 182 - opp-microvolt = <1150000>; 182 + opp-microvolt = <1100000>; 183 183 turbo-mode; 184 184 }; 185 185 }; ··· 229 229 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; 230 230 clock-names = "bus", "core"; 231 231 operating-points-v2 = <&gpu_opp_table>; 232 - switch-delay = <0xffff>; 233 232 }; 234 233 }; 235 234 }; /* end of / */
+1 -1
arch/arm/mach-omap2/prm3xxx.c
··· 430 430 * registers, and omap3xxx_prm_reconfigure_io_chain() must be called. 431 431 * No return value. 432 432 */ 433 - static void __init omap3xxx_prm_enable_io_wakeup(void) 433 + static void omap3xxx_prm_enable_io_wakeup(void) 434 434 { 435 435 if (prm_features & PRM_HAS_IO_WAKEUP) 436 436 omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
+9 -9
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
··· 28 28 enable-method = "psci"; 29 29 clocks = <&clockgen 1 0>; 30 30 next-level-cache = <&l2>; 31 - cpu-idle-states = <&CPU_PH20>; 31 + cpu-idle-states = <&CPU_PW20>; 32 32 }; 33 33 34 34 cpu1: cpu@1 { ··· 38 38 enable-method = "psci"; 39 39 clocks = <&clockgen 1 0>; 40 40 next-level-cache = <&l2>; 41 - cpu-idle-states = <&CPU_PH20>; 41 + cpu-idle-states = <&CPU_PW20>; 42 42 }; 43 43 44 44 l2: l2-cache { ··· 53 53 */ 54 54 entry-method = "arm,psci"; 55 55 56 - CPU_PH20: cpu-ph20 { 57 - compatible = "arm,idle-state"; 58 - idle-state-name = "PH20"; 59 - arm,psci-suspend-param = <0x00010000>; 60 - entry-latency-us = <1000>; 61 - exit-latency-us = <1000>; 62 - min-residency-us = <3000>; 56 + CPU_PW20: cpu-pw20 { 57 + compatible = "arm,idle-state"; 58 + idle-state-name = "PW20"; 59 + arm,psci-suspend-param = <0x0>; 60 + entry-latency-us = <2000>; 61 + exit-latency-us = <2000>; 62 + min-residency-us = <6000>; 63 63 }; 64 64 }; 65 65
+1
arch/arm64/configs/defconfig
··· 613 613 CONFIG_RTC_DRV_IMX_SC=m 614 614 CONFIG_RTC_DRV_XGENE=y 615 615 CONFIG_DMADEVICES=y 616 + CONFIG_FSL_EDMA=y 616 617 CONFIG_DMA_BCM2835=m 617 618 CONFIG_K3_DMA=y 618 619 CONFIG_MV_XOR=y