Rockbox open source high quality audio player as a Music Player Daemon
mpris
rockbox
mpd
libadwaita
audio
rust
zig
deno
echoplayer: disable parts of system_init() for application
Most of system_init() should only be performed once after
reset, and is not safe to re-run when the bootloader jumps
to the application.
Change-Id: I4d2e804ce4884da13b9167ddcda860ef3b5ba7d0
authored by
Aidan MacDonald
and committed by
Solomon Peachy
21ba79d4
f642d19c
+47
-32
+47
-32
firmware/target/arm/stm32/echoplayer/system-echoplayer.c
+47
-32
firmware/target/arm/stm32/echoplayer/system-echoplayer.c
···
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#include "regs/stm32h743/rtc.h"
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#include "regs/cortex-m/cm_scb.h"
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#ifdef BOOTLOADER
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# define BOOTLOADER_INIT 1
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#else
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# define BOOTLOADER_INIT 0
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#endif
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+
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#define F_INPUT GPIOF_INPUT(GPIO_PULL_DISABLED)
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#define F_INPUT_PU GPIOF_INPUT(GPIO_PULL_UP)
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#define F_INPUT_PD GPIOF_INPUT(GPIO_PULL_DOWN)
···
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void system_init(void)
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{
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-
/* Enable clocks for all used GPIO banks */
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reg_writef(RCC_AHB4ENR,
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GPIOAEN(1), GPIOBEN(1), GPIOCEN(1), GPIODEN(1),
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GPIOEEN(1), GPIOFEN(1), GPIOGEN(1), GPIOHEN(1), GPIOIEN(1));
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if (BOOTLOADER_INIT)
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{
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/* Enable clocks for all used GPIO banks */
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reg_writef(RCC_AHB4ENR,
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GPIOAEN(1), GPIOBEN(1), GPIOCEN(1), GPIODEN(1),
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GPIOEEN(1), GPIOFEN(1), GPIOGEN(1), GPIOHEN(1), GPIOIEN(1));
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-
/*
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* NOTE: I think it's possible to disable clocks for the banks which
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* we don't need to access at runtime because these are only clocking
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* register access. Probably a micro-optimization but it supposedly
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* does save a few uA/MHz.
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*/
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/*
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* NOTE: I think it's possible to disable clocks for the banks which
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* we don't need to access at runtime because these are only clocking
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* register access. Probably a micro-optimization but it supposedly
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* does save a few uA/MHz.
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*/
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}
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/*
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* Set cpu_power_on high as early as possible to
···
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system_debug_enable(true);
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#endif
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/* Enable CPU cache */
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stm32_enable_caches();
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if (BOOTLOADER_INIT)
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{
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/* Enable CPU cache */
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stm32_enable_caches();
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-
/* Initialize system clocks */
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echoplayer_clock_init();
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/* Initialize system clocks */
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echoplayer_clock_init();
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}
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/* Enable systick early due to udelay() needed for FMC init */
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stm32_systick_enable();
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/* Configure GPIOs and start FMC */
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gpio_configure_all(gpios, ARRAYLEN(gpios),
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pingroups, ARRAYLEN(pingroups));
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fmc_init();
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if (BOOTLOADER_INIT)
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{
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/* Configure GPIOs and start FMC */
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gpio_configure_all(gpios, ARRAYLEN(gpios),
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pingroups, ARRAYLEN(pingroups));
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fmc_init();
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/* Read & clear reset source */
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uint32_t rsr = reg_var(RCC_RSR);
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reg_assignf(RCC_RSR, RMVF(1));
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/* Read & clear reset source */
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uint32_t rsr = reg_var(RCC_RSR);
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reg_assignf(RCC_RSR, RMVF(1));
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-
/*
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* Determine boot reason -- SFTRST means a software reset
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* occurred, which may be a reboot or a power off
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*/
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if (reg_vreadf(rsr, RCC_RSR, SFTRSTF))
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{
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reg_writef(RCC_APB4ENR, RTCAPBEN(1));
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/*
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* Determine boot reason -- SFTRST means a software reset
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* occurred, which may be a reboot or a power off
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*/
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if (reg_vreadf(rsr, RCC_RSR, SFTRSTF))
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{
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reg_writef(RCC_APB4ENR, RTCAPBEN(1));
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if (reg_readf(RTC_CR, WUTE))
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echoplayer_boot_reason = ECHOPLAYER_BOOT_REASON_SW_REBOOT;
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else
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echoplayer_boot_reason = ECHOPLAYER_BOOT_REASON_SW_POWEROFF;
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if (reg_readf(RTC_CR, WUTE))
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echoplayer_boot_reason = ECHOPLAYER_BOOT_REASON_SW_REBOOT;
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else
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echoplayer_boot_reason = ECHOPLAYER_BOOT_REASON_SW_POWEROFF;
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}
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}
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/* Disable RTC_OUT pin */