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imx233: add support for 50MHz clock with SD cards
Now that the drive strength problem has been fixed, we can safely
drive sd cards at 48MHz in HS mode to get the best possible
transfer speed at 3.3V.
Change-Id: I0291589c399fb4880deba97895ff578451a32f99
+25
-34
+25
-34
firmware/target/arm/imx233/sdmmc-imx233.c
+25
-34
firmware/target/arm/imx233/sdmmc-imx233.c
···
316
316
imx233_ssp_set_block_size(ssp, 9);
317
317
318
318
SDMMC_RCA(drive) = 0;
319
-
bool sd_v2 = false;
319
+
bool sd_v2 = false, sd_hs = false;
320
320
uint32_t resp;
321
321
long init_timeout;
322
322
/* go to idle state */
···
349
349
if(!send_cmd(drive, SD_SEND_RELATIVE_ADDR, 0, MCI_RESP, &SDMMC_INFO(drive).rca))
350
350
return -4;
351
351
352
-
/* Try to switch V2 cards to HS timings, non HS seem to ignore this */
353
-
if(sd_v2)
354
-
{
355
-
/* CMD7 w/rca: Select card to put it in TRAN state */
356
-
if(!send_cmd(drive, SD_SELECT_CARD, SDMMC_RCA(drive), MCI_RESP, NULL))
357
-
return -5;
358
-
359
-
if(wait_for_state(drive, SD_TRAN))
360
-
return -6;
361
-
362
-
/* CMD6 */
363
-
{
364
-
/* only transfer 64 bytes */
365
-
imx233_ssp_set_block_size(ssp, /*log2(64)*/6);
366
-
if(imx233_ssp_sd_mmc_transfer(ssp, SD_SWITCH_FUNC, 0x80fffff1,
367
-
SSP_SHORT_RESP, aligned_buffer[drive], 1, true, true, NULL))
368
-
{
369
-
imx233_ssp_set_block_size(ssp, /*log2(512)*/9);
370
-
return -12;
371
-
}
372
-
imx233_ssp_set_block_size(ssp, /*log2(512)*/9);
373
-
}
374
-
375
-
/* go back to STBY state so we can read csd */
376
-
/* CMD7 w/rca=0: Deselect card to put it in STBY state */
377
-
if(!send_cmd(drive, SD_DESELECT_CARD, 0, MCI_NO_RESP, NULL))
378
-
return -8;
379
-
}
380
-
381
352
/* CMD9 send CSD */
382
353
if(!send_cmd(drive, SD_SEND_CSD, SDMMC_RCA(drive), MCI_RESP|MCI_LONG_RESP,
383
354
SDMMC_INFO(drive).csd))
···
386
357
sd_parse_csd(&SDMMC_INFO(drive));
387
358
window_start[drive] = 0;
388
359
window_end[drive] = SDMMC_INFO(drive).numblocks;
389
-
390
-
/* SSPCLK @ 96MHz
391
-
* gives bitrate of 96 / 4 / 1 = 24MHz */
392
-
imx233_ssp_set_timings(ssp, 4, 0, 0xffff);
393
360
394
361
/* CMD7 w/rca: Select card to put it in TRAN state */
395
362
if(!send_cmd(drive, SD_SELECT_CARD, SDMMC_RCA(drive), MCI_RESP, &resp))
···
407
374
/* Switch to 4-bit */
408
375
imx233_ssp_set_bus_width(ssp, 4);
409
376
377
+
/* Try to switch V2 cards to HS timings, non HS seem to ignore this */
378
+
if(sd_v2)
379
+
{
380
+
/* CMD6 switch to HS */
381
+
{
382
+
/* only transfer 64 bytes */
383
+
imx233_ssp_set_block_size(ssp, /*log2(64)*/6);
384
+
if(imx233_ssp_sd_mmc_transfer(ssp, SD_SWITCH_FUNC, 0x80fffff1,
385
+
SSP_SHORT_RESP, aligned_buffer[drive], 1, true, true, NULL))
386
+
return -12;
387
+
imx233_ssp_set_block_size(ssp, /*log2(512)*/9);
388
+
if((aligned_buffer[drive][16] & 0xf) == 1)
389
+
sd_hs = true;
390
+
}
391
+
}
392
+
410
393
/* probe for CMD23 support */
411
394
support_set_block_count[drive] = false;
412
395
/* ACMD51, only transfer 8 bytes */
···
421
404
}
422
405
}
423
406
imx233_ssp_set_block_size(ssp, /*log2(512)*/9);
407
+
408
+
/* SSPCLK @ 96MHz
409
+
* gives bitrate of 96 / 4 / 1 = 24MHz
410
+
* gives bitrate of 96 / 2 / 1 = 48MHz */
411
+
if(sd_hs)
412
+
imx233_ssp_set_timings(ssp, 2, 0, 0xffff);
413
+
else
414
+
imx233_ssp_set_timings(ssp, 4, 0, 0xffff);
424
415
425
416
SDMMC_INFO(drive).initialized = 1;
426
417