Rockbox open source high quality audio player as a Music Player Daemon
mpris
rockbox
mpd
libadwaita
audio
rust
zig
deno
stm32h7: support clock enable/disable in SPI driver
Change-Id: Id4baa340e1b67fb265628add9191acb08e3a0615
authored by
Aidan MacDonald
and committed by
Solomon Peachy
a9b75fc4
ddb3bb35
+35
-4
+21
firmware/target/arm/stm32/echoplayer/clock-echoplayer.c
+21
firmware/target/arm/stm32/echoplayer/clock-echoplayer.c
···
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reg_writef(PWR_CR1, DBP(0));
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}
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+
static void init_periph_clock(void)
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{
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reg_writef(RCC_D2CCIP1R, SPI45SEL_V(HSE));
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}
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+
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void stm_target_clock_init(void)
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{
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init_hse();
···
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init_vos();
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init_system_clock();
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init_lse();
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init_periph_clock();
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}
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void stm_target_clock_enable(enum stm_clock clock, bool enable)
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{
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switch (clock)
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{
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case STM_CLOCK_SPI5_KER:
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reg_writef(RCC_APB2ENR, SPI5EN(enable));
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reg_writef(RCC_APB2LPENR, SPI5EN(enable));
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break;
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default:
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panicf("%s: unsupported clock %d", __func__, (int)clock);
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break;
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}
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}
+2
-4
firmware/target/arm/stm32/echoplayer/lcd-echoplayer.c
+2
-4
firmware/target/arm/stm32/echoplayer/lcd-echoplayer.c
···
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#include "nvic-arm.h"
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#include "spi-stm32h7.h"
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#include "gpio-stm32h7.h"
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#include "clock-stm32h7.h"
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#include "regs/stm32h743/rcc.h"
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#include "regs/stm32h743/spi.h"
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struct stm_spi_config spi_cfg = {
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.instance = ITA_SPI5,
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.clock = STM_CLOCK_SPI5_KER,
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.mode = STM_SPIMODE_HALF_DUPLEX,
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.proto = STM_SPIPROTO_MOTOROLA,
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.frame_bits = 9,
···
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void lcd_init_device(void)
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{
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-
/* Clock configuration -- should be 12 MHz (SPI clock is 1/2 of HSE) */
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reg_writef(RCC_D2CCIP1R, SPI45SEL_V(HSE));
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reg_writef(RCC_APB2ENR, SPI5EN(1));
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-
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/* Configure SPI bus */
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stm_spi_init(&spi, &spi_cfg);
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nvic_enable_irq(NVIC_IRQN_SPI5);
+9
firmware/target/arm/stm32/spi-stm32h7.c
+9
firmware/target/arm/stm32/spi-stm32h7.c
···
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if (tsize > TSIZE_MAX)
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panicf("%s: tsize > TSIZE_MAX", __func__);
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stm_clock_enable(spi->clock);
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if (spi->set_cs)
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spi->set_cs(spi, true);
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···
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if (spi->set_cs)
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spi->set_cs(spi, false);
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stm_clock_disable(spi->clock);
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}
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static uint32_t stm_spi_pack(const void **bufp, size_t *sizep)
···
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uint32_t ftlevel;
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spi->regs = config->instance;
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spi->clock = config->clock;
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spi->mode = config->mode;
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spi->set_cs = config->set_cs;
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···
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ftlevel *= 2;
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}
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+
stm_clock_enable(spi->clock);
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/* TODO: allow setting MBR here */
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reg_writelf(spi->regs, SPI_CFG1,
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MBR(0),
···
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IOSWP(config->swap_mosi_miso),
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MIDI(0),
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MSSI(0));
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stm_clock_disable(spi->clock);
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}
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int stm_spi_xfer(struct stm_spi *spi, size_t size,
+3
firmware/target/arm/stm32/spi-stm32h7.h
+3
firmware/target/arm/stm32/spi-stm32h7.h
···
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#include "system.h"
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#include "semaphore.h"
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#include "clock-stm32h7.h"
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#include <stddef.h>
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struct stm_spi;
···
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{
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/* Peripheral instance base address; one of ITA_SPIx */
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uint32_t instance;
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enum stm_clock clock;
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enum stm_spi_mode mode;
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enum stm_spi_protocol proto;
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stm_spi_set_cs_t set_cs;
···
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struct stm_spi
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{
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uint32_t regs;
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enum stm_clock clock;
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enum stm_spi_mode mode;
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stm_spi_set_cs_t set_cs;
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uint32_t frame_size;