Rockbox open source high quality audio player as a Music Player Daemon
mpris
rockbox
mpd
libadwaita
audio
rust
zig
deno
fix rockchip i2c driver
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29952 a1c6a512-1295-4272-9138-f99709370657
+36
-22
+36
-22
firmware/target/arm/rk27xx/i2c-rk27xx.c
+36
-22
firmware/target/arm/rk27xx/i2c-rk27xx.c
···
40
40
41
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static bool i2c_write_byte(uint8_t data, bool start)
42
42
{
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-
long timeout = current_tick + HZ / 50;
43
+
long timeout = current_tick + 50;
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-
/* START */
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-
I2C_CONR |= (1<<3) | (1<<2); /* master port enable, transmit bit */
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-
I2C_MTXR = data;
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+
/* START */
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+
I2C_CONR |= (1<<3) | (1<<2); /* master port enable, transmit bit */
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+
I2C_MTXR = data;
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-
if (start)
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-
I2C_LCMR = (1<<2) | (1<<0); /* resume op, start bit */
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-
else
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-
I2C_LCMR = (1<<2); /* resume op */
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+
if (start)
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+
I2C_LCMR = (1<<2) | (1<<0); /* resume op, start bit */
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+
else
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+
I2C_LCMR = (1<<2); /* resume op */
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-
I2C_CONR &= ~(1<<4); /* ACK enable */
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+
I2C_CONR &= ~(1<<4); /* ACK enable */
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-
/* wait for ACK from slave */
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-
while ( !(I2C_ISR & (1<<0)) || (I2C_LSR & (1<<0)) )
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-
if (TIME_AFTER(current_tick, timeout))
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-
return false;
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+
/* wait for ACK from slave */
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+
while ( (!(I2C_ISR & (1<<0))) || (I2C_LSR & (1<<1)) )
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+
if (TIME_AFTER(current_tick, timeout))
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+
return false;
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-
/* clear status bit */
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-
I2C_ISR &= ~(1<<0);
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+
/* clear status bit */
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+
I2C_ISR &= ~(1<<0);
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-
return true;
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+
return true;
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}
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static bool i2c_read_byte(unsigned char *data)
···
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I2C_LCMR = (1<<2); /* resume op */
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-
while (I2C_ISR & (1<<1))
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+
while (!(I2C_ISR & (1<<1)))
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if (TIME_AFTER(current_tick, timeout))
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return false;
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···
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}
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/* route i2c bus to internal codec or external bus
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-
* internal codec has 0x27 i2c slave address so
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+
* internal codec has 0x4e i2c slave address so
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* access to this address is routed to internal bus.
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* All other addresses are routed to external pads
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*/
···
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{
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unsigned long muxa = SCU_IOMUXA_CON & ~(0x1f<<14);
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-
if (slave == (0x27<<1))
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+
if ((slave & 0xfe) == (0x27<<1))
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{
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/* internal codec */
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-
SCU_IOMUXA_CON = muxa | (1<<16) | (1<<14);
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+
SCU_IOMUXA_CON = (muxa | (1<<16) | (1<<14));
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}
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else
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{
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/* external I2C bus */
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-
SCU_IOMUXA_CON = muxa | (1<<18);
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+
SCU_IOMUXA_CON = (muxa | (1<<18));
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}
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}
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···
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* APBfreq = 50Mhz
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* SCLfreq = (APBfreq/5*(I2CCDVR[5:3] + 1) * 2^((I2CCDVR[2:0] + 1))
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*/
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-
I2C_OPR = (I2C_OPR & ~(0x3F)) | (6<<3) | 1<<0;
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+
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+
/* we are driving this slightly above specs
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+
* (6<<3) | (1<<0) 416kHz
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+
* (7<<3) | (1<<0) 357kHz
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+
* (6<<3) | (2<<0) 208kHz
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+
*/
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+
I2C_OPR = (I2C_OPR & ~(0x3F)) | (6<<3) | (1<<0);
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I2C_IER = 0x00;
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143
···
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mutex_lock(&i2c_mtx);
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i2c_iomux(slave);
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+
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+
/* clear all flags */
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+
I2C_ISR = 0x00
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+
I2C_IER = 0x00;
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/* START */
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if (! i2c_write_byte(slave & ~1, true))
···
187
197
mutex_lock(&i2c_mtx);
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i2c_iomux(slave);
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+
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+
/* clear all flags */
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+
I2C_ISR = 0x00;
203
+
I2C_IER = 0x00;
190
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if (address >= 0)
192
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{