Rockbox open source high quality audio player as a Music Player Daemon
mpris
rockbox
mpd
libadwaita
audio
rust
zig
deno
stm32h743: add LCD-TFT controller registers
Change-Id: Icefbe3c7f10a38c424105586b0bccf6941972cb1
authored by
Aidan MacDonald
and committed by
Solomon Peachy
e98dc793
801f386d
+161
+161
firmware/reggen/stm32h743.regs
+161
firmware/reggen/stm32h743.regs
···
784
784
0 READ_ISS_OVERRIDE
785
785
}
786
786
}
787
+
788
+
// LCD-TFT display controller
789
+
LTDC @ 0x50001000 : block {
790
+
SSCR @ 0x08 : reg {
791
+
27 16 HSW
792
+
10 00 VSH
793
+
}
794
+
795
+
BPCR @ 0x0c : reg {
796
+
27 16 AHBP
797
+
10 00 AVBP
798
+
}
799
+
800
+
AWCR @ 0x10 : reg {
801
+
27 16 AAW
802
+
10 00 AAH
803
+
}
804
+
805
+
TWCR @ 0x14 : reg {
806
+
27 16 TOTALW
807
+
10 00 TOTALH
808
+
}
809
+
810
+
GCR @ 0x18 : reg {
811
+
-- 31 HSPOL
812
+
-- 30 VSPOL
813
+
-- 29 DEPOL
814
+
-- 28 PCPOL
815
+
-- 16 DEN
816
+
14 12 DRW
817
+
10 08 DGW
818
+
06 04 DBW
819
+
-- 00 LTDCEN
820
+
}
821
+
822
+
SRCR @ 0x24 : reg {
823
+
1 VBR
824
+
0 IMR
825
+
}
826
+
827
+
BCCR @ 0x2c : reg {
828
+
23 16 BCRED
829
+
15 08 BCGREEN
830
+
07 00 BCBLUE
831
+
}
832
+
833
+
IER @ 0x34 : reg {
834
+
3 RRIE
835
+
2 TERRIE
836
+
1 FUIE
837
+
0 LIE
838
+
}
839
+
840
+
ISR @ 0x38 : reg {
841
+
3 RRIF
842
+
2 TERRIF
843
+
1 FUIF
844
+
0 LIF
845
+
}
846
+
847
+
ICR @ 0x3C : reg {
848
+
3 CRRIF
849
+
2 CTERRIF
850
+
1 CFUIF
851
+
0 CLIF
852
+
}
853
+
854
+
LIPCR @ 0x40 : reg {
855
+
10 00 LIPOS
856
+
}
857
+
858
+
CPSR @ 0x44 : reg {
859
+
31 16 CXPOS
860
+
15 00 CYPOS
861
+
}
862
+
863
+
CDSR @ 0x48 : reg {
864
+
3 HSYNCS
865
+
2 VSYNCS
866
+
1 HDES
867
+
0 VDES
868
+
}
869
+
870
+
LAYER @ 0x80 [2; 0x80] : block {
871
+
CR @ 0x04 : reg {
872
+
4 CLUTEN
873
+
1 COLKEN
874
+
0 LEN
875
+
}
876
+
877
+
WHPCR @ 0x08 : reg {
878
+
27 16 WHSPPOS
879
+
11 00 WHSTPOS
880
+
}
881
+
882
+
WVPCR @ 0x0c : reg {
883
+
26 16 WVSPPOS
884
+
10 00 WVSTPOS
885
+
}
886
+
887
+
CKCR @ 0x10 : reg {
888
+
23 16 CKRED
889
+
15 08 CKGREEN
890
+
07 00 CKBLUE
891
+
}
892
+
893
+
PFCR @ 0x14 : reg {
894
+
2 0 PF : {
895
+
0 = ARGB8888
896
+
1 = RGB888
897
+
2 = RGB565
898
+
3 = ARGB1555
899
+
4 = ARGB4444
900
+
5 = L8
901
+
6 = AL44
902
+
7 = AL88
903
+
}
904
+
}
905
+
906
+
CACR @ 0x18 : reg {
907
+
7 0 CONSTA
908
+
}
909
+
910
+
DCCR @ 0x1c : reg {
911
+
31 24 DCALPHA
912
+
24 16 DCRED
913
+
15 08 DCGREEN
914
+
07 00 DCBLUE
915
+
}
916
+
917
+
BFCR @ 0x20 : reg {
918
+
10 08 BF2 : {
919
+
4 = CONSTANT_ALPHA
920
+
6 = PIXEL_ALPHA_TIMES_CONSTANT_ALPHA
921
+
}
922
+
923
+
02 00 BF1 : {
924
+
5 = ONE_MINUS_CONSTANT_ALPHA
925
+
7 = ONE_MINUS_PIXEL_ALPHA_TIMES_CONSTANT_ALPHA
926
+
}
927
+
}
928
+
929
+
CFBAR @ 0x2c : reg
930
+
931
+
CFBLR @ 0x30 : reg {
932
+
28 16 CFBP
933
+
12 00 CFBLL
934
+
}
935
+
936
+
CFBLNR @ 0x34 : reg {
937
+
10 00 CFBLNBR
938
+
}
939
+
940
+
CLUTWR @ 0x44 : reg {
941
+
31 24 CLUTADD
942
+
23 16 RED
943
+
15 08 GREEN
944
+
07 00 BLUE
945
+
}
946
+
}
947
+
}