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PM / devfreq: rockchip-dfi: Add RK3568 support

This adds RK3568 support to the DFI driver. Only iniitialization
differs from the currently supported RK3399.

Link: https://lore.kernel.org/all/20231018061714.3553817-11-s.hauer@pengutronix.de/
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>

authored by

Sascha Hauer and committed by
Chanwoo Choi
076b0597 d3b0f6ab

+39
+27
drivers/devfreq/event/rockchip-dfi.c
··· 23 23 24 24 #include <soc/rockchip/rockchip_grf.h> 25 25 #include <soc/rockchip/rk3399_grf.h> 26 + #include <soc/rockchip/rk3568_grf.h> 26 27 27 28 #define DMC_MAX_CHANNELS 2 28 29 ··· 212 211 return 0; 213 212 }; 214 213 214 + static int rk3568_dfi_init(struct rockchip_dfi *dfi) 215 + { 216 + struct regmap *regmap_pmu = dfi->regmap_pmu; 217 + u32 reg2, reg3; 218 + 219 + regmap_read(regmap_pmu, RK3568_PMUGRF_OS_REG2, &reg2); 220 + regmap_read(regmap_pmu, RK3568_PMUGRF_OS_REG3, &reg3); 221 + 222 + /* lower 3 bits of the DDR type */ 223 + dfi->ddr_type = FIELD_GET(RK3568_PMUGRF_OS_REG2_DRAMTYPE_INFO, reg2); 224 + 225 + /* 226 + * For version three and higher the upper two bits of the DDR type are 227 + * in RK3568_PMUGRF_OS_REG3 228 + */ 229 + if (FIELD_GET(RK3568_PMUGRF_OS_REG3_SYSREG_VERSION, reg3) >= 0x3) 230 + dfi->ddr_type |= FIELD_GET(RK3568_PMUGRF_OS_REG3_DRAMTYPE_INFO_V3, reg3) << 3; 231 + 232 + dfi->channel_mask = BIT(0); 233 + dfi->max_channels = 1; 234 + 235 + return 0; 236 + }; 237 + 215 238 static const struct of_device_id rockchip_dfi_id_match[] = { 216 239 { .compatible = "rockchip,rk3399-dfi", .data = rk3399_dfi_init }, 240 + { .compatible = "rockchip,rk3568-dfi", .data = rk3568_dfi_init }, 217 241 { }, 218 242 }; 243 + 219 244 MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match); 220 245 221 246 static int rockchip_dfi_probe(struct platform_device *pdev)
+12
include/soc/rockchip/rk3568_grf.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0+ */ 2 + #ifndef __SOC_RK3568_GRF_H 3 + #define __SOC_RK3568_GRF_H 4 + 5 + #define RK3568_PMUGRF_OS_REG2 0x208 6 + #define RK3568_PMUGRF_OS_REG2_DRAMTYPE_INFO GENMASK(15, 13) 7 + 8 + #define RK3568_PMUGRF_OS_REG3 0x20c 9 + #define RK3568_PMUGRF_OS_REG3_DRAMTYPE_INFO_V3 GENMASK(13, 12) 10 + #define RK3568_PMUGRF_OS_REG3_SYSREG_VERSION GENMASK(31, 28) 11 + 12 + #endif /* __SOC_RK3568_GRF_H */