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drm/i915: Remove i915_reg.h from intel_display_device.c

Move GU_CNTL_PROTECTED and GMD_ID_DISPLAY to common header,
this helps intel_display_device.c free from i915_reg.h dependency.

v2: Move GMD_ID_DISPLAY to display header instead of common (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patch.msgid.link/20260205094341.1882816-7-uma.shankar@intel.com

+11 -8
+3 -4
drivers/gpu/drm/i915/display/intel_display_device.c
··· 10 10 #include <drm/drm_print.h> 11 11 #include <drm/intel/pciids.h> 12 12 13 - #include "i915_reg.h" 14 13 #include "intel_cx0_phy_regs.h" 15 14 #include "intel_de.h" 16 15 #include "intel_display.h" ··· 1538 1539 return NULL; 1539 1540 } 1540 1541 1541 - gmd_id.ver = REG_FIELD_GET(GMD_ID_ARCH_MASK, val); 1542 - gmd_id.rel = REG_FIELD_GET(GMD_ID_RELEASE_MASK, val); 1543 - gmd_id.step = REG_FIELD_GET(GMD_ID_STEP, val); 1542 + gmd_id.ver = REG_FIELD_GET(GMD_ID_DISPLAY_ARCH_MASK, val); 1543 + gmd_id.rel = REG_FIELD_GET(GMD_ID_DISPLAY_RELEASE_MASK, val); 1544 + gmd_id.step = REG_FIELD_GET(GMD_ID_DISPLAY_STEP, val); 1544 1545 1545 1546 for (i = 0; i < ARRAY_SIZE(gmdid_display_map); i++) { 1546 1547 if (gmd_id.ver == gmdid_display_map[i].ver &&
+8
drivers/gpu/drm/i915/display/intel_display_regs.h
··· 6 6 7 7 #include "intel_display_reg_defs.h" 8 8 9 + #define GU_CNTL_PROTECTED _MMIO(0x10100C) 10 + #define DEPRESENT REG_BIT(9) 11 + 9 12 #define _GEN7_PIPEA_DE_LOAD_SL 0x70068 10 13 #define _GEN7_PIPEB_DE_LOAD_SL 0x71068 11 14 #define GEN7_PIPE_DE_LOAD_SL(pipe) _MMIO_PIPE(pipe, _GEN7_PIPEA_DE_LOAD_SL, _GEN7_PIPEB_DE_LOAD_SL) ··· 1628 1625 #define TGL_DFSM_PIPE_D_DISABLE (1 << 22) 1629 1626 #define GLK_DFSM_DISPLAY_DSC_DISABLE (1 << 7) 1630 1627 #define XE2LPD_DFSM_DBUF_OVERLAP_DISABLE (1 << 3) 1628 + 1629 + #define GMD_ID_DISPLAY _MMIO(0x510a0) 1630 + #define GMD_ID_DISPLAY_ARCH_MASK REG_GENMASK(31, 22) 1631 + #define GMD_ID_DISPLAY_RELEASE_MASK REG_GENMASK(21, 14) 1632 + #define GMD_ID_DISPLAY_STEP REG_GENMASK(5, 0) 1631 1633 1632 1634 #define XE2LPD_DE_CAP _MMIO(0x41100) 1633 1635 #define XE2LPD_DE_CAP_3DLUT_MASK REG_GENMASK(31, 30)
-4
drivers/gpu/drm/i915/i915_reg.h
··· 116 116 * #define GEN8_BAR _MMIO(0xb888) 117 117 */ 118 118 119 - #define GU_CNTL_PROTECTED _MMIO(0x10100C) 120 - #define DEPRESENT REG_BIT(9) 121 - 122 119 #define GU_CNTL _MMIO(0x101010) 123 120 #define LMEM_INIT REG_BIT(7) 124 121 #define DRIVERFLR REG_BIT(31) ··· 922 925 #define MASK_WAKEMEM REG_BIT(13) 923 926 #define DDI_CLOCK_REG_ACCESS REG_BIT(7) 924 927 925 - #define GMD_ID_DISPLAY _MMIO(0x510a0) 926 928 #define GMD_ID_ARCH_MASK REG_GENMASK(31, 22) 927 929 #define GMD_ID_RELEASE_MASK REG_GENMASK(21, 14) 928 930 #define GMD_ID_STEP REG_GENMASK(5, 0)