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drm/amdkfd: refactor rlc/gfx spm

for adding multiple xcc support.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Bing Ma <Bing.Ma@amd.com>
Reviewed-by: Gang Ba <gaba@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

James Zhu and committed by
Alex Deucher
0bebe9b9 36b266bd

+24 -17
+2 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h
··· 257 257 void (*stop)(struct amdgpu_device *adev); 258 258 void (*reset)(struct amdgpu_device *adev); 259 259 void (*start)(struct amdgpu_device *adev); 260 - void (*update_spm_vmid)(struct amdgpu_device *adev, struct amdgpu_ring *ring, unsigned vmid); 260 + void (*update_spm_vmid)(struct amdgpu_device *adev, int xcc_id, 261 + struct amdgpu_ring *ring, unsigned vmid); 261 262 bool (*is_rlcg_access_range)(struct amdgpu_device *adev, uint32_t reg); 262 263 }; 263 264
+1 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
··· 834 834 amdgpu_gmc_emit_pasid_mapping(ring, job->vmid, job->pasid); 835 835 836 836 if (spm_update_needed && adev->gfx.rlc.funcs->update_spm_vmid) 837 - adev->gfx.rlc.funcs->update_spm_vmid(adev, ring, job->vmid); 837 + adev->gfx.rlc.funcs->update_spm_vmid(adev, ring->xcc_id, ring, job->vmid); 838 838 839 839 if (ring->funcs->emit_gds_switch && 840 840 gds_switch_needed) {
+2 -1
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
··· 8318 8318 } 8319 8319 } 8320 8320 8321 - static void gfx_v10_0_update_spm_vmid(struct amdgpu_device *adev, struct amdgpu_ring *ring, unsigned int vmid) 8321 + static void gfx_v10_0_update_spm_vmid(struct amdgpu_device *adev, int xcc_id, 8322 + struct amdgpu_ring *ring, unsigned int vmid) 8322 8323 { 8323 8324 amdgpu_gfx_off_ctrl(adev, false); 8324 8325
+3 -2
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
··· 918 918 919 919 /* init spm vmid with 0xf */ 920 920 if (adev->gfx.rlc.funcs->update_spm_vmid) 921 - adev->gfx.rlc.funcs->update_spm_vmid(adev, NULL, 0xf); 921 + adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf); 922 922 923 923 return 0; 924 924 } ··· 5569 5569 return 0; 5570 5570 } 5571 5571 5572 - static void gfx_v11_0_update_spm_vmid(struct amdgpu_device *adev, struct amdgpu_ring *ring, unsigned vmid) 5572 + static void gfx_v11_0_update_spm_vmid(struct amdgpu_device *adev, int xcc_id, 5573 + struct amdgpu_ring *ring, unsigned vmid) 5573 5574 { 5574 5575 u32 reg, pre_data, data; 5575 5576
+2 -1
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
··· 762 762 763 763 /* init spm vmid with 0xf */ 764 764 if (adev->gfx.rlc.funcs->update_spm_vmid) 765 - adev->gfx.rlc.funcs->update_spm_vmid(adev, NULL, 0xf); 765 + adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf); 766 766 767 767 return 0; 768 768 } ··· 3957 3957 } 3958 3958 3959 3959 static void gfx_v12_0_update_spm_vmid(struct amdgpu_device *adev, 3960 + int xcc_id, 3960 3961 struct amdgpu_ring *ring, 3961 3962 unsigned vmid) 3962 3963 {
+3 -2
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
··· 3245 3245 3246 3246 /* init spm vmid with 0xf */ 3247 3247 if (adev->gfx.rlc.funcs->update_spm_vmid) 3248 - adev->gfx.rlc.funcs->update_spm_vmid(adev, NULL, 0xf); 3248 + adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf); 3249 3249 3250 3250 return 0; 3251 3251 } ··· 3471 3471 return 0; 3472 3472 } 3473 3473 3474 - static void gfx_v7_0_update_spm_vmid(struct amdgpu_device *adev, struct amdgpu_ring *ring, unsigned vmid) 3474 + static void gfx_v7_0_update_spm_vmid(struct amdgpu_device *adev, int xcc_id, 3475 + struct amdgpu_ring *ring, unsigned vmid) 3475 3476 { 3476 3477 u32 data; 3477 3478
+3 -2
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
··· 1274 1274 1275 1275 /* init spm vmid with 0xf */ 1276 1276 if (adev->gfx.rlc.funcs->update_spm_vmid) 1277 - adev->gfx.rlc.funcs->update_spm_vmid(adev, NULL, 0xf); 1277 + adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf); 1278 1278 1279 1279 return 0; 1280 1280 } ··· 5541 5541 } 5542 5542 } 5543 5543 5544 - static void gfx_v8_0_update_spm_vmid(struct amdgpu_device *adev, struct amdgpu_ring *ring, unsigned vmid) 5544 + static void gfx_v8_0_update_spm_vmid(struct amdgpu_device *adev, int xcc_id, 5545 + struct amdgpu_ring *ring, unsigned vmid) 5545 5546 { 5546 5547 u32 data; 5547 5548
+2 -1
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
··· 5171 5171 WREG32_SOC15(GC, 0, mmRLC_SPM_MC_CNTL, data); 5172 5172 } 5173 5173 5174 - static void gfx_v9_0_update_spm_vmid(struct amdgpu_device *adev, struct amdgpu_ring *ring, unsigned int vmid) 5174 + static void gfx_v9_0_update_spm_vmid(struct amdgpu_device *adev, int xcc_id, 5175 + struct amdgpu_ring *ring, unsigned int vmid) 5175 5176 { 5176 5177 amdgpu_gfx_off_ctrl(adev, false); 5177 5178
+6 -6
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
··· 1455 1455 { 1456 1456 /* init spm vmid with 0xf */ 1457 1457 if (adev->gfx.rlc.funcs->update_spm_vmid) 1458 - adev->gfx.rlc.funcs->update_spm_vmid(adev, NULL, 0xf); 1458 + adev->gfx.rlc.funcs->update_spm_vmid(adev, 0, NULL, 0xf); 1459 1459 1460 1460 return 0; 1461 1461 } ··· 1666 1666 return 0; 1667 1667 } 1668 1668 1669 - static void gfx_v9_4_3_update_spm_vmid(struct amdgpu_device *adev, struct amdgpu_ring *ring, 1670 - unsigned vmid) 1669 + static void gfx_v9_4_3_update_spm_vmid(struct amdgpu_device *adev, 1670 + int inst, struct amdgpu_ring *ring, unsigned int vmid) 1671 1671 { 1672 1672 u32 reg, pre_data, data; 1673 1673 1674 - reg = SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_SPM_MC_CNTL); 1674 + reg = SOC15_REG_OFFSET(GC, GET_INST(GC, inst), regRLC_SPM_MC_CNTL); 1675 1675 if (amdgpu_sriov_is_pp_one_vf(adev) && !amdgpu_sriov_runtime(adev)) 1676 1676 pre_data = RREG32_NO_KIQ(reg); 1677 1677 else ··· 1682 1682 1683 1683 if (pre_data != data) { 1684 1684 if (amdgpu_sriov_is_pp_one_vf(adev) && !amdgpu_sriov_runtime(adev)) { 1685 - WREG32_SOC15_NO_KIQ(GC, GET_INST(GC, 0), regRLC_SPM_MC_CNTL, data); 1685 + WREG32_SOC15_NO_KIQ(GC, GET_INST(GC, inst), regRLC_SPM_MC_CNTL, data); 1686 1686 } else 1687 - WREG32_SOC15(GC, GET_INST(GC, 0), regRLC_SPM_MC_CNTL, data); 1687 + WREG32_SOC15(GC, GET_INST(GC, inst), regRLC_SPM_MC_CNTL, data); 1688 1688 } 1689 1689 } 1690 1690