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clk: qcom: lpass: Handle the regmap overlap of lpasscc and lpass_aon

Move registration of lpass_q6ss_ahbm_clk and lpass_q6ss_ahbs_clk to
lpass_aon_cc_sc7280_probe and register them only if "qcom,adsp-pil-mode"
is enabled in the lpass_aon DT node.

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Satya Priya <quic_c_skakit@quicinc.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1662005846-4838-3-git-send-email-quic_c_skakit@quicinc.com

authored by

Taniya Das and committed by
Bjorn Andersson
0cbcfbe5 adb12f06

+44 -44
+44
drivers/clk/qcom/lpassaudiocc-sc7280.c
··· 12 12 #include <linux/pm_runtime.h> 13 13 #include <linux/regmap.h> 14 14 15 + #include <dt-bindings/clock/qcom,lpass-sc7280.h> 15 16 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h> 16 17 17 18 #include "clk-alpha-pll.h" ··· 37 36 38 37 static const struct pll_vco zonda_vco[] = { 39 38 { 595200000UL, 3600000000UL, 0 }, 39 + }; 40 + 41 + static struct clk_branch lpass_q6ss_ahbm_clk = { 42 + .halt_reg = 0x901c, 43 + .halt_check = BRANCH_HALT, 44 + .clkr = { 45 + .enable_reg = 0x901c, 46 + .enable_mask = BIT(0), 47 + .hw.init = &(struct clk_init_data){ 48 + .name = "lpass_q6ss_ahbm_clk", 49 + .ops = &clk_branch2_ops, 50 + }, 51 + }, 52 + }; 53 + 54 + static struct clk_branch lpass_q6ss_ahbs_clk = { 55 + .halt_reg = 0x9020, 56 + .halt_check = BRANCH_HALT_VOTED, 57 + .clkr = { 58 + .enable_reg = 0x9020, 59 + .enable_mask = BIT(0), 60 + .hw.init = &(struct clk_init_data){ 61 + .name = "lpass_q6ss_ahbs_clk", 62 + .ops = &clk_branch2_ops, 63 + }, 64 + }, 40 65 }; 41 66 42 67 /* 1128.96MHz configuration */ ··· 641 614 .flags = RETAIN_FF_ENABLE, 642 615 }; 643 616 617 + static struct clk_regmap *lpass_cc_sc7280_clocks[] = { 618 + [LPASS_Q6SS_AHBM_CLK] = &lpass_q6ss_ahbm_clk.clkr, 619 + [LPASS_Q6SS_AHBS_CLK] = &lpass_q6ss_ahbs_clk.clkr, 620 + }; 621 + 644 622 static struct clk_regmap *lpass_aon_cc_sc7280_clocks[] = { 645 623 [LPASS_AON_CC_AUDIO_HM_H_CLK] = &lpass_aon_cc_audio_hm_h_clk.clkr, 646 624 [LPASS_AON_CC_VA_MEM0_CLK] = &lpass_aon_cc_va_mem0_clk.clkr, ··· 689 657 .reg_stride = 4, 690 658 .val_bits = 32, 691 659 .fast_io = true, 660 + }; 661 + 662 + static const struct qcom_cc_desc lpass_cc_sc7280_desc = { 663 + .config = &lpass_audio_cc_sc7280_regmap_config, 664 + .clks = lpass_cc_sc7280_clocks, 665 + .num_clks = ARRAY_SIZE(lpass_cc_sc7280_clocks), 692 666 }; 693 667 694 668 static const struct qcom_cc_desc lpass_audio_cc_sc7280_desc = { ··· 822 784 ret = lpassaudio_create_pm_clks(pdev); 823 785 if (ret) 824 786 return ret; 787 + 788 + if (of_property_read_bool(pdev->dev.of_node, "qcom,adsp-pil-mode")) { 789 + lpass_audio_cc_sc7280_regmap_config.name = "cc"; 790 + desc = &lpass_cc_sc7280_desc; 791 + return qcom_cc_probe(pdev, desc); 792 + } 825 793 826 794 lpass_audio_cc_sc7280_regmap_config.name = "lpasscc_aon"; 827 795 lpass_audio_cc_sc7280_regmap_config.max_register = 0xa0008;
-44
drivers/clk/qcom/lpasscc-sc7280.c
··· 17 17 #include "clk-branch.h" 18 18 #include "common.h" 19 19 20 - static struct clk_branch lpass_q6ss_ahbm_clk = { 21 - .halt_reg = 0x1c, 22 - .halt_check = BRANCH_HALT, 23 - .clkr = { 24 - .enable_reg = 0x1c, 25 - .enable_mask = BIT(0), 26 - .hw.init = &(struct clk_init_data){ 27 - .name = "lpass_q6ss_ahbm_clk", 28 - .ops = &clk_branch2_ops, 29 - }, 30 - }, 31 - }; 32 - 33 - static struct clk_branch lpass_q6ss_ahbs_clk = { 34 - .halt_reg = 0x20, 35 - .halt_check = BRANCH_HALT_VOTED, 36 - .clkr = { 37 - .enable_reg = 0x20, 38 - .enable_mask = BIT(0), 39 - .hw.init = &(struct clk_init_data){ 40 - .name = "lpass_q6ss_ahbs_clk", 41 - .ops = &clk_branch2_ops, 42 - }, 43 - }, 44 - }; 45 - 46 20 static struct clk_branch lpass_top_cc_lpi_q6_axim_hs_clk = { 47 21 .halt_reg = 0x0, 48 22 .halt_check = BRANCH_HALT, ··· 79 105 .fast_io = true, 80 106 }; 81 107 82 - static struct clk_regmap *lpass_cc_sc7280_clocks[] = { 83 - [LPASS_Q6SS_AHBM_CLK] = &lpass_q6ss_ahbm_clk.clkr, 84 - [LPASS_Q6SS_AHBS_CLK] = &lpass_q6ss_ahbs_clk.clkr, 85 - }; 86 - 87 - static const struct qcom_cc_desc lpass_cc_sc7280_desc = { 88 - .config = &lpass_regmap_config, 89 - .clks = lpass_cc_sc7280_clocks, 90 - .num_clks = ARRAY_SIZE(lpass_cc_sc7280_clocks), 91 - }; 92 - 93 108 static struct clk_regmap *lpass_cc_top_sc7280_clocks[] = { 94 109 [LPASS_TOP_CC_LPI_Q6_AXIM_HS_CLK] = 95 110 &lpass_top_cc_lpi_q6_axim_hs_clk.clkr, ··· 129 166 desc = &lpass_cc_top_sc7280_desc; 130 167 131 168 ret = qcom_cc_probe_by_index(pdev, 1, desc); 132 - if (ret) 133 - goto destroy_pm_clk; 134 - 135 - lpass_regmap_config.name = "cc"; 136 - desc = &lpass_cc_sc7280_desc; 137 - 138 - ret = qcom_cc_probe_by_index(pdev, 2, desc); 139 169 if (ret) 140 170 goto destroy_pm_clk; 141 171