Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mmc-v5.3-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC fixes from Ulf Hansson:
"MMC core:
- Fix init of SD cards reporting an invalid VDD range
MMC host:
- sprd: Fixes for clocks, card-detect, write-protect etc
- cadence: Fix ADMA 64-bit addressing
- tegra: Re-allow writing to SD card when GPIO pin is absent
- at91: Fix eMMC init by clearing HS200 cap as it's not supported"
* tag 'mmc-v5.3-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
mmc: sdhci-cadence: enable v4_mode to fix ADMA 64-bit addressing
mmc: sdhci-sprd: clear the UHS-I modes read from registers
mms: sdhci-sprd: add SDHCI_QUIRK_BROKEN_CARD_DETECTION
mmc: sdhci-sprd: add SDHCI_QUIRK2_PRESET_VALUE_BROKEN
mmc: sdhci-sprd: add get_ro hook function
mmc: sdhci-sprd: fixed incorrect clock divider
mmc: core: Fix init of SD cards reporting an invalid VDD range
mmc: sdhci-of-at91: add quirk for broken HS200
Revert "mmc: sdhci-tegra: drop ->get_ro() implementation"
+49
-5
+6
drivers/mmc/core/sd.c
+6
drivers/mmc/core/sd.c
···
1292
1292
goto err;
1293
1293
}
1294
1294
1295
+
/*
1296
+
* Some SD cards claims an out of spec VDD voltage range. Let's treat
1297
+
* these bits as being in-valid and especially also bit7.
1298
+
*/
1299
+
ocr &= ~0x7FFF;
1300
+
1295
1301
rocr = mmc_select_voltage(host, ocr);
1296
1302
1297
1303
/*
+1
drivers/mmc/host/sdhci-cadence.c
+1
drivers/mmc/host/sdhci-cadence.c
+3
drivers/mmc/host/sdhci-of-at91.c
+3
drivers/mmc/host/sdhci-of-at91.c
···
357
357
pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
358
358
pm_runtime_use_autosuspend(&pdev->dev);
359
359
360
+
/* HS200 is broken at this moment */
361
+
host->quirks2 = SDHCI_QUIRK2_BROKEN_HS200;
362
+
360
363
ret = sdhci_add_host(host);
361
364
if (ret)
362
365
goto pm_runtime_disable;
+25
-5
drivers/mmc/host/sdhci-sprd.c
+25
-5
drivers/mmc/host/sdhci-sprd.c
···
217
217
struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host);
218
218
u32 div, val, mask;
219
219
220
-
div = sdhci_sprd_calc_div(sprd_host->base_rate, clk);
220
+
sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
221
221
222
-
clk |= ((div & 0x300) >> 2) | ((div & 0xFF) << 8);
223
-
sdhci_enable_clk(host, clk);
222
+
div = sdhci_sprd_calc_div(sprd_host->base_rate, clk);
223
+
div = ((div & 0x300) >> 2) | ((div & 0xFF) << 8);
224
+
sdhci_enable_clk(host, div);
224
225
225
226
/* enable auto gate sdhc_enable_auto_gate */
226
227
val = sdhci_readl(host, SDHCI_SPRD_REG_32_BUSY_POSI);
···
374
373
return 1 << 31;
375
374
}
376
375
376
+
static unsigned int sdhci_sprd_get_ro(struct sdhci_host *host)
377
+
{
378
+
return 0;
379
+
}
380
+
377
381
static struct sdhci_ops sdhci_sprd_ops = {
378
382
.read_l = sdhci_sprd_readl,
379
383
.write_l = sdhci_sprd_writel,
···
391
385
.set_uhs_signaling = sdhci_sprd_set_uhs_signaling,
392
386
.hw_reset = sdhci_sprd_hw_reset,
393
387
.get_max_timeout_count = sdhci_sprd_get_max_timeout_count,
388
+
.get_ro = sdhci_sprd_get_ro,
394
389
};
395
390
396
391
static void sdhci_sprd_request(struct mmc_host *mmc, struct mmc_request *mrq)
···
508
501
}
509
502
510
503
static const struct sdhci_pltfm_data sdhci_sprd_pdata = {
511
-
.quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK,
504
+
.quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
505
+
SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
506
+
SDHCI_QUIRK_MISSING_CAPS,
512
507
.quirks2 = SDHCI_QUIRK2_BROKEN_HS200 |
513
-
SDHCI_QUIRK2_USE_32BIT_BLK_CNT,
508
+
SDHCI_QUIRK2_USE_32BIT_BLK_CNT |
509
+
SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
514
510
.ops = &sdhci_sprd_ops,
515
511
};
516
512
···
614
604
pm_suspend_ignore_children(&pdev->dev, 1);
615
605
616
606
sdhci_enable_v4_mode(host);
607
+
608
+
/*
609
+
* Supply the existing CAPS, but clear the UHS-I modes. This
610
+
* will allow these modes to be specified only by device
611
+
* tree properties through mmc_of_parse().
612
+
*/
613
+
host->caps = sdhci_readl(host, SDHCI_CAPABILITIES);
614
+
host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
615
+
host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
616
+
SDHCI_SUPPORT_DDR50);
617
617
618
618
ret = sdhci_setup_host(host);
619
619
if (ret)
+14
drivers/mmc/host/sdhci-tegra.c
+14
drivers/mmc/host/sdhci-tegra.c
···
258
258
}
259
259
}
260
260
261
+
static unsigned int tegra_sdhci_get_ro(struct sdhci_host *host)
262
+
{
263
+
/*
264
+
* Write-enable shall be assumed if GPIO is missing in a board's
265
+
* device-tree because SDHCI's WRITE_PROTECT bit doesn't work on
266
+
* Tegra.
267
+
*/
268
+
return mmc_gpio_get_ro(host->mmc);
269
+
}
270
+
261
271
static bool tegra_sdhci_is_pad_and_regulator_valid(struct sdhci_host *host)
262
272
{
263
273
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
···
1234
1224
};
1235
1225
1236
1226
static const struct sdhci_ops tegra_sdhci_ops = {
1227
+
.get_ro = tegra_sdhci_get_ro,
1237
1228
.read_w = tegra_sdhci_readw,
1238
1229
.write_l = tegra_sdhci_writel,
1239
1230
.set_clock = tegra_sdhci_set_clock,
···
1290
1279
};
1291
1280
1292
1281
static const struct sdhci_ops tegra114_sdhci_ops = {
1282
+
.get_ro = tegra_sdhci_get_ro,
1293
1283
.read_w = tegra_sdhci_readw,
1294
1284
.write_w = tegra_sdhci_writew,
1295
1285
.write_l = tegra_sdhci_writel,
···
1344
1332
};
1345
1333
1346
1334
static const struct sdhci_ops tegra210_sdhci_ops = {
1335
+
.get_ro = tegra_sdhci_get_ro,
1347
1336
.read_w = tegra_sdhci_readw,
1348
1337
.write_w = tegra210_sdhci_writew,
1349
1338
.write_l = tegra_sdhci_writel,
···
1379
1366
};
1380
1367
1381
1368
static const struct sdhci_ops tegra186_sdhci_ops = {
1369
+
.get_ro = tegra_sdhci_get_ro,
1382
1370
.read_w = tegra_sdhci_readw,
1383
1371
.write_l = tegra_sdhci_writel,
1384
1372
.set_clock = tegra_sdhci_set_clock,