Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/i915/display: Introduce dp/psr_compute_config_late()
Introduce intel_dp_compute_config_late() to handle late-stage
configuration checks for DP/eDP features. For now, it paves path for
psr_compute_config_late() to handle psr parameters that need to be
computed late.
Move the handling of psr_flag for Wa_18037818876 and setting of non-psr
pipes to intel_psr_compute_config_late() as these are the last things
to be configured for PSR features.
v2: Update dp_compute_config_late() to return int.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com> (#v1)
Link: https://lore.kernel.org/r/20251016055415.2101347-8-ankit.k.nautiyal@intel.com
+38
-9
+7
drivers/gpu/drm/i915/display/intel_ddi.c
+7
drivers/gpu/drm/i915/display/intel_ddi.c
···
4559
4559
struct intel_display *display = to_intel_display(encoder);
4560
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struct drm_connector *connector = conn_state->connector;
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u8 port_sync_transcoders = 0;
4562
+
int ret = 0;
4563
+
4564
+
if (intel_crtc_has_dp_encoder(crtc_state))
4565
+
ret = intel_dp_compute_config_late(encoder, crtc_state, conn_state);
4566
+
4567
+
if (ret)
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+
return ret;
4562
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drm_dbg_kms(display->drm, "[ENCODER:%d:%s] [CRTC:%d:%s]\n",
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encoder->base.base.id, encoder->base.name,
+11
drivers/gpu/drm/i915/display/intel_dp.c
+11
drivers/gpu/drm/i915/display/intel_dp.c
···
6979
6979
}
6980
6980
}
6981
6981
}
6982
+
6983
+
int intel_dp_compute_config_late(struct intel_encoder *encoder,
6984
+
struct intel_crtc_state *crtc_state,
6985
+
struct drm_connector_state *conn_state)
6986
+
{
6987
+
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
6988
+
6989
+
intel_psr_compute_config_late(intel_dp, crtc_state);
6990
+
6991
+
return 0;
6992
+
}
+3
drivers/gpu/drm/i915/display/intel_dp.h
+3
drivers/gpu/drm/i915/display/intel_dp.h
···
218
218
int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector);
219
219
void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool force_on_external);
220
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bool intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state);
221
+
int intel_dp_compute_config_late(struct intel_encoder *encoder,
222
+
struct intel_crtc_state *crtc_state,
223
+
struct drm_connector_state *conn_state);
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#endif /* __INTEL_DP_H__ */
+15
-9
drivers/gpu/drm/i915/display/intel_psr.c
+15
-9
drivers/gpu/drm/i915/display/intel_psr.c
···
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return;
1786
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crtc_state->has_sel_update = intel_sel_update_config_valid(intel_dp, crtc_state);
1788
-
1789
-
/* Wa_18037818876 */
1790
-
if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) {
1791
-
crtc_state->has_psr = false;
1792
-
drm_dbg_kms(display->drm,
1793
-
"PSR disabled to workaround PSR FSM hang issue\n");
1794
-
}
1795
-
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-
intel_psr_set_non_psr_pipes(intel_dp, crtc_state);
1797
1788
}
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void intel_psr_get_config(struct intel_encoder *encoder,
···
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const struct intel_crtc_state *crtc_state)
4346
4355
{
4347
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return intel_dp_is_edp(intel_dp) && crtc_state->has_panel_replay;
4357
+
}
4358
+
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+
void intel_psr_compute_config_late(struct intel_dp *intel_dp,
4360
+
struct intel_crtc_state *crtc_state)
4361
+
{
4362
+
struct intel_display *display = to_intel_display(intel_dp);
4363
+
4364
+
/* Wa_18037818876 */
4365
+
if (intel_psr_needs_wa_18037818876(intel_dp, crtc_state)) {
4366
+
crtc_state->has_psr = false;
4367
+
drm_dbg_kms(display->drm,
4368
+
"PSR disabled to workaround PSR FSM hang issue\n");
4369
+
}
4370
+
4371
+
intel_psr_set_non_psr_pipes(intel_dp, crtc_state);
4348
4372
}
+2
drivers/gpu/drm/i915/display/intel_psr.h
+2
drivers/gpu/drm/i915/display/intel_psr.h
···
83
83
bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state);
84
84
bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp,
85
85
const struct intel_crtc_state *crtc_state);
86
+
void intel_psr_compute_config_late(struct intel_dp *intel_dp,
87
+
struct intel_crtc_state *crtc_state);
86
88
87
89
#endif /* __INTEL_PSR_H__ */