phy: qcom-qmp-pcie: drop multi-PHY support

Each PCIe QMP PHY device provides just a single PCIe PHY. Drop support
for handling multiple child PHYs.

Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-25-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Dmitry Baryshkov and committed by

Vinod Koul 4 years ago 1239fd71 faf83af5

+3 -30

1 changed file

expand all

drivers

phy

qualcomm

phy-qcom-qmp-pcie.c

+3 -30

drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

··· 1329 1329 * @vregs: regulator supplies bulk data 1330 1330 * 1331 1331 * @phys: array of per-lane phy descriptors 1332 - * @phy_mutex: mutex lock for PHY common block initialization 1333 - * @init_count: phy common block initialization count 1334 1332 */ 1335 1333 struct qcom_qmp { 1336 1334 struct device *dev; ··· 1338 1340 struct regulator_bulk_data *vregs; 1339 1341 1340 1342 struct qmp_phy **phys; 1341 - 1342 - struct mutex phy_mutex; 1343 - int init_count; 1344 1343 }; 1345 1344 1346 1345 static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val) ··· 1791 1796 void __iomem *pcs = qphy->pcs; 1792 1797 int ret, i; 1793 1798 1794 - mutex_lock(&qmp->phy_mutex); 1795 - if (qmp->init_count++) { 1796 - mutex_unlock(&qmp->phy_mutex); 1797 - return 0; 1798 - } 1799 - 1800 1799 /* turn on regulator supplies */ 1801 1800 ret = regulator_bulk_enable(cfg->num_vregs, qmp->vregs); 1802 1801 if (ret) { 1803 1802 dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret); 1804 - goto err_unlock; 1803 + return ret; 1805 1804 } 1806 1805 1807 1806 for (i = 0; i < cfg->num_resets; i++) { ··· 1828 1839 qphy_setbits(pcs, QPHY_POWER_DOWN_CONTROL, 1829 1840 cfg->pwrdn_ctrl); 1830 1841 1831 - mutex_unlock(&qmp->phy_mutex); 1832 - 1833 1842 return 0; 1834 1843 1835 1844 err_assert_reset: ··· 1835 1848 reset_control_assert(qmp->resets[i]); 1836 1849 err_disable_regulators: 1837 1850 regulator_bulk_disable(cfg->num_vregs, qmp->vregs); 1838 - err_unlock: 1839 - mutex_unlock(&qmp->phy_mutex); 1840 1851 1841 1852 return ret; 1842 1853 } ··· 1845 1860 const struct qmp_phy_cfg *cfg = qphy->cfg; 1846 1861 int i = cfg->num_resets; 1847 1862 1848 - mutex_lock(&qmp->phy_mutex); 1849 - if (--qmp->init_count) { 1850 - mutex_unlock(&qmp->phy_mutex); 1851 - return 0; 1852 - } 1853 - 1854 1863 while (--i >= 0) 1855 1864 reset_control_assert(qmp->resets[i]); 1856 1865 1857 1866 clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); 1858 1867 1859 1868 regulator_bulk_disable(cfg->num_vregs, qmp->vregs); 1860 - 1861 - mutex_unlock(&qmp->phy_mutex); 1862 1869 1863 1870 return 0; 1864 1871 } ··· 2311 2334 struct phy_provider *phy_provider; 2312 2335 void __iomem *serdes; 2313 2336 const struct qmp_phy_cfg *cfg = NULL; 2314 - int num, id, expected_phys; 2337 + int num, id; 2315 2338 int ret; 2316 2339 2317 2340 qmp = devm_kzalloc(dev, sizeof(*qmp), GFP_KERNEL); ··· 2331 2354 if (IS_ERR(serdes)) 2332 2355 return PTR_ERR(serdes); 2333 2356 2334 - expected_phys = cfg->nlanes; 2335 - 2336 - mutex_init(&qmp->phy_mutex); 2337 - 2338 2357 ret = qcom_qmp_phy_pcie_clk_init(dev, cfg); 2339 2358 if (ret) 2340 2359 return ret; ··· 2349 2376 2350 2377 num = of_get_available_child_count(dev->of_node); 2351 2378 /* do we have a rogue child node ? */ 2352 - if (num > expected_phys) 2379 + if (num > 1) 2353 2380 return -EINVAL; 2354 2381 2355 2382 qmp->phys = devm_kcalloc(dev, num, sizeof(*qmp->phys), GFP_KERNEL);

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