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Merge branch 'sh/for-2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* 'sh/for-2.6.32' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
sh: Don't allocate smaller sized mappings on every iteration
sh: Try PMB mapping based on physical address, not mapping size
sh: Plug PMB alloc memory leak
sh: Sprinkle __uses_jump_to_uncached
sh: enable sleep state LEDs on Ecovec24
usb: r8a66597-udc unaligned fifo fix
sh: mach-ecovec24: Document DS2 switch settings.
sh: Build fix: export __movmem
sh: Disable unaligned kernel access printks by default.
sh: mach-ecovec24: modify 1st MTD area to read only
sh: mach-ecovec24: Add TouchScreen support
sh: magicpanelr2 and dreamcast can use the generic I/O base.
sh: Don't enable interrupts in the page fault path
sh: Set the default I/O port base to P2SEG.
sh: Handle ioport_map() cases for >= P1SEG addresses.

+166 -60
-2
arch/sh/boards/board-magicpanelr2.c
··· 205 205 206 206 static void __init mpr2_setup(char **cmdline_p) 207 207 { 208 - __set_io_port_base(0xa0000000); 209 - 210 208 /* set Pin Select Register A: 211 209 * /PCC_CD1, /PCC_CD2, PCC_BVD1, PCC_BVD2, 212 210 * /IOIS16, IRQ4, IRQ5, USB1d_SUSPEND
-2
arch/sh/boards/mach-dreamcast/setup.c
··· 42 42 /* Acknowledge any previous events */ 43 43 /* XXX */ 44 44 45 - __set_io_port_base(0xa0000000); 46 - 47 45 /* Assign all virtual IRQs to the System ASIC int. handler */ 48 46 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) 49 47 set_irq_chip_and_handler(i, &systemasic_int,
+62 -1
arch/sh/boards/mach-ecovec24/setup.c
··· 18 18 #include <linux/delay.h> 19 19 #include <linux/usb/r8a66597.h> 20 20 #include <linux/i2c.h> 21 + #include <linux/i2c/tsc2007.h> 21 22 #include <linux/input.h> 22 23 #include <video/sh_mobile_lcdc.h> 23 24 #include <media/sh_mobile_ceu.h> ··· 37 36 * 0x0400_0000 Internal I/O 16/32bit 38 37 * 0x0800_0000 DRAM 32bit 39 38 * 0x1800_0000 MFI 16bit 39 + */ 40 + 41 + /* SWITCH 42 + *------------------------------ 43 + * DS2[1] = FlashROM write protect ON : write protect 44 + * OFF : No write protect 45 + * DS2[2] = RMII / TS, SCIF ON : RMII 46 + * OFF : TS, SCIF3 47 + * DS2[3] = Camera / Video ON : Camera 48 + * OFF : NTSC/PAL (IN) 49 + * DS2[5] = NTSC_OUT Clock ON : On board OSC 50 + * OFF : SH7724 DV_CLK 51 + * DS2[6-7] = MMC / SD ON-OFF : SD 52 + * OFF-ON : MMC 40 53 */ 41 54 42 55 /* Heartbeat */ ··· 85 70 .name = "boot loader", 86 71 .offset = 0, 87 72 .size = (5 * 1024 * 1024), 88 - .mask_flags = MTD_CAP_ROM, 73 + .mask_flags = MTD_WRITEABLE, /* force read-only */ 89 74 }, { 90 75 .name = "free-area", 91 76 .offset = MTDPART_OFS_APPEND, ··· 391 376 }, 392 377 }; 393 378 379 + /* TouchScreen */ 380 + #define IRQ0 32 381 + static int ts_get_pendown_state(void) 382 + { 383 + int val = 0; 384 + gpio_free(GPIO_FN_INTC_IRQ0); 385 + gpio_request(GPIO_PTZ0, NULL); 386 + gpio_direction_input(GPIO_PTZ0); 387 + 388 + val = gpio_get_value(GPIO_PTZ0); 389 + 390 + gpio_free(GPIO_PTZ0); 391 + gpio_request(GPIO_FN_INTC_IRQ0, NULL); 392 + 393 + return val ? 0 : 1; 394 + } 395 + 396 + static int ts_init(void) 397 + { 398 + gpio_request(GPIO_FN_INTC_IRQ0, NULL); 399 + return 0; 400 + } 401 + 402 + struct tsc2007_platform_data tsc2007_info = { 403 + .model = 2007, 404 + .x_plate_ohms = 180, 405 + .get_pendown_state = ts_get_pendown_state, 406 + .init_platform_hw = ts_init, 407 + }; 408 + 409 + static struct i2c_board_info ts_i2c_clients = { 410 + I2C_BOARD_INFO("tsc2007", 0x48), 411 + .type = "tsc2007", 412 + .platform_data = &tsc2007_info, 413 + .irq = IRQ0, 414 + }; 415 + 394 416 static struct platform_device *ecovec_devices[] __initdata = { 395 417 &heartbeat_device, 396 418 &nor_flash_device, ··· 512 460 #define IODRIVEA 0xA405018A 513 461 static int __init arch_setup(void) 514 462 { 463 + /* enable STATUS0, STATUS2 and PDSTATUS */ 464 + gpio_request(GPIO_FN_STATUS0, NULL); 465 + gpio_request(GPIO_FN_STATUS2, NULL); 466 + gpio_request(GPIO_FN_PDSTATUS, NULL); 467 + 515 468 /* enable SCIFA0 */ 516 469 gpio_request(GPIO_FN_SCIF0_TXD, NULL); 517 470 gpio_request(GPIO_FN_SCIF0_RXD, NULL); ··· 647 590 */ 648 591 gpio_request(GPIO_PTF4, NULL); 649 592 gpio_direction_output(GPIO_PTF4, 1); 593 + 594 + /* enable TouchScreen */ 595 + i2c_register_board_info(0, &ts_i2c_clients, 1); 596 + set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); 650 597 } 651 598 652 599 /* enable CEU0 */
-2
arch/sh/kernel/cpu/sh3/entry.S
··· 152 152 mov.l 1f, r0 153 153 mov.l @r0, r6 154 154 155 - sti 156 - 157 155 mov.l 3f, r0 158 156 mov.l 4f, r1 159 157 mov r15, r4
+3
arch/sh/kernel/io_generic.c
··· 147 147 148 148 void __iomem *generic_ioport_map(unsigned long addr, unsigned int size) 149 149 { 150 + if (PXSEG(addr) >= P1SEG) 151 + return (void __iomem *)addr; 152 + 150 153 return (void __iomem *)(addr + generic_io_base); 151 154 } 152 155
+3
arch/sh/kernel/machvec.c
··· 14 14 #include <linux/string.h> 15 15 #include <asm/machvec.h> 16 16 #include <asm/sections.h> 17 + #include <asm/addrspace.h> 17 18 #include <asm/setup.h> 18 19 #include <asm/io.h> 19 20 #include <asm/irq.h> ··· 134 133 135 134 if (!sh_mv.mv_nr_irqs) 136 135 sh_mv.mv_nr_irqs = NR_IRQS; 136 + 137 + __set_io_port_base(P2SEG); 137 138 }
+1
arch/sh/kernel/sh_ksyms_32.c
··· 84 84 DECLARE_EXPORT(__movstr_i4_even); 85 85 DECLARE_EXPORT(__movstr_i4_odd); 86 86 DECLARE_EXPORT(__movstrSI12_i4); 87 + DECLARE_EXPORT(__movmem); 87 88 DECLARE_EXPORT(__movmem_i4_even); 88 89 DECLARE_EXPORT(__movmem_i4_odd); 89 90 DECLARE_EXPORT(__movmemSI12_i4);
+2 -2
arch/sh/kernel/traps_32.c
··· 54 54 /* bitfield: 1: warn 2: fixup 4: signal -> combinations 2|4 && 1|2|4 are not 55 55 valid! */ 56 56 static int se_usermode = 3; 57 - /* 0: no warning 1: print a warning message */ 58 - static int se_kernmode_warn = 1; 57 + /* 0: no warning 1: print a warning message, disabled by default */ 58 + static int se_kernmode_warn; 59 59 60 60 #ifdef CONFIG_PROC_FS 61 61 static const char *se_usermode_action[] = {
+1 -1
arch/sh/mm/cache-sh4.c
··· 43 43 * Called from kernel/module.c:sys_init_module and routine for a.out format, 44 44 * signal handler code and kprobes code 45 45 */ 46 - static void sh4_flush_icache_range(void *args) 46 + static void __uses_jump_to_uncached sh4_flush_icache_range(void *args) 47 47 { 48 48 struct flusher_data *data = args; 49 49 unsigned long start, end;
+2 -2
arch/sh/mm/cache-sh7705.c
··· 78 78 /* 79 79 * Writeback&Invalidate the D-cache of the page 80 80 */ 81 - static void __flush_dcache_page(unsigned long phys) 81 + static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys) 82 82 { 83 83 unsigned long ways, waysize, addrstart; 84 84 unsigned long flags; ··· 144 144 __flush_dcache_page(PHYSADDR(page_address(page))); 145 145 } 146 146 147 - static void sh7705_flush_cache_all(void *args) 147 + static void __uses_jump_to_uncached sh7705_flush_cache_all(void *args) 148 148 { 149 149 unsigned long flags; 150 150
+1 -1
arch/sh/mm/ioremap_32.c
··· 83 83 * 84 84 * PMB entries are all pre-faulted. 85 85 */ 86 - if (unlikely(size >= 0x1000000)) { 86 + if (unlikely(phys_addr >= P1SEG)) { 87 87 unsigned long mapped = pmb_remap(addr, phys_addr, size, flags); 88 88 89 89 if (likely(mapped)) {
+31 -6
arch/sh/mm/pmb.c
··· 33 33 34 34 #define NR_PMB_ENTRIES 16 35 35 36 + static void __pmb_unmap(struct pmb_entry *); 37 + 36 38 static struct kmem_cache *pmb_cache; 37 39 static unsigned long pmb_map; 38 40 ··· 220 218 long pmb_remap(unsigned long vaddr, unsigned long phys, 221 219 unsigned long size, unsigned long flags) 222 220 { 223 - struct pmb_entry *pmbp; 221 + struct pmb_entry *pmbp, *pmbe; 224 222 unsigned long wanted; 225 223 int pmb_flags, i; 224 + long err; 226 225 227 226 /* Convert typical pgprot value to the PMB equivalent */ 228 227 if (flags & _PAGE_CACHABLE) { ··· 239 236 240 237 again: 241 238 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) { 242 - struct pmb_entry *pmbe; 243 239 int ret; 244 240 245 241 if (size < pmb_sizes[i].size) 246 242 continue; 247 243 248 244 pmbe = pmb_alloc(vaddr, phys, pmb_flags | pmb_sizes[i].flag); 249 - if (IS_ERR(pmbe)) 250 - return PTR_ERR(pmbe); 245 + if (IS_ERR(pmbe)) { 246 + err = PTR_ERR(pmbe); 247 + goto out; 248 + } 251 249 252 250 ret = set_pmb_entry(pmbe); 253 251 if (ret != 0) { 254 252 pmb_free(pmbe); 255 - return -EBUSY; 253 + err = -EBUSY; 254 + goto out; 256 255 } 257 256 258 257 phys += pmb_sizes[i].size; ··· 269 264 pmbp->link = pmbe; 270 265 271 266 pmbp = pmbe; 267 + 268 + /* 269 + * Instead of trying smaller sizes on every iteration 270 + * (even if we succeed in allocating space), try using 271 + * pmb_sizes[i].size again. 272 + */ 273 + i--; 272 274 } 273 275 274 276 if (size >= 0x1000000) 275 277 goto again; 276 278 277 279 return wanted - size; 280 + 281 + out: 282 + if (pmbp) 283 + __pmb_unmap(pmbp); 284 + 285 + return err; 278 286 } 279 287 280 288 void pmb_unmap(unsigned long addr) ··· 301 283 if (unlikely(!pmbe)) 302 284 return; 303 285 286 + __pmb_unmap(pmbe); 287 + } 288 + 289 + static void __pmb_unmap(struct pmb_entry *pmbe) 290 + { 304 291 WARN_ON(!test_bit(pmbe->entry, &pmb_map)); 305 292 306 293 do { 307 294 struct pmb_entry *pmblink = pmbe; 308 295 309 - clear_pmb_entry(pmbe); 296 + if (pmbe->entry != PMB_NO_ENTRY) 297 + clear_pmb_entry(pmbe); 298 + 310 299 pmbe = pmblink->link; 311 300 312 301 pmb_free(pmblink);
+60 -41
drivers/usb/gadget/r8a66597-udc.h
··· 131 131 } 132 132 133 133 static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597, 134 - unsigned long offset, u16 *buf, 134 + unsigned long offset, 135 + unsigned char *buf, 135 136 int len) 136 137 { 138 + unsigned long fifoaddr = r8a66597->reg + offset; 139 + unsigned int data; 140 + int i; 141 + 137 142 if (r8a66597->pdata->on_chip) { 138 - unsigned long fifoaddr = r8a66597->reg + offset; 139 - unsigned long count; 140 - union { 141 - unsigned long dword; 142 - unsigned char byte[4]; 143 - } data; 144 - unsigned char *pb; 145 - int i; 143 + /* 32-bit accesses for on_chip controllers */ 146 144 147 - count = len / 4; 148 - insl(fifoaddr, buf, count); 145 + /* aligned buf case */ 146 + if (len >= 4 && !((unsigned long)buf & 0x03)) { 147 + insl(fifoaddr, buf, len / 4); 148 + buf += len & ~0x03; 149 + len &= 0x03; 150 + } 149 151 150 - if (len & 0x00000003) { 151 - data.dword = inl(fifoaddr); 152 - pb = (unsigned char *)buf + count * 4; 153 - for (i = 0; i < (len & 0x00000003); i++) 154 - pb[i] = data.byte[i]; 152 + /* unaligned buf case */ 153 + for (i = 0; i < len; i++) { 154 + if (!(i & 0x03)) 155 + data = inl(fifoaddr); 156 + 157 + buf[i] = (data >> ((i & 0x03) * 8)) & 0xff; 155 158 } 156 159 } else { 157 - len = (len + 1) / 2; 158 - insw(r8a66597->reg + offset, buf, len); 160 + /* 16-bit accesses for external controllers */ 161 + 162 + /* aligned buf case */ 163 + if (len >= 2 && !((unsigned long)buf & 0x01)) { 164 + insw(fifoaddr, buf, len / 2); 165 + buf += len & ~0x01; 166 + len &= 0x01; 167 + } 168 + 169 + /* unaligned buf case */ 170 + for (i = 0; i < len; i++) { 171 + if (!(i & 0x01)) 172 + data = inw(fifoaddr); 173 + 174 + buf[i] = (data >> ((i & 0x01) * 8)) & 0xff; 175 + } 159 176 } 160 177 } 161 178 ··· 183 166 } 184 167 185 168 static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, 186 - unsigned long offset, u16 *buf, 169 + unsigned long offset, 170 + unsigned char *buf, 187 171 int len) 188 172 { 189 173 unsigned long fifoaddr = r8a66597->reg + offset; 174 + int adj = 0; 175 + int i; 190 176 191 177 if (r8a66597->pdata->on_chip) { 192 - unsigned long count; 193 - unsigned char *pb; 194 - int i; 195 - 196 - count = len / 4; 197 - outsl(fifoaddr, buf, count); 198 - 199 - if (len & 0x00000003) { 200 - pb = (unsigned char *)buf + count * 4; 201 - for (i = 0; i < (len & 0x00000003); i++) { 202 - if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND) 203 - outb(pb[i], fifoaddr + i); 204 - else 205 - outb(pb[i], fifoaddr + 3 - i); 206 - } 178 + /* 32-bit access only if buf is 32-bit aligned */ 179 + if (len >= 4 && !((unsigned long)buf & 0x03)) { 180 + outsl(fifoaddr, buf, len / 4); 181 + buf += len & ~0x03; 182 + len &= 0x03; 207 183 } 208 184 } else { 209 - int odd = len & 0x0001; 210 - 211 - len = len / 2; 212 - outsw(fifoaddr, buf, len); 213 - if (unlikely(odd)) { 214 - buf = &buf[len]; 215 - outb((unsigned char)*buf, fifoaddr); 185 + /* 16-bit access only if buf is 16-bit aligned */ 186 + if (len >= 2 && !((unsigned long)buf & 0x01)) { 187 + outsw(fifoaddr, buf, len / 2); 188 + buf += len & ~0x01; 189 + len &= 0x01; 216 190 } 217 191 } 192 + 193 + /* adjust fifo address in the little endian case */ 194 + if (!(r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)) { 195 + if (r8a66597->pdata->on_chip) 196 + adj = 0x03; /* 32-bit wide */ 197 + else 198 + adj = 0x01; /* 16-bit wide */ 199 + } 200 + 201 + for (i = 0; i < len; i++) 202 + outb(buf[i], fifoaddr + adj - (i & adj)); 218 203 } 219 204 220 205 static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,